1
2
3
4
5#include <stdbool.h>
6
7#include "l3fwd.h"
8#include "l3fwd_event.h"
9
10static uint32_t
11l3fwd_event_device_setup_internal_port(void)
12{
13 struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
14 struct rte_event_dev_config event_d_conf = {
15 .nb_events_limit = 4096,
16 .nb_event_queue_flows = 1024,
17 .nb_event_port_dequeue_depth = 128,
18 .nb_event_port_enqueue_depth = 128
19 };
20 struct rte_event_dev_info dev_info;
21 const uint8_t event_d_id = 0;
22 uint32_t event_queue_cfg = 0;
23 uint16_t ethdev_count = 0;
24 uint16_t num_workers = 0;
25 uint16_t port_id;
26 int ret;
27
28 RTE_ETH_FOREACH_DEV(port_id) {
29 if ((evt_rsrc->port_mask & (1 << port_id)) == 0)
30 continue;
31 ethdev_count++;
32 }
33
34
35 rte_event_dev_info_get(event_d_id, &dev_info);
36
37
38 if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE)
39 evt_rsrc->disable_implicit_release = 0;
40
41 if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES)
42 event_queue_cfg |= RTE_EVENT_QUEUE_CFG_ALL_TYPES;
43
44 event_d_conf.nb_event_queues = ethdev_count;
45 if (dev_info.max_event_queues < event_d_conf.nb_event_queues)
46 event_d_conf.nb_event_queues = dev_info.max_event_queues;
47
48 if (dev_info.max_num_events < event_d_conf.nb_events_limit)
49 event_d_conf.nb_events_limit = dev_info.max_num_events;
50
51 if (dev_info.max_event_queue_flows < event_d_conf.nb_event_queue_flows)
52 event_d_conf.nb_event_queue_flows =
53 dev_info.max_event_queue_flows;
54
55 if (dev_info.max_event_port_dequeue_depth <
56 event_d_conf.nb_event_port_dequeue_depth)
57 event_d_conf.nb_event_port_dequeue_depth =
58 dev_info.max_event_port_dequeue_depth;
59
60 if (dev_info.max_event_port_enqueue_depth <
61 event_d_conf.nb_event_port_enqueue_depth)
62 event_d_conf.nb_event_port_enqueue_depth =
63 dev_info.max_event_port_enqueue_depth;
64
65 num_workers = rte_lcore_count();
66 if (dev_info.max_event_ports < num_workers)
67 num_workers = dev_info.max_event_ports;
68
69 event_d_conf.nb_event_ports = num_workers;
70 evt_rsrc->evp.nb_ports = num_workers;
71 evt_rsrc->evq.nb_queues = event_d_conf.nb_event_queues;
72 evt_rsrc->has_burst = !!(dev_info.event_dev_cap &
73 RTE_EVENT_DEV_CAP_BURST_MODE);
74
75 ret = rte_event_dev_configure(event_d_id, &event_d_conf);
76 if (ret < 0)
77 rte_panic("Error in configuring event device\n");
78
79 evt_rsrc->event_d_id = event_d_id;
80 return event_queue_cfg;
81}
82
83static void
84l3fwd_event_port_setup_internal_port(void)
85{
86 struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
87 uint8_t event_d_id = evt_rsrc->event_d_id;
88 struct rte_event_port_conf event_p_conf = {
89 .dequeue_depth = 32,
90 .enqueue_depth = 32,
91 .new_event_threshold = 4096
92 };
93 struct rte_event_port_conf def_p_conf;
94 uint8_t event_p_id;
95 int32_t ret;
96
97 evt_rsrc->evp.event_p_id = (uint8_t *)malloc(sizeof(uint8_t) *
98 evt_rsrc->evp.nb_ports);
99 if (!evt_rsrc->evp.event_p_id)
100 rte_panic("Failed to allocate memory for Event Ports\n");
101
102 ret = rte_event_port_default_conf_get(event_d_id, 0, &def_p_conf);
103 if (ret < 0)
104 rte_panic("Error to get default configuration of event port\n");
105
106 if (def_p_conf.new_event_threshold < event_p_conf.new_event_threshold)
107 event_p_conf.new_event_threshold =
108 def_p_conf.new_event_threshold;
109
110 if (def_p_conf.dequeue_depth < event_p_conf.dequeue_depth)
111 event_p_conf.dequeue_depth = def_p_conf.dequeue_depth;
112
113 if (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth)
114 event_p_conf.enqueue_depth = def_p_conf.enqueue_depth;
115
116 event_p_conf.event_port_cfg = 0;
117 if (evt_rsrc->disable_implicit_release)
118 event_p_conf.event_port_cfg |=
119 RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL;
120
121 for (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports;
122 event_p_id++) {
123 ret = rte_event_port_setup(event_d_id, event_p_id,
124 &event_p_conf);
125 if (ret < 0)
126 rte_panic("Error in configuring event port %d\n",
127 event_p_id);
128
129 ret = rte_event_port_link(event_d_id, event_p_id, NULL,
130 NULL, 0);
131 if (ret < 0)
132 rte_panic("Error in linking event port %d to queue\n",
133 event_p_id);
134 evt_rsrc->evp.event_p_id[event_p_id] = event_p_id;
135
136
137 rte_spinlock_init(&evt_rsrc->evp.lock);
138 }
139
140 evt_rsrc->def_p_conf = event_p_conf;
141}
142
143static void
144l3fwd_event_queue_setup_internal_port(uint32_t event_queue_cfg)
145{
146 struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
147 uint8_t event_d_id = evt_rsrc->event_d_id;
148 struct rte_event_queue_conf event_q_conf = {
149 .nb_atomic_flows = 1024,
150 .nb_atomic_order_sequences = 1024,
151 .event_queue_cfg = event_queue_cfg,
152 .priority = RTE_EVENT_DEV_PRIORITY_NORMAL
153 };
154 struct rte_event_queue_conf def_q_conf;
155 uint8_t event_q_id = 0;
156 int32_t ret;
157
158 ret = rte_event_queue_default_conf_get(event_d_id, event_q_id,
159 &def_q_conf);
160 if (ret < 0)
161 rte_panic("Error to get default config of event queue\n");
162
163 if (def_q_conf.nb_atomic_flows < event_q_conf.nb_atomic_flows)
164 event_q_conf.nb_atomic_flows = def_q_conf.nb_atomic_flows;
165
166 if (def_q_conf.nb_atomic_order_sequences <
167 event_q_conf.nb_atomic_order_sequences)
168 event_q_conf.nb_atomic_order_sequences =
169 def_q_conf.nb_atomic_order_sequences;
170
171 event_q_conf.event_queue_cfg = event_queue_cfg;
172 event_q_conf.schedule_type = evt_rsrc->sched_type;
173 evt_rsrc->evq.event_q_id = (uint8_t *)malloc(sizeof(uint8_t) *
174 evt_rsrc->evq.nb_queues);
175 if (!evt_rsrc->evq.event_q_id)
176 rte_panic("Memory allocation failure\n");
177
178 for (event_q_id = 0; event_q_id < evt_rsrc->evq.nb_queues;
179 event_q_id++) {
180 ret = rte_event_queue_setup(event_d_id, event_q_id,
181 &event_q_conf);
182 if (ret < 0)
183 rte_panic("Error in configuring event queue\n");
184 evt_rsrc->evq.event_q_id[event_q_id] = event_q_id;
185 }
186}
187
188static void
189l3fwd_rx_tx_adapter_setup_internal_port(void)
190{
191 struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
192 struct rte_event_eth_rx_adapter_queue_conf eth_q_conf;
193 uint8_t event_d_id = evt_rsrc->event_d_id;
194 uint16_t adapter_id = 0;
195 uint16_t nb_adapter = 0;
196 uint16_t port_id;
197 uint8_t q_id = 0;
198 int ret;
199
200 memset(ð_q_conf, 0, sizeof(eth_q_conf));
201 eth_q_conf.ev.priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
202
203 RTE_ETH_FOREACH_DEV(port_id) {
204 if ((evt_rsrc->port_mask & (1 << port_id)) == 0)
205 continue;
206 nb_adapter++;
207 }
208
209 evt_rsrc->rx_adptr.nb_rx_adptr = nb_adapter;
210 evt_rsrc->rx_adptr.rx_adptr = (uint8_t *)malloc(sizeof(uint8_t) *
211 evt_rsrc->rx_adptr.nb_rx_adptr);
212 if (!evt_rsrc->rx_adptr.rx_adptr) {
213 free(evt_rsrc->evp.event_p_id);
214 free(evt_rsrc->evq.event_q_id);
215 rte_panic("Failed to allocate memory for Rx adapter\n");
216 }
217
218
219 RTE_ETH_FOREACH_DEV(port_id) {
220 if ((evt_rsrc->port_mask & (1 << port_id)) == 0)
221 continue;
222 ret = rte_event_eth_rx_adapter_create(adapter_id, event_d_id,
223 &evt_rsrc->def_p_conf);
224 if (ret)
225 rte_panic("Failed to create rx adapter[%d]\n",
226 adapter_id);
227
228
229 eth_q_conf.ev.sched_type = evt_rsrc->sched_type;
230 eth_q_conf.ev.queue_id = evt_rsrc->evq.event_q_id[q_id];
231 ret = rte_event_eth_rx_adapter_queue_add(adapter_id, port_id,
232 -1, ð_q_conf);
233 if (ret)
234 rte_panic("Failed to add queues to Rx adapter\n");
235
236 ret = rte_event_eth_rx_adapter_start(adapter_id);
237 if (ret)
238 rte_panic("Rx adapter[%d] start Failed\n", adapter_id);
239
240 evt_rsrc->rx_adptr.rx_adptr[adapter_id] = adapter_id;
241 adapter_id++;
242 if (q_id < evt_rsrc->evq.nb_queues)
243 q_id++;
244 }
245
246 evt_rsrc->tx_adptr.nb_tx_adptr = nb_adapter;
247 evt_rsrc->tx_adptr.tx_adptr = (uint8_t *)malloc(sizeof(uint8_t) *
248 evt_rsrc->tx_adptr.nb_tx_adptr);
249 if (!evt_rsrc->tx_adptr.tx_adptr) {
250 free(evt_rsrc->rx_adptr.rx_adptr);
251 free(evt_rsrc->evp.event_p_id);
252 free(evt_rsrc->evq.event_q_id);
253 rte_panic("Failed to allocate memory for Rx adapter\n");
254 }
255
256 adapter_id = 0;
257 RTE_ETH_FOREACH_DEV(port_id) {
258 if ((evt_rsrc->port_mask & (1 << port_id)) == 0)
259 continue;
260 ret = rte_event_eth_tx_adapter_create(adapter_id, event_d_id,
261 &evt_rsrc->def_p_conf);
262 if (ret)
263 rte_panic("Failed to create tx adapter[%d]\n",
264 adapter_id);
265
266 ret = rte_event_eth_tx_adapter_queue_add(adapter_id, port_id,
267 -1);
268 if (ret)
269 rte_panic("Failed to add queues to Tx adapter\n");
270
271 ret = rte_event_eth_tx_adapter_start(adapter_id);
272 if (ret)
273 rte_panic("Tx adapter[%d] start Failed\n", adapter_id);
274
275 evt_rsrc->tx_adptr.tx_adptr[adapter_id] = adapter_id;
276 adapter_id++;
277 }
278}
279
280void
281l3fwd_event_set_internal_port_ops(struct l3fwd_event_setup_ops *ops)
282{
283 ops->event_device_setup = l3fwd_event_device_setup_internal_port;
284 ops->event_queue_setup = l3fwd_event_queue_setup_internal_port;
285 ops->event_port_setup = l3fwd_event_port_setup_internal_port;
286 ops->adapter_setup = l3fwd_rx_tx_adapter_setup_internal_port;
287}
288
