/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2018-2021 HiSilicon Limited.
 */

#include <rte_alarm.h>
#include <rte_bus_pci.h>
#include <ethdev_pci.h>
#include <rte_pci.h>
#include <rte_kvargs.h>

#include "hns3_ethdev.h"
#include "hns3_logs.h"
#include "hns3_rxtx.h"
#include "hns3_intr.h"
#include "hns3_regs.h"
#include "hns3_dcb.h"
#include "hns3_mp.h"

#define HNS3_SERVICE_INTERVAL           1000000 /* us */
#define HNS3_SERVICE_QUICK_INTERVAL     10
#define HNS3_INVALID_PVID               0xFFFF

#define HNS3_FILTER_TYPE_VF             0
#define HNS3_FILTER_TYPE_PORT           1
#define HNS3_FILTER_FE_EGRESS_V1_B      BIT(0)
#define HNS3_FILTER_FE_NIC_INGRESS_B    BIT(0)
#define HNS3_FILTER_FE_NIC_EGRESS_B     BIT(1)
#define HNS3_FILTER_FE_ROCE_INGRESS_B   BIT(2)
#define HNS3_FILTER_FE_ROCE_EGRESS_B    BIT(3)
#define HNS3_FILTER_FE_EGRESS           (HNS3_FILTER_FE_NIC_EGRESS_B \
                                        | HNS3_FILTER_FE_ROCE_EGRESS_B)
#define HNS3_FILTER_FE_INGRESS          (HNS3_FILTER_FE_NIC_INGRESS_B \
                                        | HNS3_FILTER_FE_ROCE_INGRESS_B)

/* Reset related Registers */
#define HNS3_GLOBAL_RESET_BIT           0
#define HNS3_CORE_RESET_BIT             1
#define HNS3_IMP_RESET_BIT              2
#define HNS3_FUN_RST_ING_B              0

#define HNS3_VECTOR0_IMP_RESET_INT_B    1
#define HNS3_VECTOR0_IMP_CMDQ_ERR_B     4U
#define HNS3_VECTOR0_IMP_RD_POISON_B    5U
#define HNS3_VECTOR0_ALL_MSIX_ERR_B     6U

#define HNS3_RESET_WAIT_MS      100
#define HNS3_RESET_WAIT_CNT     200

/* FEC mode order defined in HNS3 hardware */
#define HNS3_HW_FEC_MODE_NOFEC  0
#define HNS3_HW_FEC_MODE_BASER  1
#define HNS3_HW_FEC_MODE_RS     2

enum hns3_evt_cause {
        HNS3_VECTOR0_EVENT_RST,
        HNS3_VECTOR0_EVENT_MBX,
        HNS3_VECTOR0_EVENT_ERR,
        HNS3_VECTOR0_EVENT_PTP,
        HNS3_VECTOR0_EVENT_OTHER,
};

static const struct rte_eth_fec_capa speed_fec_capa_tbl[] = {
        { ETH_SPEED_NUM_10G, RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC) |
                             RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) |
                             RTE_ETH_FEC_MODE_CAPA_MASK(BASER) },

        { ETH_SPEED_NUM_25G, RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC) |
                             RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) |
                             RTE_ETH_FEC_MODE_CAPA_MASK(BASER) |
                             RTE_ETH_FEC_MODE_CAPA_MASK(RS) },

        { ETH_SPEED_NUM_40G, RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC) |
                             RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) |
                             RTE_ETH_FEC_MODE_CAPA_MASK(BASER) },

        { ETH_SPEED_NUM_50G, RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC) |
                             RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) |
                             RTE_ETH_FEC_MODE_CAPA_MASK(BASER) |
                             RTE_ETH_FEC_MODE_CAPA_MASK(RS) },

        { ETH_SPEED_NUM_100G, RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC) |
                              RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) |
                              RTE_ETH_FEC_MODE_CAPA_MASK(RS) },

        { ETH_SPEED_NUM_200G, RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC) |
                              RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) |
                              RTE_ETH_FEC_MODE_CAPA_MASK(RS) }
};

static enum hns3_reset_level hns3_get_reset_level(struct hns3_adapter *hns,
                                                 uint64_t *levels);
static int hns3_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
static int hns3_vlan_pvid_configure(struct hns3_adapter *hns, uint16_t pvid,
                                    int on);
static int hns3_update_link_info(struct rte_eth_dev *eth_dev);
static bool hns3_update_link_status(struct hns3_hw *hw);

static int hns3_add_mc_addr(struct hns3_hw *hw,
                            struct rte_ether_addr *mac_addr);
static int hns3_remove_mc_addr(struct hns3_hw *hw,
                            struct rte_ether_addr *mac_addr);
static int hns3_restore_fec(struct hns3_hw *hw);
static int hns3_query_dev_fec_info(struct hns3_hw *hw);
static int hns3_do_stop(struct hns3_adapter *hns);
static int hns3_check_port_speed(struct hns3_hw *hw, uint32_t link_speeds);

void hns3_ether_format_addr(char *buf, uint16_t size,
                            const struct rte_ether_addr *ether_addr)
{
        snprintf(buf, size, "%02X:**:**:**:%02X:%02X",
                ether_addr->addr_bytes[0],
                ether_addr->addr_bytes[4],
                ether_addr->addr_bytes[5]);
}

static void
hns3_pf_disable_irq0(struct hns3_hw *hw)
{
        hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 0);
}

static void
hns3_pf_enable_irq0(struct hns3_hw *hw)
{
        hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 1);
}

static enum hns3_evt_cause
hns3_proc_imp_reset_event(struct hns3_adapter *hns, bool is_delay,
                          uint32_t *vec_val)
{
        struct hns3_hw *hw = &hns->hw;

        __atomic_store_n(&hw->reset.disable_cmd, 1, __ATOMIC_RELAXED);
        hns3_atomic_set_bit(HNS3_IMP_RESET, &hw->reset.pending);
        *vec_val = BIT(HNS3_VECTOR0_IMPRESET_INT_B);
        if (!is_delay) {
                hw->reset.stats.imp_cnt++;
                hns3_warn(hw, "IMP reset detected, clear reset status");
        } else {
                hns3_schedule_delayed_reset(hns);
                hns3_warn(hw, "IMP reset detected, don't clear reset status");
        }

        return HNS3_VECTOR0_EVENT_RST;
}

static enum hns3_evt_cause
hns3_proc_global_reset_event(struct hns3_adapter *hns, bool is_delay,
                             uint32_t *vec_val)
{
        struct hns3_hw *hw = &hns->hw;

        __atomic_store_n(&hw->reset.disable_cmd, 1, __ATOMIC_RELAXED);
        hns3_atomic_set_bit(HNS3_GLOBAL_RESET, &hw->reset.pending);
        *vec_val = BIT(HNS3_VECTOR0_GLOBALRESET_INT_B);
        if (!is_delay) {
                hw->reset.stats.global_cnt++;
                hns3_warn(hw, "Global reset detected, clear reset status");
        } else {
                hns3_schedule_delayed_reset(hns);
                hns3_warn(hw,
                          "Global reset detected, don't clear reset status");
        }

        return HNS3_VECTOR0_EVENT_RST;
}

static enum hns3_evt_cause
hns3_check_event_cause(struct hns3_adapter *hns, uint32_t *clearval)
{
        struct hns3_hw *hw = &hns->hw;
        uint32_t vector0_int_stats;
        uint32_t cmdq_src_val;
        uint32_t hw_err_src_reg;
        uint32_t val;
        enum hns3_evt_cause ret;
        bool is_delay;

        /* fetch the events from their corresponding regs */
        vector0_int_stats = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG);
        cmdq_src_val = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG);
        hw_err_src_reg = hns3_read_dev(hw, HNS3_RAS_PF_OTHER_INT_STS_REG);

        is_delay = clearval == NULL ? true : false;
        /*
         * Assumption: If by any chance reset and mailbox events are reported
         * together then we will only process reset event and defer the
         * processing of the mailbox events. Since, we would have not cleared
         * RX CMDQ event this time we would receive again another interrupt
         * from H/W just for the mailbox.
         */
        if (BIT(HNS3_VECTOR0_IMPRESET_INT_B) & vector0_int_stats) { /* IMP */
                ret = hns3_proc_imp_reset_event(hns, is_delay, &val);
                goto out;
        }

        /* Global reset */
        if (BIT(HNS3_VECTOR0_GLOBALRESET_INT_B) & vector0_int_stats) {
                ret = hns3_proc_global_reset_event(hns, is_delay, &val);
                goto out;
        }

        /* Check for vector0 1588 event source */
        if (BIT(HNS3_VECTOR0_1588_INT_B) & vector0_int_stats) {
                val = BIT(HNS3_VECTOR0_1588_INT_B);
                ret = HNS3_VECTOR0_EVENT_PTP;
                goto out;
        }

        /* check for vector0 msix event source */
        if (vector0_int_stats & HNS3_VECTOR0_REG_MSIX_MASK ||
            hw_err_src_reg & HNS3_RAS_REG_NFE_MASK) {
                val = vector0_int_stats | hw_err_src_reg;
                ret = HNS3_VECTOR0_EVENT_ERR;
                goto out;
        }

        /* check for vector0 mailbox(=CMDQ RX) event source */
        if (BIT(HNS3_VECTOR0_RX_CMDQ_INT_B) & cmdq_src_val) {
                cmdq_src_val &= ~BIT(HNS3_VECTOR0_RX_CMDQ_INT_B);
                val = cmdq_src_val;
                ret = HNS3_VECTOR0_EVENT_MBX;
                goto out;
        }

        val = vector0_int_stats;
        ret = HNS3_VECTOR0_EVENT_OTHER;
out:

        if (clearval)
                *clearval = val;
        return ret;
}

static bool
hns3_is_1588_event_type(uint32_t event_type)
{
        return (event_type == HNS3_VECTOR0_EVENT_PTP);
}

static void
hns3_clear_event_cause(struct hns3_hw *hw, uint32_t event_type, uint32_t regclr)
{
        if (event_type == HNS3_VECTOR0_EVENT_RST ||
            hns3_is_1588_event_type(event_type))
                hns3_write_dev(hw, HNS3_MISC_RESET_STS_REG, regclr);
        else if (event_type == HNS3_VECTOR0_EVENT_MBX)
                hns3_write_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG, regclr);
}

static void
hns3_clear_all_event_cause(struct hns3_hw *hw)
{
        uint32_t vector0_int_stats;

        vector0_int_stats = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG);
        if (BIT(HNS3_VECTOR0_IMPRESET_INT_B) & vector0_int_stats)
                hns3_warn(hw, "Probe during IMP reset interrupt");

        if (BIT(HNS3_VECTOR0_GLOBALRESET_INT_B) & vector0_int_stats)
                hns3_warn(hw, "Probe during Global reset interrupt");

        hns3_clear_event_cause(hw, HNS3_VECTOR0_EVENT_RST,
                               BIT(HNS3_VECTOR0_IMPRESET_INT_B) |
                               BIT(HNS3_VECTOR0_GLOBALRESET_INT_B) |
                               BIT(HNS3_VECTOR0_CORERESET_INT_B));
        hns3_clear_event_cause(hw, HNS3_VECTOR0_EVENT_MBX, 0);
        hns3_clear_event_cause(hw, HNS3_VECTOR0_EVENT_PTP,
                                BIT(HNS3_VECTOR0_1588_INT_B));
}

static void
hns3_handle_mac_tnl(struct hns3_hw *hw)
{
        struct hns3_cmd_desc desc;
        uint32_t status;
        int ret;

        /* query and clear mac tnl interrupt */
        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_QUERY_MAC_TNL_INT, true);
        ret = hns3_cmd_send(hw, &desc, 1);
        if (ret) {
                hns3_err(hw, "failed to query mac tnl int, ret = %d.", ret);
                return;
        }

        status = rte_le_to_cpu_32(desc.data[0]);
        if (status) {
                hns3_warn(hw, "mac tnl int occurs, status = 0x%x.", status);
                hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_CLEAR_MAC_TNL_INT,
                                          false);
                desc.data[0] = rte_cpu_to_le_32(HNS3_MAC_TNL_INT_CLR);
                ret = hns3_cmd_send(hw, &desc, 1);
                if (ret)
                        hns3_err(hw, "failed to clear mac tnl int, ret = %d.",
                                 ret);
        }
}

static void
hns3_interrupt_handler(void *param)
{
        struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
        struct hns3_adapter *hns = dev->data->dev_private;
        struct hns3_hw *hw = &hns->hw;
        enum hns3_evt_cause event_cause;
        uint32_t clearval = 0;
        uint32_t vector0_int;
        uint32_t ras_int;
        uint32_t cmdq_int;

        /* Disable interrupt */
        hns3_pf_disable_irq0(hw);

        event_cause = hns3_check_event_cause(hns, &clearval);
        vector0_int = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG);
        ras_int = hns3_read_dev(hw, HNS3_RAS_PF_OTHER_INT_STS_REG);
        cmdq_int = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG);
        hns3_clear_event_cause(hw, event_cause, clearval);
        /* vector 0 interrupt is shared with reset and mailbox source events. */
        if (event_cause == HNS3_VECTOR0_EVENT_ERR) {
                hns3_warn(hw, "received interrupt: vector0_int_stat:0x%x "
                          "ras_int_stat:0x%x cmdq_int_stat:0x%x",
                          vector0_int, ras_int, cmdq_int);
                hns3_handle_mac_tnl(hw);
                hns3_handle_error(hns);
        } else if (event_cause == HNS3_VECTOR0_EVENT_RST) {
                hns3_warn(hw, "received reset interrupt");
                hns3_schedule_reset(hns);
        } else if (event_cause == HNS3_VECTOR0_EVENT_MBX) {
                hns3_dev_handle_mbx_msg(hw);
        } else {
                hns3_warn(hw, "received unknown event: vector0_int_stat:0x%x "
                          "ras_int_stat:0x%x cmdq_int_stat:0x%x",
                          vector0_int, ras_int, cmdq_int);
        }

        /* Enable interrupt if it is not cause by reset */
        hns3_pf_enable_irq0(hw);
}

static int
hns3_set_port_vlan_filter(struct hns3_adapter *hns, uint16_t vlan_id, int on)
{
#define HNS3_VLAN_ID_OFFSET_STEP        160
#define HNS3_VLAN_BYTE_SIZE             8
        struct hns3_vlan_filter_pf_cfg_cmd *req;
        struct hns3_hw *hw = &hns->hw;
        uint8_t vlan_offset_byte_val;
        struct hns3_cmd_desc desc;
        uint8_t vlan_offset_byte;
        uint8_t vlan_offset_base;
        int ret;

        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_VLAN_FILTER_PF_CFG, false);

        vlan_offset_base = vlan_id / HNS3_VLAN_ID_OFFSET_STEP;
        vlan_offset_byte = (vlan_id % HNS3_VLAN_ID_OFFSET_STEP) /
                           HNS3_VLAN_BYTE_SIZE;
        vlan_offset_byte_val = 1 << (vlan_id % HNS3_VLAN_BYTE_SIZE);

        req = (struct hns3_vlan_filter_pf_cfg_cmd *)desc.data;
        req->vlan_offset = vlan_offset_base;
        req->vlan_cfg = on ? 0 : 1;
        req->vlan_offset_bitmap[vlan_offset_byte] = vlan_offset_byte_val;

        ret = hns3_cmd_send(hw, &desc, 1);
        if (ret)
                hns3_err(hw, "set port vlan id failed, vlan_id =%u, ret =%d",
                         vlan_id, ret);

        return ret;
}

static void
hns3_rm_dev_vlan_table(struct hns3_adapter *hns, uint16_t vlan_id)
{
        struct hns3_user_vlan_table *vlan_entry;
        struct hns3_pf *pf = &hns->pf;

        LIST_FOREACH(vlan_entry, &pf->vlan_list, next) {
                if (vlan_entry->vlan_id == vlan_id) {
                        if (vlan_entry->hd_tbl_status)
                                hns3_set_port_vlan_filter(hns, vlan_id, 0);
                        LIST_REMOVE(vlan_entry, next);
                        rte_free(vlan_entry);
                        break;
                }
        }
}

static void
hns3_add_dev_vlan_table(struct hns3_adapter *hns, uint16_t vlan_id,
                        bool writen_to_tbl)
{
        struct hns3_user_vlan_table *vlan_entry;
        struct hns3_hw *hw = &hns->hw;
        struct hns3_pf *pf = &hns->pf;

        LIST_FOREACH(vlan_entry, &pf->vlan_list, next) {
                if (vlan_entry->vlan_id == vlan_id)
                        return;
        }

        vlan_entry = rte_zmalloc("hns3_vlan_tbl", sizeof(*vlan_entry), 0);
        if (vlan_entry == NULL) {
                hns3_err(hw, "Failed to malloc hns3 vlan table");
                return;
        }

        vlan_entry->hd_tbl_status = writen_to_tbl;
        vlan_entry->vlan_id = vlan_id;

        LIST_INSERT_HEAD(&pf->vlan_list, vlan_entry, next);
}

static int
hns3_restore_vlan_table(struct hns3_adapter *hns)
{
        struct hns3_user_vlan_table *vlan_entry;
        struct hns3_hw *hw = &hns->hw;
        struct hns3_pf *pf = &hns->pf;
        uint16_t vlan_id;
        int ret = 0;

        if (hw->port_base_vlan_cfg.state == HNS3_PORT_BASE_VLAN_ENABLE)
                return hns3_vlan_pvid_configure(hns,
                                                hw->port_base_vlan_cfg.pvid, 1);

        LIST_FOREACH(vlan_entry, &pf->vlan_list, next) {
                if (vlan_entry->hd_tbl_status) {
                        vlan_id = vlan_entry->vlan_id;
                        ret = hns3_set_port_vlan_filter(hns, vlan_id, 1);
                        if (ret)
                                break;
                }
        }

        return ret;
}

static int
hns3_vlan_filter_configure(struct hns3_adapter *hns, uint16_t vlan_id, int on)
{
        struct hns3_hw *hw = &hns->hw;
        bool writen_to_tbl = false;
        int ret = 0;

        /*
         * When vlan filter is enabled, hardware regards packets without vlan
         * as packets with vlan 0. So, to receive packets without vlan, vlan id
         * 0 is not allowed to be removed by rte_eth_dev_vlan_filter.
         */
        if (on == 0 && vlan_id == 0)
                return 0;

        /*
         * When port base vlan enabled, we use port base vlan as the vlan
         * filter condition. In this case, we don't update vlan filter table
         * when user add new vlan or remove exist vlan, just update the
         * vlan list. The vlan id in vlan list will be written in vlan filter
         * table until port base vlan disabled
         */
        if (hw->port_base_vlan_cfg.state == HNS3_PORT_BASE_VLAN_DISABLE) {
                ret = hns3_set_port_vlan_filter(hns, vlan_id, on);
                writen_to_tbl = true;
        }

        if (ret == 0) {
                if (on)
                        hns3_add_dev_vlan_table(hns, vlan_id, writen_to_tbl);
                else
                        hns3_rm_dev_vlan_table(hns, vlan_id);
        }
        return ret;
}

static int
hns3_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
{
        struct hns3_adapter *hns = dev->data->dev_private;
        struct hns3_hw *hw = &hns->hw;
        int ret;

        rte_spinlock_lock(&hw->lock);
        ret = hns3_vlan_filter_configure(hns, vlan_id, on);
        rte_spinlock_unlock(&hw->lock);
        return ret;
}

static int
hns3_vlan_tpid_configure(struct hns3_adapter *hns, enum rte_vlan_type vlan_type,
                         uint16_t tpid)
{
        struct hns3_rx_vlan_type_cfg_cmd *rx_req;
        struct hns3_tx_vlan_type_cfg_cmd *tx_req;
        struct hns3_hw *hw = &hns->hw;
        struct hns3_cmd_desc desc;
        int ret;

        if ((vlan_type != ETH_VLAN_TYPE_INNER &&
             vlan_type != ETH_VLAN_TYPE_OUTER)) {
                hns3_err(hw, "Unsupported vlan type, vlan_type =%d", vlan_type);
                return -EINVAL;
        }

        if (tpid != RTE_ETHER_TYPE_VLAN) {
                hns3_err(hw, "Unsupported vlan tpid, vlan_type =%d", vlan_type);
                return -EINVAL;
        }

        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MAC_VLAN_TYPE_ID, false);
        rx_req = (struct hns3_rx_vlan_type_cfg_cmd *)desc.data;

        if (vlan_type == ETH_VLAN_TYPE_OUTER) {
                rx_req->ot_fst_vlan_type = rte_cpu_to_le_16(tpid);
                rx_req->ot_sec_vlan_type = rte_cpu_to_le_16(tpid);
        } else if (vlan_type == ETH_VLAN_TYPE_INNER) {
                rx_req->ot_fst_vlan_type = rte_cpu_to_le_16(tpid);
                rx_req->ot_sec_vlan_type = rte_cpu_to_le_16(tpid);
                rx_req->in_fst_vlan_type = rte_cpu_to_le_16(tpid);
                rx_req->in_sec_vlan_type = rte_cpu_to_le_16(tpid);
        }

        ret = hns3_cmd_send(hw, &desc, 1);
        if (ret) {
                hns3_err(hw, "Send rxvlan protocol type command fail, ret =%d",
                         ret);
                return ret;
        }

        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MAC_VLAN_INSERT, false);

        tx_req = (struct hns3_tx_vlan_type_cfg_cmd *)desc.data;
        tx_req->ot_vlan_type = rte_cpu_to_le_16(tpid);
        tx_req->in_vlan_type = rte_cpu_to_le_16(tpid);

        ret = hns3_cmd_send(hw, &desc, 1);
        if (ret)
                hns3_err(hw, "Send txvlan protocol type command fail, ret =%d",
                         ret);
        return ret;
}

static int
hns3_vlan_tpid_set(struct rte_eth_dev *dev, enum rte_vlan_type vlan_type,
                   uint16_t tpid)
{
        struct hns3_adapter *hns = dev->data->dev_private;
        struct hns3_hw *hw = &hns->hw;
        int ret;

        rte_spinlock_lock(&hw->lock);
        ret = hns3_vlan_tpid_configure(hns, vlan_type, tpid);
        rte_spinlock_unlock(&hw->lock);
        return ret;
}

static int
hns3_set_vlan_rx_offload_cfg(struct hns3_adapter *hns,
                             struct hns3_rx_vtag_cfg *vcfg)
{
        struct hns3_vport_vtag_rx_cfg_cmd *req;
        struct hns3_hw *hw = &hns->hw;
        struct hns3_cmd_desc desc;
        uint16_t vport_id;
        uint8_t bitmap;
        int ret;

        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_VLAN_PORT_RX_CFG, false);

        req = (struct hns3_vport_vtag_rx_cfg_cmd *)desc.data;
        hns3_set_bit(req->vport_vlan_cfg, HNS3_REM_TAG1_EN_B,
                     vcfg->strip_tag1_en ? 1 : 0);
        hns3_set_bit(req->vport_vlan_cfg, HNS3_REM_TAG2_EN_B,
                     vcfg->strip_tag2_en ? 1 : 0);
        hns3_set_bit(req->vport_vlan_cfg, HNS3_SHOW_TAG1_EN_B,
                     vcfg->vlan1_vlan_prionly ? 1 : 0);
        hns3_set_bit(req->vport_vlan_cfg, HNS3_SHOW_TAG2_EN_B,
                     vcfg->vlan2_vlan_prionly ? 1 : 0);

        /* firmwall will ignore this configuration for PCI_REVISION_ID_HIP08 */
        hns3_set_bit(req->vport_vlan_cfg, HNS3_DISCARD_TAG1_EN_B,
                     vcfg->strip_tag1_discard_en ? 1 : 0);
        hns3_set_bit(req->vport_vlan_cfg, HNS3_DISCARD_TAG2_EN_B,
                     vcfg->strip_tag2_discard_en ? 1 : 0);
        /*
         * In current version VF is not supported when PF is driven by DPDK
         * driver, just need to configure parameters for PF vport.
         */
        vport_id = HNS3_PF_FUNC_ID;
        req->vf_offset = vport_id / HNS3_VF_NUM_PER_CMD;
        bitmap = 1 << (vport_id % HNS3_VF_NUM_PER_BYTE);
        req->vf_bitmap[req->vf_offset] = bitmap;

        ret = hns3_cmd_send(hw, &desc, 1);
        if (ret)
                hns3_err(hw, "Send port rxvlan cfg command fail, ret =%d", ret);
        return ret;
}

static void
hns3_update_rx_offload_cfg(struct hns3_adapter *hns,
                           struct hns3_rx_vtag_cfg *vcfg)
{
        struct hns3_pf *pf = &hns->pf;
        memcpy(&pf->vtag_config.rx_vcfg, vcfg, sizeof(pf->vtag_config.rx_vcfg));
}

static void
hns3_update_tx_offload_cfg(struct hns3_adapter *hns,
                           struct hns3_tx_vtag_cfg *vcfg)
{
        struct hns3_pf *pf = &hns->pf;
        memcpy(&pf->vtag_config.tx_vcfg, vcfg, sizeof(pf->vtag_config.tx_vcfg));
}

static int
hns3_en_hw_strip_rxvtag(struct hns3_adapter *hns, bool enable)
{
        struct hns3_rx_vtag_cfg rxvlan_cfg;
        struct hns3_hw *hw = &hns->hw;
        int ret;

        if (hw->port_base_vlan_cfg.state == HNS3_PORT_BASE_VLAN_DISABLE) {
                rxvlan_cfg.strip_tag1_en = false;
                rxvlan_cfg.strip_tag2_en = enable;
                rxvlan_cfg.strip_tag2_discard_en = false;
        } else {
                rxvlan_cfg.strip_tag1_en = enable;
                rxvlan_cfg.strip_tag2_en = true;
                rxvlan_cfg.strip_tag2_discard_en = true;
        }

        rxvlan_cfg.strip_tag1_discard_en = false;
        rxvlan_cfg.vlan1_vlan_prionly = false;
        rxvlan_cfg.vlan2_vlan_prionly = false;
        rxvlan_cfg.rx_vlan_offload_en = enable;

        ret = hns3_set_vlan_rx_offload_cfg(hns, &rxvlan_cfg);
        if (ret) {
                hns3_err(hw, "%s strip rx vtag failed, ret = %d.",
                                enable ? "enable" : "disable", ret);
                return ret;
        }

        hns3_update_rx_offload_cfg(hns, &rxvlan_cfg);

        return ret;
}

static int
hns3_set_vlan_filter_ctrl(struct hns3_hw *hw, uint8_t vlan_type,
                          uint8_t fe_type, bool filter_en, uint8_t vf_id)
{
        struct hns3_vlan_filter_ctrl_cmd *req;
        struct hns3_cmd_desc desc;
        int ret;

        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_VLAN_FILTER_CTRL, false);

        req = (struct hns3_vlan_filter_ctrl_cmd *)desc.data;
        req->vlan_type = vlan_type;
        req->vlan_fe = filter_en ? fe_type : 0;
        req->vf_id = vf_id;

        ret = hns3_cmd_send(hw, &desc, 1);
        if (ret)
                hns3_err(hw, "set vlan filter fail, ret =%d", ret);

        return ret;
}

static int
hns3_vlan_filter_init(struct hns3_adapter *hns)
{
        struct hns3_hw *hw = &hns->hw;
        int ret;

        ret = hns3_set_vlan_filter_ctrl(hw, HNS3_FILTER_TYPE_VF,
                                        HNS3_FILTER_FE_EGRESS, false,
                                        HNS3_PF_FUNC_ID);
        if (ret) {
                hns3_err(hw, "failed to init vf vlan filter, ret = %d", ret);
                return ret;
        }

        ret = hns3_set_vlan_filter_ctrl(hw, HNS3_FILTER_TYPE_PORT,
                                        HNS3_FILTER_FE_INGRESS, false,
                                        HNS3_PF_FUNC_ID);
        if (ret)
                hns3_err(hw, "failed to init port vlan filter, ret = %d", ret);

        return ret;
}

static int
hns3_enable_vlan_filter(struct hns3_adapter *hns, bool enable)
{
        struct hns3_hw *hw = &hns->hw;
        int ret;

        ret = hns3_set_vlan_filter_ctrl(hw, HNS3_FILTER_TYPE_PORT,
                                        HNS3_FILTER_FE_INGRESS, enable,
                                        HNS3_PF_FUNC_ID);
        if (ret)
                hns3_err(hw, "failed to %s port vlan filter, ret = %d",
                         enable ? "enable" : "disable", ret);

        return ret;
}

static int
hns3_vlan_offload_set(struct rte_eth_dev *dev, int mask)
{
        struct hns3_adapter *hns = dev->data->dev_private;
        struct hns3_hw *hw = &hns->hw;
        struct rte_eth_rxmode *rxmode;
        unsigned int tmp_mask;
        bool enable;
        int ret = 0;

        rte_spinlock_lock(&hw->lock);
        rxmode = &dev->data->dev_conf.rxmode;
        tmp_mask = (unsigned int)mask;
        if (tmp_mask & ETH_VLAN_FILTER_MASK) {
                /* ignore vlan filter configuration during promiscuous mode */
                if (!dev->data->promiscuous) {
                        /* Enable or disable VLAN filter */
                        enable = rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER ?
                                 true : false;

                        ret = hns3_enable_vlan_filter(hns, enable);
                        if (ret) {
                                rte_spinlock_unlock(&hw->lock);
                                hns3_err(hw, "failed to %s rx filter, ret = %d",
                                         enable ? "enable" : "disable", ret);
                                return ret;
                        }
                }
        }

        if (tmp_mask & ETH_VLAN_STRIP_MASK) {
                /* Enable or disable VLAN stripping */
                enable = rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP ?
                    true : false;

                ret = hns3_en_hw_strip_rxvtag(hns, enable);
                if (ret) {
                        rte_spinlock_unlock(&hw->lock);
                        hns3_err(hw, "failed to %s rx strip, ret = %d",
                                 enable ? "enable" : "disable", ret);
                        return ret;
                }
        }

        rte_spinlock_unlock(&hw->lock);

        return ret;
}

static int
hns3_set_vlan_tx_offload_cfg(struct hns3_adapter *hns,
                             struct hns3_tx_vtag_cfg *vcfg)
{
        struct hns3_vport_vtag_tx_cfg_cmd *req;
        struct hns3_cmd_desc desc;
        struct hns3_hw *hw = &hns->hw;
        uint16_t vport_id;
        uint8_t bitmap;
        int ret;

        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_VLAN_PORT_TX_CFG, false);

        req = (struct hns3_vport_vtag_tx_cfg_cmd *)desc.data;
        req->def_vlan_tag1 = vcfg->default_tag1;
        req->def_vlan_tag2 = vcfg->default_tag2;
        hns3_set_bit(req->vport_vlan_cfg, HNS3_ACCEPT_TAG1_B,
                     vcfg->accept_tag1 ? 1 : 0);
        hns3_set_bit(req->vport_vlan_cfg, HNS3_ACCEPT_UNTAG1_B,
                     vcfg->accept_untag1 ? 1 : 0);
        hns3_set_bit(req->vport_vlan_cfg, HNS3_ACCEPT_TAG2_B,
                     vcfg->accept_tag2 ? 1 : 0);
        hns3_set_bit(req->vport_vlan_cfg, HNS3_ACCEPT_UNTAG2_B,
                     vcfg->accept_untag2 ? 1 : 0);
        hns3_set_bit(req->vport_vlan_cfg, HNS3_PORT_INS_TAG1_EN_B,
                     vcfg->insert_tag1_en ? 1 : 0);
        hns3_set_bit(req->vport_vlan_cfg, HNS3_PORT_INS_TAG2_EN_B,
                     vcfg->insert_tag2_en ? 1 : 0);
        hns3_set_bit(req->vport_vlan_cfg, HNS3_CFG_NIC_ROCE_SEL_B, 0);

        /* firmwall will ignore this configuration for PCI_REVISION_ID_HIP08 */
        hns3_set_bit(req->vport_vlan_cfg, HNS3_TAG_SHIFT_MODE_EN_B,
                     vcfg->tag_shift_mode_en ? 1 : 0);

        /*
         * In current version VF is not supported when PF is driven by DPDK
         * driver, just need to configure parameters for PF vport.
         */
        vport_id = HNS3_PF_FUNC_ID;
        req->vf_offset = vport_id / HNS3_VF_NUM_PER_CMD;
        bitmap = 1 << (vport_id % HNS3_VF_NUM_PER_BYTE);
        req->vf_bitmap[req->vf_offset] = bitmap;

        ret = hns3_cmd_send(hw, &desc, 1);
        if (ret)
                hns3_err(hw, "Send port txvlan cfg command fail, ret =%d", ret);

        return ret;
}

static int
hns3_vlan_txvlan_cfg(struct hns3_adapter *hns, uint16_t port_base_vlan_state,
                     uint16_t pvid)
{
        struct hns3_hw *hw = &hns->hw;
        struct hns3_tx_vtag_cfg txvlan_cfg;
        int ret;

        if (port_base_vlan_state == HNS3_PORT_BASE_VLAN_DISABLE) {
                txvlan_cfg.accept_tag1 = true;
                txvlan_cfg.insert_tag1_en = false;
                txvlan_cfg.default_tag1 = 0;
        } else {
                txvlan_cfg.accept_tag1 =
                        hw->vlan_mode == HNS3_HW_SHIFT_AND_DISCARD_MODE;
                txvlan_cfg.insert_tag1_en = true;
                txvlan_cfg.default_tag1 = pvid;
        }

        txvlan_cfg.accept_untag1 = true;
        txvlan_cfg.accept_tag2 = true;
        txvlan_cfg.accept_untag2 = true;
        txvlan_cfg.insert_tag2_en = false;
        txvlan_cfg.default_tag2 = 0;
        txvlan_cfg.tag_shift_mode_en = true;

        ret = hns3_set_vlan_tx_offload_cfg(hns, &txvlan_cfg);
        if (ret) {
                hns3_err(hw, "pf vlan set pvid failed, pvid =%u ,ret =%d", pvid,
                         ret);
                return ret;
        }

        hns3_update_tx_offload_cfg(hns, &txvlan_cfg);
        return ret;
}


static void
hns3_rm_all_vlan_table(struct hns3_adapter *hns, bool is_del_list)
{
        struct hns3_user_vlan_table *vlan_entry;
        struct hns3_pf *pf = &hns->pf;

        LIST_FOREACH(vlan_entry, &pf->vlan_list, next) {
                if (vlan_entry->hd_tbl_status) {
                        hns3_set_port_vlan_filter(hns, vlan_entry->vlan_id, 0);
                        vlan_entry->hd_tbl_status = false;
                }
        }

        if (is_del_list) {
                vlan_entry = LIST_FIRST(&pf->vlan_list);
                while (vlan_entry) {
                        LIST_REMOVE(vlan_entry, next);
                        rte_free(vlan_entry);
                        vlan_entry = LIST_FIRST(&pf->vlan_list);
                }
        }
}

static void
hns3_add_all_vlan_table(struct hns3_adapter *hns)
{
        struct hns3_user_vlan_table *vlan_entry;
        struct hns3_pf *pf = &hns->pf;

        LIST_FOREACH(vlan_entry, &pf->vlan_list, next) {
                if (!vlan_entry->hd_tbl_status) {
                        hns3_set_port_vlan_filter(hns, vlan_entry->vlan_id, 1);
                        vlan_entry->hd_tbl_status = true;
                }
        }
}

static void
hns3_remove_all_vlan_table(struct hns3_adapter *hns)
{
        struct hns3_hw *hw = &hns->hw;
        int ret;

        hns3_rm_all_vlan_table(hns, true);
        if (hw->port_base_vlan_cfg.pvid != HNS3_INVALID_PVID) {
                ret = hns3_set_port_vlan_filter(hns,
                                                hw->port_base_vlan_cfg.pvid, 0);
                if (ret) {
                        hns3_err(hw, "Failed to remove all vlan table, ret =%d",
                                 ret);
                        return;
                }
        }
}

static int
hns3_update_vlan_filter_entries(struct hns3_adapter *hns,
                        uint16_t port_base_vlan_state, uint16_t new_pvid)
{
        struct hns3_hw *hw = &hns->hw;
        uint16_t old_pvid;
        int ret;

        if (port_base_vlan_state == HNS3_PORT_BASE_VLAN_ENABLE) {
                old_pvid = hw->port_base_vlan_cfg.pvid;
                if (old_pvid != HNS3_INVALID_PVID) {
                        ret = hns3_set_port_vlan_filter(hns, old_pvid, 0);
                        if (ret) {
                                hns3_err(hw, "failed to remove old pvid %u, "
                                                "ret = %d", old_pvid, ret);
                                return ret;
                        }
                }

                hns3_rm_all_vlan_table(hns, false);
                ret = hns3_set_port_vlan_filter(hns, new_pvid, 1);
                if (ret) {
                        hns3_err(hw, "failed to add new pvid %u, ret = %d",
                                        new_pvid, ret);
                        return ret;
                }
        } else {
                ret = hns3_set_port_vlan_filter(hns, new_pvid, 0);
                if (ret) {
                        hns3_err(hw, "failed to remove pvid %u, ret = %d",
                                        new_pvid, ret);
                        return ret;
                }

                hns3_add_all_vlan_table(hns);
        }
        return 0;
}

static int
hns3_en_pvid_strip(struct hns3_adapter *hns, int on)
{
        struct hns3_rx_vtag_cfg *old_cfg = &hns->pf.vtag_config.rx_vcfg;
        struct hns3_rx_vtag_cfg rx_vlan_cfg;
        bool rx_strip_en;
        int ret;

        rx_strip_en = old_cfg->rx_vlan_offload_en;
        if (on) {
                rx_vlan_cfg.strip_tag1_en = rx_strip_en;
                rx_vlan_cfg.strip_tag2_en = true;
                rx_vlan_cfg.strip_tag2_discard_en = true;
        } else {
                rx_vlan_cfg.strip_tag1_en = false;
                rx_vlan_cfg.strip_tag2_en = rx_strip_en;
                rx_vlan_cfg.strip_tag2_discard_en = false;
        }
        rx_vlan_cfg.strip_tag1_discard_en = false;
        rx_vlan_cfg.vlan1_vlan_prionly = false;
        rx_vlan_cfg.vlan2_vlan_prionly = false;
        rx_vlan_cfg.rx_vlan_offload_en = old_cfg->rx_vlan_offload_en;

        ret = hns3_set_vlan_rx_offload_cfg(hns, &rx_vlan_cfg);
        if (ret)
                return ret;

        hns3_update_rx_offload_cfg(hns, &rx_vlan_cfg);
        return ret;
}

static int
hns3_vlan_pvid_configure(struct hns3_adapter *hns, uint16_t pvid, int on)
{
        struct hns3_hw *hw = &hns->hw;
        uint16_t port_base_vlan_state;
        int ret, err;

        if (on == 0 && pvid != hw->port_base_vlan_cfg.pvid) {
                if (hw->port_base_vlan_cfg.pvid != HNS3_INVALID_PVID)
                        hns3_warn(hw, "Invalid operation! As current pvid set "
                                  "is %u, disable pvid %u is invalid",
                                  hw->port_base_vlan_cfg.pvid, pvid);
                return 0;
        }

        port_base_vlan_state = on ? HNS3_PORT_BASE_VLAN_ENABLE :
                                    HNS3_PORT_BASE_VLAN_DISABLE;
        ret = hns3_vlan_txvlan_cfg(hns, port_base_vlan_state, pvid);
        if (ret) {
                hns3_err(hw, "failed to config tx vlan for pvid, ret = %d",
                         ret);
                return ret;
        }

        ret = hns3_en_pvid_strip(hns, on);

        if (ret) {
                hns3_err(hw, "failed to config rx vlan strip for pvid, "
                         "ret = %d", ret);
                goto pvid_vlan_strip_fail;
        }

        if (pvid == HNS3_INVALID_PVID)
                goto out;
        ret = hns3_update_vlan_filter_entries(hns, port_base_vlan_state, pvid);
        if (ret) {
                hns3_err(hw, "failed to update vlan filter entries, ret = %d",
                         ret);
                goto vlan_filter_set_fail;
        }

out:
        hw->port_base_vlan_cfg.state = port_base_vlan_state;
        hw->port_base_vlan_cfg.pvid = on ? pvid : HNS3_INVALID_PVID;
        return ret;

vlan_filter_set_fail:
        err = hns3_en_pvid_strip(hns, hw->port_base_vlan_cfg.state ==
                                        HNS3_PORT_BASE_VLAN_ENABLE);
        if (err)
                hns3_err(hw, "fail to rollback pvid strip, ret = %d", err);

pvid_vlan_strip_fail:
        err = hns3_vlan_txvlan_cfg(hns, hw->port_base_vlan_cfg.state,
                                        hw->port_base_vlan_cfg.pvid);
        if (err)
                hns3_err(hw, "fail to rollback txvlan status, ret = %d", err);

        return ret;
}

static int
hns3_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
{
        struct hns3_adapter *hns = dev->data->dev_private;
        struct hns3_hw *hw = &hns->hw;
        bool pvid_en_state_change;
        uint16_t pvid_state;
        int ret;

        if (pvid > RTE_ETHER_MAX_VLAN_ID) {
                hns3_err(hw, "Invalid vlan_id = %u > %d", pvid,
                         RTE_ETHER_MAX_VLAN_ID);
                return -EINVAL;
        }

        /*
         * If PVID configuration state change, should refresh the PVID
         * configuration state in struct hns3_tx_queue/hns3_rx_queue.
         */
        pvid_state = hw->port_base_vlan_cfg.state;
        if ((on && pvid_state == HNS3_PORT_BASE_VLAN_ENABLE) ||
            (!on && pvid_state == HNS3_PORT_BASE_VLAN_DISABLE))
                pvid_en_state_change = false;
        else
                pvid_en_state_change = true;

        rte_spinlock_lock(&hw->lock);
        ret = hns3_vlan_pvid_configure(hns, pvid, on);
        rte_spinlock_unlock(&hw->lock);
        if (ret)
                return ret;
        /*
         * Only in HNS3_SW_SHIFT_AND_MODE the PVID related operation in Tx/Rx
         * need be processed by PMD driver.
         */
        if (pvid_en_state_change &&
            hw->vlan_mode == HNS3_SW_SHIFT_AND_DISCARD_MODE)
                hns3_update_all_queues_pvid_proc_en(hw);

        return 0;
}

static int
hns3_default_vlan_config(struct hns3_adapter *hns)
{
        struct hns3_hw *hw = &hns->hw;
        int ret;

        /*
         * When vlan filter is enabled, hardware regards packets without vlan
         * as packets with vlan 0. Therefore, if vlan 0 is not in the vlan
         * table, packets without vlan won't be received. So, add vlan 0 as
         * the default vlan.
         */
        ret = hns3_vlan_filter_configure(hns, 0, 1);
        if (ret)
                hns3_err(hw, "default vlan 0 config failed, ret =%d", ret);
        return ret;
}

static int
hns3_init_vlan_config(struct hns3_adapter *hns)
{
        struct hns3_hw *hw = &hns->hw;
        int ret;

        /*
         * This function can be called in the initialization and reset process,
         * when in reset process, it means that hardware had been reseted
         * successfully and we need to restore the hardware configuration to
         * ensure that the hardware configuration remains unchanged before and
         * after reset.
         */
        if (__atomic_load_n(&hw->reset.resetting, __ATOMIC_RELAXED) == 0) {
                hw->port_base_vlan_cfg.state = HNS3_PORT_BASE_VLAN_DISABLE;
                hw->port_base_vlan_cfg.pvid = HNS3_INVALID_PVID;
        }

        ret = hns3_vlan_filter_init(hns);
        if (ret) {
                hns3_err(hw, "vlan init fail in pf, ret =%d", ret);
                return ret;
        }

        ret = hns3_vlan_tpid_configure(hns, ETH_VLAN_TYPE_INNER,
                                       RTE_ETHER_TYPE_VLAN);
        if (ret) {
                hns3_err(hw, "tpid set fail in pf, ret =%d", ret);
                return ret;
        }

        /*
         * When in the reinit dev stage of the reset process, the following
         * vlan-related configurations may differ from those at initialization,
         * we will restore configurations to hardware in hns3_restore_vlan_table
         * and hns3_restore_vlan_conf later.
         */
        if (__atomic_load_n(&hw->reset.resetting, __ATOMIC_RELAXED) == 0) {
                ret = hns3_vlan_pvid_configure(hns, HNS3_INVALID_PVID, 0);
                if (ret) {
                        hns3_err(hw, "pvid set fail in pf, ret =%d", ret);
                        return ret;
                }

                ret = hns3_en_hw_strip_rxvtag(hns, false);
                if (ret) {
                        hns3_err(hw, "rx strip configure fail in pf, ret =%d",
                                 ret);
                        return ret;
                }
        }

        return hns3_default_vlan_config(hns);
}

static int
hns3_restore_vlan_conf(struct hns3_adapter *hns)
{
        struct hns3_pf *pf = &hns->pf;
        struct hns3_hw *hw = &hns->hw;
        uint64_t offloads;
        bool enable;
        int ret;

        if (!hw->data->promiscuous) {
                /* restore vlan filter states */
                offloads = hw->data->dev_conf.rxmode.offloads;
                enable = offloads & DEV_RX_OFFLOAD_VLAN_FILTER ? true : false;
                ret = hns3_enable_vlan_filter(hns, enable);
                if (ret) {
                        hns3_err(hw, "failed to restore vlan rx filter conf, "
                                 "ret = %d", ret);
                        return ret;
                }
        }

        ret = hns3_set_vlan_rx_offload_cfg(hns, &pf->vtag_config.rx_vcfg);
        if (ret) {
                hns3_err(hw, "failed to restore vlan rx conf, ret = %d", ret);
                return ret;
        }

        ret = hns3_set_vlan_tx_offload_cfg(hns, &pf->vtag_config.tx_vcfg);
        if (ret)
                hns3_err(hw, "failed to restore vlan tx conf, ret = %d", ret);

        return ret;
}

static int
hns3_dev_configure_vlan(struct rte_eth_dev *dev)
{
        struct hns3_adapter *hns = dev->data->dev_private;
        struct rte_eth_dev_data *data = dev->data;
        struct rte_eth_txmode *txmode;
        struct hns3_hw *hw = &hns->hw;
        int mask;
        int ret;

        txmode = &data->dev_conf.txmode;
        if (txmode->hw_vlan_reject_tagged || txmode->hw_vlan_reject_untagged)
                hns3_warn(hw,
                          "hw_vlan_reject_tagged or hw_vlan_reject_untagged "
                          "configuration is not supported! Ignore these two "
                          "parameters: hw_vlan_reject_tagged(%u), "
                          "hw_vlan_reject_untagged(%u)",
                          txmode->hw_vlan_reject_tagged,
                          txmode->hw_vlan_reject_untagged);

        /* Apply vlan offload setting */
        mask = ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK;
        ret = hns3_vlan_offload_set(dev, mask);
        if (ret) {
                hns3_err(hw, "dev config rx vlan offload failed, ret = %d",
                         ret);
                return ret;
        }

        /*
         * If pvid config is not set in rte_eth_conf, driver needn't to set
         * VLAN pvid related configuration to hardware.
         */
        if (txmode->pvid == 0 && txmode->hw_vlan_insert_pvid == 0)
                return 0;

        /* Apply pvid setting */
        ret = hns3_vlan_pvid_set(dev, txmode->pvid,
                                 txmode->hw_vlan_insert_pvid);
        if (ret)
                hns3_err(hw, "dev config vlan pvid(%u) failed, ret = %d",
                         txmode->pvid, ret);

        return ret;
}

static int
hns3_config_tso(struct hns3_hw *hw, unsigned int tso_mss_min,
                unsigned int tso_mss_max)
{
        struct hns3_cfg_tso_status_cmd *req;
        struct hns3_cmd_desc desc;
        uint16_t tso_mss;

        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_TSO_GENERIC_CONFIG, false);

        req = (struct hns3_cfg_tso_status_cmd *)desc.data;

        tso_mss = 0;
        hns3_set_field(tso_mss, HNS3_TSO_MSS_MIN_M, HNS3_TSO_MSS_MIN_S,
                       tso_mss_min);
        req->tso_mss_min = rte_cpu_to_le_16(tso_mss);

        tso_mss = 0;
        hns3_set_field(tso_mss, HNS3_TSO_MSS_MIN_M, HNS3_TSO_MSS_MIN_S,
                       tso_mss_max);
        req->tso_mss_max = rte_cpu_to_le_16(tso_mss);

        return hns3_cmd_send(hw, &desc, 1);
}

static int
hns3_set_umv_space(struct hns3_hw *hw, uint16_t space_size,
                   uint16_t *allocated_size, bool is_alloc)
{
        struct hns3_umv_spc_alc_cmd *req;
        struct hns3_cmd_desc desc;
        int ret;

        req = (struct hns3_umv_spc_alc_cmd *)desc.data;
        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MAC_VLAN_ALLOCATE, false);
        hns3_set_bit(req->allocate, HNS3_UMV_SPC_ALC_B, is_alloc ? 0 : 1);
        req->space_size = rte_cpu_to_le_32(space_size);

        ret = hns3_cmd_send(hw, &desc, 1);
        if (ret) {
                PMD_INIT_LOG(ERR, "%s umv space failed for cmd_send, ret =%d",
                             is_alloc ? "allocate" : "free", ret);
                return ret;
        }

        if (is_alloc && allocated_size)
                *allocated_size = rte_le_to_cpu_32(desc.data[1]);

        return 0;
}

static int
hns3_init_umv_space(struct hns3_hw *hw)
{
        struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
        struct hns3_pf *pf = &hns->pf;
        uint16_t allocated_size = 0;
        int ret;

        ret = hns3_set_umv_space(hw, pf->wanted_umv_size, &allocated_size,
                                 true);
        if (ret)
                return ret;

        if (allocated_size < pf->wanted_umv_size)
                PMD_INIT_LOG(WARNING, "Alloc umv space failed, want %u, get %u",
                             pf->wanted_umv_size, allocated_size);

        pf->max_umv_size = (!!allocated_size) ? allocated_size :
                                                pf->wanted_umv_size;
        pf->used_umv_size = 0;
        return 0;
}

static int
hns3_uninit_umv_space(struct hns3_hw *hw)
{
        struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
        struct hns3_pf *pf = &hns->pf;
        int ret;

        if (pf->max_umv_size == 0)
                return 0;

        ret = hns3_set_umv_space(hw, pf->max_umv_size, NULL, false);
        if (ret)
                return ret;

        pf->max_umv_size = 0;

        return 0;
}

static bool
hns3_is_umv_space_full(struct hns3_hw *hw)
{
        struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
        struct hns3_pf *pf = &hns->pf;
        bool is_full;

        is_full = (pf->used_umv_size >= pf->max_umv_size);

        return is_full;
}

static void
hns3_update_umv_space(struct hns3_hw *hw, bool is_free)
{
        struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
        struct hns3_pf *pf = &hns->pf;

        if (is_free) {
                if (pf->used_umv_size > 0)
                        pf->used_umv_size--;
        } else
                pf->used_umv_size++;
}

static void
hns3_prepare_mac_addr(struct hns3_mac_vlan_tbl_entry_cmd *new_req,
                      const uint8_t *addr, bool is_mc)
{
        const unsigned char *mac_addr = addr;
        uint32_t high_val = ((uint32_t)mac_addr[3] << 24) |
                            ((uint32_t)mac_addr[2] << 16) |
                            ((uint32_t)mac_addr[1] << 8) |
                            (uint32_t)mac_addr[0];
        uint32_t low_val = ((uint32_t)mac_addr[5] << 8) | (uint32_t)mac_addr[4];

        hns3_set_bit(new_req->flags, HNS3_MAC_VLAN_BIT0_EN_B, 1);
        if (is_mc) {
                hns3_set_bit(new_req->entry_type, HNS3_MAC_VLAN_BIT0_EN_B, 0);
                hns3_set_bit(new_req->entry_type, HNS3_MAC_VLAN_BIT1_EN_B, 1);
                hns3_set_bit(new_req->mc_mac_en, HNS3_MAC_VLAN_BIT0_EN_B, 1);
        }

        new_req->mac_addr_hi32 = rte_cpu_to_le_32(high_val);
        new_req->mac_addr_lo16 = rte_cpu_to_le_16(low_val & 0xffff);
}

static int
hns3_get_mac_vlan_cmd_status(struct hns3_hw *hw, uint16_t cmdq_resp,
                             uint8_t resp_code,
                             enum hns3_mac_vlan_tbl_opcode op)
{
        if (cmdq_resp) {
                hns3_err(hw, "cmdq execute failed for get_mac_vlan_cmd_status,status=%u",
                         cmdq_resp);
                return -EIO;
        }

        if (op == HNS3_MAC_VLAN_ADD) {
                if (resp_code == 0 || resp_code == 1) {
                        return 0;
                } else if (resp_code == HNS3_ADD_UC_OVERFLOW) {
                        hns3_err(hw, "add mac addr failed for uc_overflow");
                        return -ENOSPC;
                } else if (resp_code == HNS3_ADD_MC_OVERFLOW) {
                        hns3_err(hw, "add mac addr failed for mc_overflow");
                        return -ENOSPC;
                }

                hns3_err(hw, "add mac addr failed for undefined, code=%u",
                         resp_code);
                return -EIO;
        } else if (op == HNS3_MAC_VLAN_REMOVE) {
                if (resp_code == 0) {
                        return 0;
                } else if (resp_code == 1) {
                        hns3_dbg(hw, "remove mac addr failed for miss");
                        return -ENOENT;
                }

                hns3_err(hw, "remove mac addr failed for undefined, code=%u",
                         resp_code);
                return -EIO;
        } else if (op == HNS3_MAC_VLAN_LKUP) {
                if (resp_code == 0) {
                        return 0;
                } else if (resp_code == 1) {
                        hns3_dbg(hw, "lookup mac addr failed for miss");
                        return -ENOENT;
                }

                hns3_err(hw, "lookup mac addr failed for undefined, code=%u",
                         resp_code);
                return -EIO;
        }

        hns3_err(hw, "unknown opcode for get_mac_vlan_cmd_status, opcode=%u",
                 op);

        return -EINVAL;
}

static int
hns3_lookup_mac_vlan_tbl(struct hns3_hw *hw,
                         struct hns3_mac_vlan_tbl_entry_cmd *req,
                         struct hns3_cmd_desc *desc, bool is_mc)
{
        uint8_t resp_code;
        uint16_t retval;
        int ret;

        hns3_cmd_setup_basic_desc(&desc[0], HNS3_OPC_MAC_VLAN_ADD, true);
        if (is_mc) {
                desc[0].flag |= rte_cpu_to_le_16(HNS3_CMD_FLAG_NEXT);
                memcpy(desc[0].data, req,
                           sizeof(struct hns3_mac_vlan_tbl_entry_cmd));
                hns3_cmd_setup_basic_desc(&desc[1], HNS3_OPC_MAC_VLAN_ADD,
                                          true);
                desc[1].flag |= rte_cpu_to_le_16(HNS3_CMD_FLAG_NEXT);
                hns3_cmd_setup_basic_desc(&desc[2], HNS3_OPC_MAC_VLAN_ADD,
                                          true);
                ret = hns3_cmd_send(hw, desc, HNS3_MC_MAC_VLAN_ADD_DESC_NUM);
        } else {
                memcpy(desc[0].data, req,
                       sizeof(struct hns3_mac_vlan_tbl_entry_cmd));
                ret = hns3_cmd_send(hw, desc, 1);
        }
        if (ret) {
                hns3_err(hw, "lookup mac addr failed for cmd_send, ret =%d.",
                         ret);
                return ret;
        }
        resp_code = (rte_le_to_cpu_32(desc[0].data[0]) >> 8) & 0xff;
        retval = rte_le_to_cpu_16(desc[0].retval);

        return hns3_get_mac_vlan_cmd_status(hw, retval, resp_code,
                                            HNS3_MAC_VLAN_LKUP);
}

static int
hns3_add_mac_vlan_tbl(struct hns3_hw *hw,
                      struct hns3_mac_vlan_tbl_entry_cmd *req,
                      struct hns3_cmd_desc *mc_desc)
{
        uint8_t resp_code;
        uint16_t retval;
        int cfg_status;
        int ret;

        if (mc_desc == NULL) {
                struct hns3_cmd_desc desc;

                hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MAC_VLAN_ADD, false);
                memcpy(desc.data, req,
                       sizeof(struct hns3_mac_vlan_tbl_entry_cmd));
                ret = hns3_cmd_send(hw, &desc, 1);
                resp_code = (rte_le_to_cpu_32(desc.data[0]) >> 8) & 0xff;
                retval = rte_le_to_cpu_16(desc.retval);

                cfg_status = hns3_get_mac_vlan_cmd_status(hw, retval, resp_code,
                                                          HNS3_MAC_VLAN_ADD);
        } else {
                hns3_cmd_reuse_desc(&mc_desc[0], false);
                mc_desc[0].flag |= rte_cpu_to_le_16(HNS3_CMD_FLAG_NEXT);
                hns3_cmd_reuse_desc(&mc_desc[1], false);
                mc_desc[1].flag |= rte_cpu_to_le_16(HNS3_CMD_FLAG_NEXT);
                hns3_cmd_reuse_desc(&mc_desc[2], false);
                mc_desc[2].flag &= rte_cpu_to_le_16(~HNS3_CMD_FLAG_NEXT);
                memcpy(mc_desc[0].data, req,
                       sizeof(struct hns3_mac_vlan_tbl_entry_cmd));
                mc_desc[0].retval = 0;
                ret = hns3_cmd_send(hw, mc_desc, HNS3_MC_MAC_VLAN_ADD_DESC_NUM);
                resp_code = (rte_le_to_cpu_32(mc_desc[0].data[0]) >> 8) & 0xff;
                retval = rte_le_to_cpu_16(mc_desc[0].retval);

                cfg_status = hns3_get_mac_vlan_cmd_status(hw, retval, resp_code,
                                                          HNS3_MAC_VLAN_ADD);
        }

        if (ret) {
                hns3_err(hw, "add mac addr failed for cmd_send, ret =%d", ret);
                return ret;
        }

        return cfg_status;
}

static int
hns3_remove_mac_vlan_tbl(struct hns3_hw *hw,
                         struct hns3_mac_vlan_tbl_entry_cmd *req)
{
        struct hns3_cmd_desc desc;
        uint8_t resp_code;
        uint16_t retval;
        int ret;

        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MAC_VLAN_REMOVE, false);

        memcpy(desc.data, req, sizeof(struct hns3_mac_vlan_tbl_entry_cmd));

        ret = hns3_cmd_send(hw, &desc, 1);
        if (ret) {
                hns3_err(hw, "del mac addr failed for cmd_send, ret =%d", ret);
                return ret;
        }
        resp_code = (rte_le_to_cpu_32(desc.data[0]) >> 8) & 0xff;
        retval = rte_le_to_cpu_16(desc.retval);

        return hns3_get_mac_vlan_cmd_status(hw, retval, resp_code,
                                            HNS3_MAC_VLAN_REMOVE);
}

static int
hns3_add_uc_addr_common(struct hns3_hw *hw, struct rte_ether_addr *mac_addr)
{
        struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
        struct hns3_mac_vlan_tbl_entry_cmd req;
        struct hns3_pf *pf = &hns->pf;
        struct hns3_cmd_desc desc[3];
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        uint16_t egress_port = 0;
        uint8_t vf_id;
        int ret;

        /* check if mac addr is valid */
        if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_err(hw, "Add unicast mac addr err! addr(%s) invalid",
                         mac_str);
                return -EINVAL;
        }

        memset(&req, 0, sizeof(req));

        /*
         * In current version VF is not supported when PF is driven by DPDK
         * driver, just need to configure parameters for PF vport.
         */
        vf_id = HNS3_PF_FUNC_ID;
        hns3_set_field(egress_port, HNS3_MAC_EPORT_VFID_M,
                       HNS3_MAC_EPORT_VFID_S, vf_id);

        req.egress_port = rte_cpu_to_le_16(egress_port);

        hns3_prepare_mac_addr(&req, mac_addr->addr_bytes, false);

        /*
         * Lookup the mac address in the mac_vlan table, and add
         * it if the entry is inexistent. Repeated unicast entry
         * is not allowed in the mac vlan table.
         */
        ret = hns3_lookup_mac_vlan_tbl(hw, &req, desc, false);
        if (ret == -ENOENT) {
                if (!hns3_is_umv_space_full(hw)) {
                        ret = hns3_add_mac_vlan_tbl(hw, &req, NULL);
                        if (!ret)
                                hns3_update_umv_space(hw, false);
                        return ret;
                }

                hns3_err(hw, "UC MAC table full(%u)", pf->used_umv_size);

                return -ENOSPC;
        }

        hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE, mac_addr);

        /* check if we just hit the duplicate */
        if (ret == 0) {
                hns3_dbg(hw, "mac addr(%s) has been in the MAC table", mac_str);
                return 0;
        }

        hns3_err(hw, "PF failed to add unicast entry(%s) in the MAC table",
                 mac_str);

        return ret;
}

static int
hns3_add_mc_addr_common(struct hns3_hw *hw, struct rte_ether_addr *mac_addr)
{
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        struct rte_ether_addr *addr;
        int ret;
        int i;

        for (i = 0; i < hw->mc_addrs_num; i++) {
                addr = &hw->mc_addrs[i];
                /* Check if there are duplicate addresses */
                if (rte_is_same_ether_addr(addr, mac_addr)) {
                        hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                              addr);
                        hns3_err(hw, "failed to add mc mac addr, same addrs"
                                 "(%s) is added by the set_mc_mac_addr_list "
                                 "API", mac_str);
                        return -EINVAL;
                }
        }

        ret = hns3_add_mc_addr(hw, mac_addr);
        if (ret) {
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_err(hw, "failed to add mc mac addr(%s), ret = %d",
                         mac_str, ret);
        }
        return ret;
}

static int
hns3_remove_mc_addr_common(struct hns3_hw *hw, struct rte_ether_addr *mac_addr)
{
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        int ret;

        ret = hns3_remove_mc_addr(hw, mac_addr);
        if (ret) {
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_err(hw, "failed to remove mc mac addr(%s), ret = %d",
                         mac_str, ret);
        }
        return ret;
}

static int
hns3_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
                  uint32_t idx, __rte_unused uint32_t pool)
{
        struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        int ret;

        rte_spinlock_lock(&hw->lock);

        /*
         * In hns3 network engine adding UC and MC mac address with different
         * commands with firmware. We need to determine whether the input
         * address is a UC or a MC address to call different commands.
         * By the way, it is recommended calling the API function named
         * rte_eth_dev_set_mc_addr_list to set the MC mac address, because
         * using the rte_eth_dev_mac_addr_add API function to set MC mac address
         * may affect the specifications of UC mac addresses.
         */
        if (rte_is_multicast_ether_addr(mac_addr))
                ret = hns3_add_mc_addr_common(hw, mac_addr);
        else
                ret = hns3_add_uc_addr_common(hw, mac_addr);

        if (ret) {
                rte_spinlock_unlock(&hw->lock);
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_err(hw, "failed to add mac addr(%s), ret = %d", mac_str,
                         ret);
                return ret;
        }

        if (idx == 0)
                hw->mac.default_addr_setted = true;
        rte_spinlock_unlock(&hw->lock);

        return ret;
}

static int
hns3_remove_uc_addr_common(struct hns3_hw *hw, struct rte_ether_addr *mac_addr)
{
        struct hns3_mac_vlan_tbl_entry_cmd req;
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        int ret;

        /* check if mac addr is valid */
        if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_err(hw, "remove unicast mac addr err! addr(%s) invalid",
                         mac_str);
                return -EINVAL;
        }

        memset(&req, 0, sizeof(req));
        hns3_set_bit(req.entry_type, HNS3_MAC_VLAN_BIT0_EN_B, 0);
        hns3_prepare_mac_addr(&req, mac_addr->addr_bytes, false);
        ret = hns3_remove_mac_vlan_tbl(hw, &req);
        if (ret == -ENOENT) /* mac addr isn't existent in the mac vlan table. */
                return 0;
        else if (ret == 0)
                hns3_update_umv_space(hw, true);

        return ret;
}

static void
hns3_remove_mac_addr(struct rte_eth_dev *dev, uint32_t idx)
{
        struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        /* index will be checked by upper level rte interface */
        struct rte_ether_addr *mac_addr = &dev->data->mac_addrs[idx];
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        int ret;

        rte_spinlock_lock(&hw->lock);

        if (rte_is_multicast_ether_addr(mac_addr))
                ret = hns3_remove_mc_addr_common(hw, mac_addr);
        else
                ret = hns3_remove_uc_addr_common(hw, mac_addr);
        rte_spinlock_unlock(&hw->lock);
        if (ret) {
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_err(hw, "failed to remove mac addr(%s), ret = %d", mac_str,
                         ret);
        }
}

static int
hns3_set_default_mac_addr(struct rte_eth_dev *dev,
                          struct rte_ether_addr *mac_addr)
{
        struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        struct rte_ether_addr *oaddr;
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        bool default_addr_setted;
        int ret, ret_val;

        /*
         * It has been guaranteed that input parameter named mac_addr is valid
         * address in the rte layer of DPDK framework.
         */
        oaddr = (struct rte_ether_addr *)hw->mac.mac_addr;
        default_addr_setted = hw->mac.default_addr_setted;
        if (default_addr_setted && !!rte_is_same_ether_addr(mac_addr, oaddr))
                return 0;

        rte_spinlock_lock(&hw->lock);
        if (default_addr_setted) {
                ret = hns3_remove_uc_addr_common(hw, oaddr);
                if (ret) {
                        hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                              oaddr);
                        hns3_warn(hw, "Remove old uc mac address(%s) fail: %d",
                                  mac_str, ret);

                        rte_spinlock_unlock(&hw->lock);
                        return ret;
                }
        }

        ret = hns3_add_uc_addr_common(hw, mac_addr);
        if (ret) {
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_err(hw, "Failed to set mac addr(%s): %d", mac_str, ret);
                goto err_add_uc_addr;
        }

        ret = hns3_pause_addr_cfg(hw, mac_addr->addr_bytes);
        if (ret) {
                hns3_err(hw, "Failed to configure mac pause address: %d", ret);
                goto err_pause_addr_cfg;
        }

        rte_ether_addr_copy(mac_addr,
                            (struct rte_ether_addr *)hw->mac.mac_addr);
        hw->mac.default_addr_setted = true;
        rte_spinlock_unlock(&hw->lock);

        return 0;

err_pause_addr_cfg:
        ret_val = hns3_remove_uc_addr_common(hw, mac_addr);
        if (ret_val) {
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_warn(hw,
                          "Failed to roll back to del setted mac addr(%s): %d",
                          mac_str, ret_val);
        }

err_add_uc_addr:
        ret_val = hns3_add_uc_addr_common(hw, oaddr);
        if (ret_val) {
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE, oaddr);
                hns3_warn(hw, "Failed to restore old uc mac addr(%s): %d",
                                  mac_str, ret_val);
                hw->mac.default_addr_setted = false;
        }
        rte_spinlock_unlock(&hw->lock);

        return ret;
}

static int
hns3_configure_all_mac_addr(struct hns3_adapter *hns, bool del)
{
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        struct hns3_hw *hw = &hns->hw;
        struct rte_ether_addr *addr;
        int err = 0;
        int ret;
        int i;

        for (i = 0; i < HNS3_UC_MACADDR_NUM; i++) {
                addr = &hw->data->mac_addrs[i];
                if (rte_is_zero_ether_addr(addr))
                        continue;
                if (rte_is_multicast_ether_addr(addr))
                        ret = del ? hns3_remove_mc_addr(hw, addr) :
                              hns3_add_mc_addr(hw, addr);
                else
                        ret = del ? hns3_remove_uc_addr_common(hw, addr) :
                              hns3_add_uc_addr_common(hw, addr);

                if (ret) {
                        err = ret;
                        hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                              addr);
                        hns3_err(hw, "failed to %s mac addr(%s) index:%d "
                                 "ret = %d.", del ? "remove" : "restore",
                                 mac_str, i, ret);
                }
        }
        return err;
}

static void
hns3_update_desc_vfid(struct hns3_cmd_desc *desc, uint8_t vfid, bool clr)
{
#define HNS3_VF_NUM_IN_FIRST_DESC 192
        uint8_t word_num;
        uint8_t bit_num;

        if (vfid < HNS3_VF_NUM_IN_FIRST_DESC) {
                word_num = vfid / 32;
                bit_num = vfid % 32;
                if (clr)
                        desc[1].data[word_num] &=
                            rte_cpu_to_le_32(~(1UL << bit_num));
                else
                        desc[1].data[word_num] |=
                            rte_cpu_to_le_32(1UL << bit_num);
        } else {
                word_num = (vfid - HNS3_VF_NUM_IN_FIRST_DESC) / 32;
                bit_num = vfid % 32;
                if (clr)
                        desc[2].data[word_num] &=
                            rte_cpu_to_le_32(~(1UL << bit_num));
                else
                        desc[2].data[word_num] |=
                            rte_cpu_to_le_32(1UL << bit_num);
        }
}

static int
hns3_add_mc_addr(struct hns3_hw *hw, struct rte_ether_addr *mac_addr)
{
        struct hns3_mac_vlan_tbl_entry_cmd req;
        struct hns3_cmd_desc desc[3];
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        uint8_t vf_id;
        int ret;

        /* Check if mac addr is valid */
        if (!rte_is_multicast_ether_addr(mac_addr)) {
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_err(hw, "failed to add mc mac addr, addr(%s) invalid",
                         mac_str);
                return -EINVAL;
        }

        memset(&req, 0, sizeof(req));
        hns3_set_bit(req.entry_type, HNS3_MAC_VLAN_BIT0_EN_B, 0);
        hns3_prepare_mac_addr(&req, mac_addr->addr_bytes, true);
        ret = hns3_lookup_mac_vlan_tbl(hw, &req, desc, true);
        if (ret) {
                /* This mac addr do not exist, add new entry for it */
                memset(desc[0].data, 0, sizeof(desc[0].data));
                memset(desc[1].data, 0, sizeof(desc[0].data));
                memset(desc[2].data, 0, sizeof(desc[0].data));
        }

        /*
         * In current version VF is not supported when PF is driven by DPDK
         * driver, just need to configure parameters for PF vport.
         */
        vf_id = HNS3_PF_FUNC_ID;
        hns3_update_desc_vfid(desc, vf_id, false);
        ret = hns3_add_mac_vlan_tbl(hw, &req, desc);
        if (ret) {
                if (ret == -ENOSPC)
                        hns3_err(hw, "mc mac vlan table is full");
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_err(hw, "failed to add mc mac addr(%s): %d", mac_str, ret);
        }

        return ret;
}

static int
hns3_remove_mc_addr(struct hns3_hw *hw, struct rte_ether_addr *mac_addr)
{
        struct hns3_mac_vlan_tbl_entry_cmd req;
        struct hns3_cmd_desc desc[3];
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        uint8_t vf_id;
        int ret;

        /* Check if mac addr is valid */
        if (!rte_is_multicast_ether_addr(mac_addr)) {
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_err(hw, "Failed to rm mc mac addr, addr(%s) invalid",
                         mac_str);
                return -EINVAL;
        }

        memset(&req, 0, sizeof(req));
        hns3_set_bit(req.entry_type, HNS3_MAC_VLAN_BIT0_EN_B, 0);
        hns3_prepare_mac_addr(&req, mac_addr->addr_bytes, true);
        ret = hns3_lookup_mac_vlan_tbl(hw, &req, desc, true);
        if (ret == 0) {
                /*
                 * This mac addr exist, remove this handle's VFID for it.
                 * In current version VF is not supported when PF is driven by
                 * DPDK driver, just need to configure parameters for PF vport.
                 */
                vf_id = HNS3_PF_FUNC_ID;
                hns3_update_desc_vfid(desc, vf_id, true);

                /* All the vfid is zero, so need to delete this entry */
                ret = hns3_remove_mac_vlan_tbl(hw, &req);
        } else if (ret == -ENOENT) {
                /* This mac addr doesn't exist. */
                return 0;
        }

        if (ret) {
                hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                      mac_addr);
                hns3_err(hw, "Failed to rm mc mac addr(%s): %d", mac_str, ret);
        }

        return ret;
}

static int
hns3_set_mc_addr_chk_param(struct hns3_hw *hw,
                           struct rte_ether_addr *mc_addr_set,
                           uint32_t nb_mc_addr)
{
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        struct rte_ether_addr *addr;
        uint32_t i;
        uint32_t j;

        if (nb_mc_addr > HNS3_MC_MACADDR_NUM) {
                hns3_err(hw, "failed to set mc mac addr, nb_mc_addr(%u) "
                         "invalid. valid range: 0~%d",
                         nb_mc_addr, HNS3_MC_MACADDR_NUM);
                return -EINVAL;
        }

        /* Check if input mac addresses are valid */
        for (i = 0; i < nb_mc_addr; i++) {
                addr = &mc_addr_set[i];
                if (!rte_is_multicast_ether_addr(addr)) {
                        hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                              addr);
                        hns3_err(hw,
                                 "failed to set mc mac addr, addr(%s) invalid.",
                                 mac_str);

                        return -EINVAL;
                }

                /* Check if there are duplicate addresses */
                for (j = i + 1; j < nb_mc_addr; j++) {
                        if (rte_is_same_ether_addr(addr, &mc_addr_set[j])) {
                                hns3_ether_format_addr(mac_str,
                                                      RTE_ETHER_ADDR_FMT_SIZE,
                                                      addr);
                                hns3_err(hw, "failed to set mc mac addr, "
                                         "addrs invalid. two same addrs(%s).",
                                         mac_str);
                                return -EINVAL;
                        }
                }

                /*
                 * Check if there are duplicate addresses between mac_addrs
                 * and mc_addr_set
                 */
                for (j = 0; j < HNS3_UC_MACADDR_NUM; j++) {
                        if (rte_is_same_ether_addr(addr,
                                                   &hw->data->mac_addrs[j])) {
                                hns3_ether_format_addr(mac_str,
                                                      RTE_ETHER_ADDR_FMT_SIZE,
                                                      addr);
                                hns3_err(hw, "failed to set mc mac addr, "
                                         "addrs invalid. addrs(%s) has already "
                                         "configured in mac_addr add API",
                                         mac_str);
                                return -EINVAL;
                        }
                }
        }

        return 0;
}

static void
hns3_set_mc_addr_calc_addr(struct hns3_hw *hw,
                           struct rte_ether_addr *mc_addr_set,
                           int mc_addr_num,
                           struct rte_ether_addr *reserved_addr_list,
                           int *reserved_addr_num,
                           struct rte_ether_addr *add_addr_list,
                           int *add_addr_num,
                           struct rte_ether_addr *rm_addr_list,
                           int *rm_addr_num)
{
        struct rte_ether_addr *addr;
        int current_addr_num;
        int reserved_num = 0;
        int add_num = 0;
        int rm_num = 0;
        int num;
        int i;
        int j;
        bool same_addr;

        /* Calculate the mc mac address list that should be removed */
        current_addr_num = hw->mc_addrs_num;
        for (i = 0; i < current_addr_num; i++) {
                addr = &hw->mc_addrs[i];
                same_addr = false;
                for (j = 0; j < mc_addr_num; j++) {
                        if (rte_is_same_ether_addr(addr, &mc_addr_set[j])) {
                                same_addr = true;
                                break;
                        }
                }

                if (!same_addr) {
                        rte_ether_addr_copy(addr, &rm_addr_list[rm_num]);
                        rm_num++;
                } else {
                        rte_ether_addr_copy(addr,
                                            &reserved_addr_list[reserved_num]);
                        reserved_num++;
                }
        }

        /* Calculate the mc mac address list that should be added */
        for (i = 0; i < mc_addr_num; i++) {
                addr = &mc_addr_set[i];
                same_addr = false;
                for (j = 0; j < current_addr_num; j++) {
                        if (rte_is_same_ether_addr(addr, &hw->mc_addrs[j])) {
                                same_addr = true;
                                break;
                        }
                }

                if (!same_addr) {
                        rte_ether_addr_copy(addr, &add_addr_list[add_num]);
                        add_num++;
                }
        }

        /* Reorder the mc mac address list maintained by driver */
        for (i = 0; i < reserved_num; i++)
                rte_ether_addr_copy(&reserved_addr_list[i], &hw->mc_addrs[i]);

        for (i = 0; i < rm_num; i++) {
                num = reserved_num + i;
                rte_ether_addr_copy(&rm_addr_list[i], &hw->mc_addrs[num]);
        }

        *reserved_addr_num = reserved_num;
        *add_addr_num = add_num;
        *rm_addr_num = rm_num;
}

static int
hns3_set_mc_mac_addr_list(struct rte_eth_dev *dev,
                          struct rte_ether_addr *mc_addr_set,
                          uint32_t nb_mc_addr)
{
        struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        struct rte_ether_addr reserved_addr_list[HNS3_MC_MACADDR_NUM];
        struct rte_ether_addr add_addr_list[HNS3_MC_MACADDR_NUM];
        struct rte_ether_addr rm_addr_list[HNS3_MC_MACADDR_NUM];
        struct rte_ether_addr *addr;
        int reserved_addr_num;
        int add_addr_num;
        int rm_addr_num;
        int mc_addr_num;
        int num;
        int ret;
        int i;

        /* Check if input parameters are valid */
        ret = hns3_set_mc_addr_chk_param(hw, mc_addr_set, nb_mc_addr);
        if (ret)
                return ret;

        rte_spinlock_lock(&hw->lock);

        /*
         * Calculate the mc mac address lists those should be removed and be
         * added, Reorder the mc mac address list maintained by driver.
         */
        mc_addr_num = (int)nb_mc_addr;
        hns3_set_mc_addr_calc_addr(hw, mc_addr_set, mc_addr_num,
                                   reserved_addr_list, &reserved_addr_num,
                                   add_addr_list, &add_addr_num,
                                   rm_addr_list, &rm_addr_num);

        /* Remove mc mac addresses */
        for (i = 0; i < rm_addr_num; i++) {
                num = rm_addr_num - i - 1;
                addr = &rm_addr_list[num];
                ret = hns3_remove_mc_addr(hw, addr);
                if (ret) {
                        rte_spinlock_unlock(&hw->lock);
                        return ret;
                }
                hw->mc_addrs_num--;
        }

        /* Add mc mac addresses */
        for (i = 0; i < add_addr_num; i++) {
                addr = &add_addr_list[i];
                ret = hns3_add_mc_addr(hw, addr);
                if (ret) {
                        rte_spinlock_unlock(&hw->lock);
                        return ret;
                }

                num = reserved_addr_num + i;
                rte_ether_addr_copy(addr, &hw->mc_addrs[num]);
                hw->mc_addrs_num++;
        }
        rte_spinlock_unlock(&hw->lock);

        return 0;
}

static int
hns3_configure_all_mc_mac_addr(struct hns3_adapter *hns, bool del)
{
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        struct hns3_hw *hw = &hns->hw;
        struct rte_ether_addr *addr;
        int err = 0;
        int ret;
        int i;

        for (i = 0; i < hw->mc_addrs_num; i++) {
                addr = &hw->mc_addrs[i];
                if (!rte_is_multicast_ether_addr(addr))
                        continue;
                if (del)
                        ret = hns3_remove_mc_addr(hw, addr);
                else
                        ret = hns3_add_mc_addr(hw, addr);
                if (ret) {
                        err = ret;
                        hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
                                              addr);
                        hns3_dbg(hw, "%s mc mac addr: %s failed for pf: ret = %d",
                                 del ? "Remove" : "Restore", mac_str, ret);
                }
        }
        return err;
}

static int
hns3_check_mq_mode(struct rte_eth_dev *dev)
{
        enum rte_eth_rx_mq_mode rx_mq_mode = dev->data->dev_conf.rxmode.mq_mode;
        enum rte_eth_tx_mq_mode tx_mq_mode = dev->data->dev_conf.txmode.mq_mode;
        struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        struct hns3_pf *pf = HNS3_DEV_PRIVATE_TO_PF(dev->data->dev_private);
        struct rte_eth_dcb_rx_conf *dcb_rx_conf;
        struct rte_eth_dcb_tx_conf *dcb_tx_conf;
        uint8_t num_tc;
        int max_tc = 0;
        int i;

        if ((rx_mq_mode & ETH_MQ_RX_VMDQ_FLAG) ||
            (tx_mq_mode == ETH_MQ_TX_VMDQ_DCB ||
             tx_mq_mode == ETH_MQ_TX_VMDQ_ONLY)) {
                hns3_err(hw, "VMDQ is not supported, rx_mq_mode = %d, tx_mq_mode = %d.",
                         rx_mq_mode, tx_mq_mode);
                return -EOPNOTSUPP;
        }

        dcb_rx_conf = &dev->data->dev_conf.rx_adv_conf.dcb_rx_conf;
        dcb_tx_conf = &dev->data->dev_conf.tx_adv_conf.dcb_tx_conf;
        if (rx_mq_mode & ETH_MQ_RX_DCB_FLAG) {
                if (dcb_rx_conf->nb_tcs > pf->tc_max) {
                        hns3_err(hw, "nb_tcs(%u) > max_tc(%u) driver supported.",
                                 dcb_rx_conf->nb_tcs, pf->tc_max);
                        return -EINVAL;
                }

                if (!(dcb_rx_conf->nb_tcs == HNS3_4_TCS ||
                      dcb_rx_conf->nb_tcs == HNS3_8_TCS)) {
                        hns3_err(hw, "on ETH_MQ_RX_DCB_RSS mode, "
                                 "nb_tcs(%d) != %d or %d in rx direction.",
                                 dcb_rx_conf->nb_tcs, HNS3_4_TCS, HNS3_8_TCS);
                        return -EINVAL;
                }

                if (dcb_rx_conf->nb_tcs != dcb_tx_conf->nb_tcs) {
                        hns3_err(hw, "num_tcs(%d) of tx is not equal to rx(%d)",
                                 dcb_tx_conf->nb_tcs, dcb_rx_conf->nb_tcs);
                        return -EINVAL;
                }

                for (i = 0; i < HNS3_MAX_USER_PRIO; i++) {
                        if (dcb_rx_conf->dcb_tc[i] != dcb_tx_conf->dcb_tc[i]) {
                                hns3_err(hw, "dcb_tc[%d] = %u in rx direction, "
                                         "is not equal to one in tx direction.",
                                         i, dcb_rx_conf->dcb_tc[i]);
                                return -EINVAL;
                        }
                        if (dcb_rx_conf->dcb_tc[i] > max_tc)
                                max_tc = dcb_rx_conf->dcb_tc[i];
                }

                num_tc = max_tc + 1;
                if (num_tc > dcb_rx_conf->nb_tcs) {
                        hns3_err(hw, "max num_tc(%u) mapped > nb_tcs(%u)",
                                 num_tc, dcb_rx_conf->nb_tcs);
                        return -EINVAL;
                }
        }

        return 0;
}

static int
hns3_bind_ring_with_vector(struct hns3_hw *hw, uint16_t vector_id, bool en,
                           enum hns3_ring_type queue_type, uint16_t queue_id)
{
        struct hns3_cmd_desc desc;
        struct hns3_ctrl_vector_chain_cmd *req =
                (struct hns3_ctrl_vector_chain_cmd *)desc.data;
        enum hns3_opcode_type op;
        uint16_t tqp_type_and_id = 0;
        uint16_t type;
        uint16_t gl;
        int ret;

        op = en ? HNS3_OPC_ADD_RING_TO_VECTOR : HNS3_OPC_DEL_RING_TO_VECTOR;
        hns3_cmd_setup_basic_desc(&desc, op, false);
        req->int_vector_id = hns3_get_field(vector_id, HNS3_TQP_INT_ID_L_M,
                                              HNS3_TQP_INT_ID_L_S);
        req->int_vector_id_h = hns3_get_field(vector_id, HNS3_TQP_INT_ID_H_M,
                                              HNS3_TQP_INT_ID_H_S);

        if (queue_type == HNS3_RING_TYPE_RX)
                gl = HNS3_RING_GL_RX;
        else
                gl = HNS3_RING_GL_TX;

        type = queue_type;

        hns3_set_field(tqp_type_and_id, HNS3_INT_TYPE_M, HNS3_INT_TYPE_S,
                       type);
        hns3_set_field(tqp_type_and_id, HNS3_TQP_ID_M, HNS3_TQP_ID_S, queue_id);
        hns3_set_field(tqp_type_and_id, HNS3_INT_GL_IDX_M, HNS3_INT_GL_IDX_S,
                       gl);
        req->tqp_type_and_id[0] = rte_cpu_to_le_16(tqp_type_and_id);
        req->int_cause_num = 1;
        ret = hns3_cmd_send(hw, &desc, 1);
        if (ret) {
                hns3_err(hw, "%s TQP %u fail, vector_id = %u, ret = %d.",
                         en ? "Map" : "Unmap", queue_id, vector_id, ret);
                return ret;
        }

        return 0;
}

static int
hns3_init_ring_with_vector(struct hns3_hw *hw)
{
        uint16_t vec;
        int ret;
        int i;

        /*
         * In hns3 network engine, vector 0 is always the misc interrupt of this
         * function, vector 1~N can be used respectively for the queues of the
         * function. Tx and Rx queues with the same number share the interrupt
         * vector. In the initialization clearing the all hardware mapping
         * relationship configurations between queues and interrupt vectors is
         * needed, so some error caused by the residual configurations, such as
         * the unexpected Tx interrupt, can be avoid.
         */
        vec = hw->num_msi - 1; /* vector 0 for misc interrupt, not for queue */
        if (hw->intr.mapping_mode == HNS3_INTR_MAPPING_VEC_RSV_ONE)
                vec = vec - 1; /* the last interrupt is reserved */
        hw->intr_tqps_num = RTE_MIN(vec, hw->tqps_num);
        for (i = 0; i < hw->intr_tqps_num; i++) {
                /*
                 * Set gap limiter/rate limiter/quanity limiter algorithm
                 * configuration for interrupt coalesce of queue's interrupt.
                 */
                hns3_set_queue_intr_gl(hw, i, HNS3_RING_GL_RX,
                                       HNS3_TQP_INTR_GL_DEFAULT);
                hns3_set_queue_intr_gl(hw, i, HNS3_RING_GL_TX,
                                       HNS3_TQP_INTR_GL_DEFAULT);
                hns3_set_queue_intr_rl(hw, i, HNS3_TQP_INTR_RL_DEFAULT);
                /*
                 * QL(quantity limiter) is not used currently, just set 0 to
                 * close it.
                 */
                hns3_set_queue_intr_ql(hw, i, HNS3_TQP_INTR_QL_DEFAULT);

                ret = hns3_bind_ring_with_vector(hw, vec, false,
                                                 HNS3_RING_TYPE_TX, i);
                if (ret) {
                        PMD_INIT_LOG(ERR, "PF fail to unbind TX ring(%d) with "
                                          "vector: %u, ret=%d", i, vec, ret);
                        return ret;
                }

                ret = hns3_bind_ring_with_vector(hw, vec, false,
                                                 HNS3_RING_TYPE_RX, i);
                if (ret) {
                        PMD_INIT_LOG(ERR, "PF fail to unbind RX ring(%d) with "
                                          "vector: %u, ret=%d", i, vec, ret);
                        return ret;
                }
        }

        return 0;
}

static int
hns3_refresh_mtu(struct rte_eth_dev *dev, struct rte_eth_conf *conf)
{
        struct hns3_adapter *hns = dev->data->dev_private;
        struct hns3_hw *hw = &hns->hw;
        uint32_t max_rx_pkt_len;
        uint16_t mtu;
        int ret;

        if (!(conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME))
                return 0;

        /*
         * If jumbo frames are enabled, MTU needs to be refreshed
         * according to the maximum RX packet length.
         */
        max_rx_pkt_len = conf->rxmode.max_rx_pkt_len;
        if (max_rx_pkt_len > HNS3_MAX_FRAME_LEN ||
            max_rx_pkt_len <= HNS3_DEFAULT_FRAME_LEN) {
                hns3_err(hw, "maximum Rx packet length must be greater than %u "
                         "and no more than %u when jumbo frame enabled.",
                         (uint16_t)HNS3_DEFAULT_FRAME_LEN,
                         (uint16_t)HNS3_MAX_FRAME_LEN);
                return -EINVAL;
        }

        mtu = (uint16_t)HNS3_PKTLEN_TO_MTU(max_rx_pkt_len);
        ret = hns3_dev_mtu_set(dev, mtu);
        if (ret)
                return ret;
        dev->data->mtu = mtu;

        return 0;
}

static int
hns3_setup_dcb(struct rte_eth_dev *dev)
{
        struct hns3_adapter *hns = dev->data->dev_private;
        struct hns3_hw *hw = &hns->hw;
        int ret;

        if (!hns3_dev_dcb_supported(hw)) {
                hns3_err(hw, "this port does not support dcb configurations.");
                return -EOPNOTSUPP;
        }

        if (hw->current_fc_status == HNS3_FC_STATUS_MAC_PAUSE) {
                hns3_err(hw, "MAC pause enabled, cannot config dcb info.");
                return -EOPNOTSUPP;
        }

        ret = hns3_dcb_configure(hns);
        if (ret)
                hns3_err(hw, "failed to config dcb: %d", ret);

        return ret;
}

static int
hns3_check_link_speed(struct hns3_hw *hw, uint32_t link_speeds)
{
        int ret;

        /*
         * Some hardware doesn't support auto-negotiation, but users may not
         * configure link_speeds (default 0), which means auto-negotiation.
         * In this case, it should return success.
         */
        if (link_speeds == ETH_LINK_SPEED_AUTONEG &&
            hw->mac.support_autoneg == 0)
                return 0;

        if (link_speeds != ETH_LINK_SPEED_AUTONEG) {
                ret = hns3_check_port_speed(hw, link_speeds);
                if (ret)
                        return ret;
        }

        return 0;
}

static int
hns3_check_dev_conf(struct rte_eth_dev *dev)
{
        struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        struct rte_eth_conf *conf = &dev->data->dev_conf;
        int ret;

        ret = hns3_check_mq_mode(dev);
        if (ret)
                return ret;

        return hns3_check_link_speed(hw, conf->link_speeds);
}

static int
hns3_dev_configure(struct rte_eth_dev *dev)
{
        struct hns3_adapter *hns = dev->data->dev_private;
        struct rte_eth_conf *conf = &dev->data->dev_conf;
        enum rte_eth_rx_mq_mode mq_mode = conf->rxmode.mq_mode;
        struct hns3_hw *hw = &hns->hw;
        uint16_t nb_rx_q = dev->data->nb_rx_queues;
        uint16_t nb_tx_q = dev->data->nb_tx_queues;
        struct rte_eth_rss_conf rss_conf;
        bool gro_en;
        int ret;

        hw->cfg_max_queues = RTE_MAX(nb_rx_q, nb_tx_q);

        /*
         * Some versions of hardware network engine does not support
         * individually enable/disable/reset the Tx or Rx queue. These devices
         * must enable/disable/reset Tx and Rx queues at the same time. When the
         * numbers of Tx queues allocated by upper applications are not equal to
         * the numbers of Rx queues, driver needs to setup fake Tx or Rx queues
         * to adjust numbers of Tx/Rx queues. otherwise, network engine can not
         * work as usual. But these fake queues are imperceptible, and can not
         * be used by upper applications.
         */
        ret = hns3_set_fake_rx_or_tx_queues(dev, nb_rx_q, nb_tx_q);
        if (ret) {
                hns3_err(hw, "fail to set Rx/Tx fake queues, ret = %d.", ret);
                hw->cfg_max_queues = 0;
                return ret;
        }

        hw->adapter_state = HNS3_NIC_CONFIGURING;
        ret = hns3_check_dev_conf(dev);
        if (ret)
                goto cfg_err;

        if ((uint32_t)mq_mode & ETH_MQ_RX_DCB_FLAG) {
                ret = hns3_setup_dcb(dev);
                if (ret)
                        goto cfg_err;
        }

        /* When RSS is not configured, redirect the packet queue 0 */
        if ((uint32_t)mq_mode & ETH_MQ_RX_RSS_FLAG) {
                conf->rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
                rss_conf = conf->rx_adv_conf.rss_conf;
                hw->rss_dis_flag = false;
                ret = hns3_dev_rss_hash_update(dev, &rss_conf);
                if (ret)
                        goto cfg_err;
        }

        ret = hns3_refresh_mtu(dev, conf);
        if (ret)
                goto cfg_err;

        ret = hns3_mbuf_dyn_rx_timestamp_register(dev, conf);
        if (ret)
                goto cfg_err;

        ret = hns3_dev_configure_vlan(dev);
        if (ret)
                goto cfg_err;

        /* config hardware GRO */
        gro_en = conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO ? true : false;
        ret = hns3_config_gro(hw, gro_en);
        if (ret)
                goto cfg_err;

        hns3_init_rx_ptype_tble(dev);
        hw->adapter_state = HNS3_NIC_CONFIGURED;

        return 0;

cfg_err:
        hw->cfg_max_queues = 0;
        (void)hns3_set_fake_rx_or_tx_queues(dev, 0, 0);
        hw->adapter_state = HNS3_NIC_INITIALIZED;

        return ret;
}

static int
hns3_set_mac_mtu(struct hns3_hw *hw, uint16_t new_mps)
{
        struct hns3_config_max_frm_size_cmd *req;
        struct hns3_cmd_desc desc;

        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_CONFIG_MAX_FRM_SIZE, false);

        req = (struct hns3_config_max_frm_size_cmd *)desc.data;
        req->max_frm_size = rte_cpu_to_le_16(new_mps);
        req->min_frm_size = RTE_ETHER_MIN_LEN;

        return hns3_cmd_send(hw, &desc, 1);
}

static int
hns3_config_mtu(struct hns3_hw *hw, uint16_t mps)
{
        struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
        uint16_t original_mps = hns->pf.mps;
        int err;
        int ret;

        ret = hns3_set_mac_mtu(hw, mps);
        if (ret) {
                hns3_err(hw, "failed to set mtu, ret = %d", ret);
                return ret;
        }

        hns->pf.mps = mps;
        ret = hns3_buffer_alloc(hw);
        if (ret) {
                hns3_err(hw, "failed to allocate buffer, ret = %d", ret);
                goto rollback;
        }

        return 0;

rollback:
        err = hns3_set_mac_mtu(hw, original_mps);
        if (err) {
                hns3_err(hw, "fail to rollback MTU, err = %d", err);
                return ret;
        }
        hns->pf.mps = original_mps;

        return ret;
}

static int
hns3_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
{
        struct hns3_adapter *hns = dev->data->dev_private;
        uint32_t frame_size = mtu + HNS3_ETH_OVERHEAD;
        struct hns3_hw *hw = &hns->hw;
        bool is_jumbo_frame;
        int ret;

        if (dev->data->dev_started) {
                hns3_err(hw, "Failed to set mtu, port %u must be stopped "
                         "before configuration", dev->data->port_id);
                return -EBUSY;
        }

        rte_spinlock_lock(&hw->lock);
        is_jumbo_frame = frame_size > HNS3_DEFAULT_FRAME_LEN ? true : false;
        frame_size = RTE_MAX(frame_size, HNS3_DEFAULT_FRAME_LEN);

        /*
         * Maximum value of frame_size is HNS3_MAX_FRAME_LEN, so it can safely
         * assign to "uint16_t" type variable.
         */
        ret = hns3_config_mtu(hw, (uint16_t)frame_size);
        if (ret) {
                rte_spinlock_unlock(&hw->lock);
                hns3_err(hw, "Failed to set mtu, port %u mtu %u: %d",
                         dev->data->port_id, mtu, ret);
                return ret;
        }

        if (is_jumbo_frame)
                dev->data->dev_conf.rxmode.offloads |=
                                                DEV_RX_OFFLOAD_JUMBO_FRAME;
        else
                dev->data->dev_conf.rxmode.offloads &=
                                                ~DEV_RX_OFFLOAD_JUMBO_FRAME;
        dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
        rte_spinlock_unlock(&hw->lock);

        return 0;
}

static uint32_t
hns3_get_copper_port_speed_capa(uint32_t supported_speed)
{
        uint32_t speed_capa = 0;

        if (supported_speed & HNS3_PHY_LINK_SPEED_10M_HD_BIT)
                speed_capa |= ETH_LINK_SPEED_10M_HD;
        if (supported_speed & HNS3_PHY_LINK_SPEED_10M_BIT)
                speed_capa |= ETH_LINK_SPEED_10M;
        if (supported_speed & HNS3_PHY_LINK_SPEED_100M_HD_BIT)
                speed_capa |= ETH_LINK_SPEED_100M_HD;
        if (supported_speed & HNS3_PHY_LINK_SPEED_100M_BIT)
                speed_capa |= ETH_LINK_SPEED_100M;
        if (supported_speed & HNS3_PHY_LINK_SPEED_1000M_BIT)
                speed_capa |= ETH_LINK_SPEED_1G;

        return speed_capa;
}

static uint32_t
hns3_get_firber_port_speed_capa(uint32_t supported_speed)
{
        uint32_t speed_capa = 0;

        if (supported_speed & HNS3_FIBER_LINK_SPEED_1G_BIT)
                speed_capa |= ETH_LINK_SPEED_1G;
        if (supported_speed & HNS3_FIBER_LINK_SPEED_10G_BIT)
                speed_capa |= ETH_LINK_SPEED_10G;
        if (supported_speed & HNS3_FIBER_LINK_SPEED_25G_BIT)
                speed_capa |= ETH_LINK_SPEED_25G;
        if (supported_speed & HNS3_FIBER_LINK_SPEED_40G_BIT)
                speed_capa |= ETH_LINK_SPEED_40G;
        if (supported_speed & HNS3_FIBER_LINK_SPEED_50G_BIT)
                speed_capa |= ETH_LINK_SPEED_50G;
        if (supported_speed & HNS3_FIBER_LINK_SPEED_100G_BIT)
                speed_capa |= ETH_LINK_SPEED_100G;
        if (supported_speed & HNS3_FIBER_LINK_SPEED_200G_BIT)
                speed_capa |= ETH_LINK_SPEED_200G;

        return speed_capa;
}

static uint32_t
hns3_get_speed_capa(struct hns3_hw *hw)
{
        struct hns3_mac *mac = &hw->mac;
        uint32_t speed_capa;

        if (mac->media_type == HNS3_MEDIA_TYPE_COPPER)
                speed_capa =
                        hns3_get_copper_port_speed_capa(mac->supported_speed);
        else
                speed_capa =
                        hns3_get_firber_port_speed_capa(mac->supported_speed);

        if (mac->support_autoneg == 0)
                speed_capa |= ETH_LINK_SPEED_FIXED;

        return speed_capa;
}

int
hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
{
        struct hns3_adapter *hns = eth_dev->data->dev_private;
        struct hns3_hw *hw = &hns->hw;
        uint16_t queue_num = hw->tqps_num;

        /*
         * In interrupt mode, 'max_rx_queues' is set based on the number of
         * MSI-X interrupt resources of the hardware.
         */
        if (hw->data->dev_conf.intr_conf.rxq == 1)
                queue_num = hw->intr_tqps_num;

        info->max_rx_queues = queue_num;
        info->max_tx_queues = hw->tqps_num;
        info->max_rx_pktlen = HNS3_MAX_FRAME_LEN; /* CRC included */
        info->min_rx_bufsize = HNS3_MIN_BD_BUF_SIZE;
        info->max_mac_addrs = HNS3_UC_MACADDR_NUM;
        info->max_mtu = info->max_rx_pktlen - HNS3_ETH_OVERHEAD;
        info->max_lro_pkt_size = HNS3_MAX_LRO_SIZE;
        info->rx_offload_capa = (DEV_RX_OFFLOAD_IPV4_CKSUM |
                                 DEV_RX_OFFLOAD_TCP_CKSUM |
                                 DEV_RX_OFFLOAD_UDP_CKSUM |
                                 DEV_RX_OFFLOAD_SCTP_CKSUM |
                                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
                                 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
                                 DEV_RX_OFFLOAD_KEEP_CRC |
                                 DEV_RX_OFFLOAD_SCATTER |
                                 DEV_RX_OFFLOAD_VLAN_STRIP |
                                 DEV_RX_OFFLOAD_VLAN_FILTER |
                                 DEV_RX_OFFLOAD_JUMBO_FRAME |
                                 DEV_RX_OFFLOAD_RSS_HASH |
                                 DEV_RX_OFFLOAD_TCP_LRO);
        info->tx_offload_capa = (DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
                                 DEV_TX_OFFLOAD_IPV4_CKSUM |
                                 DEV_TX_OFFLOAD_TCP_CKSUM |
                                 DEV_TX_OFFLOAD_UDP_CKSUM |
                                 DEV_TX_OFFLOAD_SCTP_CKSUM |
                                 DEV_TX_OFFLOAD_MULTI_SEGS |
                                 DEV_TX_OFFLOAD_TCP_TSO |
                                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
                                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
                                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
                                 DEV_TX_OFFLOAD_MBUF_FAST_FREE |
                                 hns3_txvlan_cap_get(hw));

        if (hns3_dev_outer_udp_cksum_supported(hw))
                info->tx_offload_capa |= DEV_TX_OFFLOAD_OUTER_UDP_CKSUM;

        if (hns3_dev_indep_txrx_supported(hw))
                info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |
                                 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;

        if (hns3_dev_ptp_supported(hw))
                info->rx_offload_capa |= DEV_RX_OFFLOAD_TIMESTAMP;

        info->rx_desc_lim = (struct rte_eth_desc_lim) {
                .nb_max = HNS3_MAX_RING_DESC,
                .nb_min = HNS3_MIN_RING_DESC,
                .nb_align = HNS3_ALIGN_RING_DESC,
        };

        info->tx_desc_lim = (struct rte_eth_desc_lim) {
                .nb_max = HNS3_MAX_RING_DESC,
                .nb_min = HNS3_MIN_RING_DESC,
                .nb_align = HNS3_ALIGN_RING_DESC,
                .nb_seg_max = HNS3_MAX_TSO_BD_PER_PKT,
                .nb_mtu_seg_max = hw->max_non_tso_bd_num,
        };

        info->speed_capa = hns3_get_speed_capa(hw);
        info->default_rxconf = (struct rte_eth_rxconf) {
                .rx_free_thresh = HNS3_DEFAULT_RX_FREE_THRESH,
                /*
                 * If there are no available Rx buffer descriptors, incoming
                 * packets are always dropped by hardware based on hns3 network
                 * engine.
                 */
                .rx_drop_en = 1,
                .offloads = 0,
        };
        info->default_txconf = (struct rte_eth_txconf) {
                .tx_rs_thresh = HNS3_DEFAULT_TX_RS_THRESH,
                .offloads = 0,
        };

        info->reta_size = hw->rss_ind_tbl_size;
        info->hash_key_size = HNS3_RSS_KEY_SIZE;
        info->flow_type_rss_offloads = HNS3_ETH_RSS_SUPPORT;

        info->default_rxportconf.burst_size = HNS3_DEFAULT_PORT_CONF_BURST_SIZE;
        info->default_txportconf.burst_size = HNS3_DEFAULT_PORT_CONF_BURST_SIZE;
        info->default_rxportconf.nb_queues = HNS3_DEFAULT_PORT_CONF_QUEUES_NUM;
        info->default_txportconf.nb_queues = HNS3_DEFAULT_PORT_CONF_QUEUES_NUM;
        info->default_rxportconf.ring_size = HNS3_DEFAULT_RING_DESC;
        info->default_txportconf.ring_size = HNS3_DEFAULT_RING_DESC;

        return 0;
}

static int
hns3_fw_version_get(struct rte_eth_dev *eth_dev, char *fw_version,
                    size_t fw_size)
{
        struct hns3_adapter *hns = eth_dev->data->dev_private;
        struct hns3_hw *hw = &hns->hw;
        uint32_t version = hw->fw_version;
        int ret;

        ret = snprintf(fw_version, fw_size, "%lu.%lu.%lu.%lu",
                       hns3_get_field(version, HNS3_FW_VERSION_BYTE3_M,
                                      HNS3_FW_VERSION_BYTE3_S),
                       hns3_get_field(version, HNS3_FW_VERSION_BYTE2_M,
                                      HNS3_FW_VERSION_BYTE2_S),
                       hns3_get_field(version, HNS3_FW_VERSION_BYTE1_M,
                                      HNS3_FW_VERSION_BYTE1_S),
                       hns3_get_field(version, HNS3_FW_VERSION_BYTE0_M,
                                      HNS3_FW_VERSION_BYTE0_S));
        if (ret < 0)
                return -EINVAL;

        ret += 1; /* add the size of '\0' */
        if (fw_size < (size_t)ret)
                return ret;
        else
                return 0;
}

static int
hns3_update_port_link_info(struct rte_eth_dev *eth_dev)
{
        struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
        int ret;

        (void)hns3_update_link_status(hw);

        ret = hns3_update_link_info(eth_dev);
        if (ret)
                hw->mac.link_status = ETH_LINK_DOWN;

        return ret;
}

static void
hns3_setup_linkstatus(struct rte_eth_dev *eth_dev,
                      struct rte_eth_link *new_link)
{
        struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
        struct hns3_mac *mac = &hw->mac;

        switch (mac->link_speed) {
        case ETH_SPEED_NUM_10M:
        case ETH_SPEED_NUM_100M:
        case ETH_SPEED_NUM_1G:
        case ETH_SPEED_NUM_10G:
        case ETH_SPEED_NUM_25G:
        case ETH_SPEED_NUM_40G:
        case ETH_SPEED_NUM_50G:
        case ETH_SPEED_NUM_100G:
        case ETH_SPEED_NUM_200G:
                if (mac->link_status)
                        new_link->link_speed = mac->link_speed;
                break;
        default:
                if (mac->link_status)
                        new_link->link_speed = ETH_SPEED_NUM_UNKNOWN;
                break;
        }

        if (!mac->link_status)
                new_link->link_speed = ETH_SPEED_NUM_NONE;

        new_link->link_duplex = mac->link_duplex;
        new_link->link_status = mac->link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
        new_link->link_autoneg = mac->link_autoneg;
}

static int
hns3_dev_link_update(struct rte_eth_dev *eth_dev, int wait_to_complete)
{
#define HNS3_LINK_CHECK_INTERVAL 100  /* 100ms */
#define HNS3_MAX_LINK_CHECK_TIMES 20  /* 2s (100 * 20ms) in total */

        struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
        uint32_t retry_cnt = HNS3_MAX_LINK_CHECK_TIMES;
        struct hns3_mac *mac = &hw->mac;
        struct rte_eth_link new_link;
        int ret;

        /* When port is stopped, report link down. */
        if (eth_dev->data->dev_started == 0) {
                new_link.link_autoneg = mac->link_autoneg;
                new_link.link_duplex = mac->link_duplex;
                new_link.link_speed = ETH_SPEED_NUM_NONE;
                new_link.link_status = ETH_LINK_DOWN;
                goto out;
        }

        do {
                ret = hns3_update_port_link_info(eth_dev);
                if (ret) {
                        hns3_err(hw, "failed to get port link info, ret = %d.",
                                 ret);
                        break;
                }

                if (!wait_to_complete || mac->link_status == ETH_LINK_UP)
                        break;

                rte_delay_ms(HNS3_LINK_CHECK_INTERVAL);
        } while (retry_cnt--);

        memset(&new_link, 0, sizeof(new_link));
        hns3_setup_linkstatus(eth_dev, &new_link);

out:
        return rte_eth_linkstatus_set(eth_dev, &new_link);
}

static int
hns3_parse_func_status(struct hns3_hw *hw, struct hns3_func_status_cmd *status)
{
        struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
        struct hns3_pf *pf = &hns->pf;

        if (!(status->pf_state & HNS3_PF_STATE_DONE))
                return -EINVAL;

        pf->is_main_pf = (status->pf_state & HNS3_PF_STATE_MAIN) ? true : false;

        return 0;
}

static int
hns3_query_function_status(struct hns3_hw *hw)
{
#define HNS3_QUERY_MAX_CNT              10
#define HNS3_QUERY_SLEEP_MSCOEND        1
        struct hns3_func_status_cmd *req;
        struct hns3_cmd_desc desc;
        int timeout = 0;
        int ret;

        hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_QUERY_FUNC_STATUS, true);
        req = (struct hns3_func_status_cmd *)desc.data;

        do {
                ret = hns3_cmd_send(hw, &desc, 1);
                if (ret) {
                        PMD_INIT_LOG(ERR, "query function status failed %d",
                                     ret);
                        return ret;
                }

                /* Check pf reset is done */
                if (req->pf_state)
                        break;

                rte_delay_ms(HNS3_QUERY_SLEEP_MSCOEND);
        } while (timeout++ < HNS3_QUERY_MAX_CNT);

        return hns3_parse_func_status(hw, req);
}

static int
hns3_get_pf_max_tqp_num(struct hns3_hw *hw)
{
        struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
        struct hns3_pf *pf = &hns->pf;

        if (pf->tqp_config_mode == HNS3_FLEX_MAX_TQP_NUM_MODE) {
                /*
                 * The total_tqps_num obtained from firmware is maximum tqp
                 * numbers of this port, which should be used for PF and VFs.
                 * There is no need for pf to have so many tqp numbers in
                 * most cases. RTE_LIBRTE_HNS3_MAX_TQP_NUM_PER_PF,
                 * coming from config file, is assigned to maximum queue number
                 * for the PF of this port by user. So users can modify the
                 * maximum queue number of PF according to their own application
                 * scenarios, which is more flexible to use. In addition, many
                 * memories can be saved due to allocating queue statistics
                 * room according to the actual number of queues required. The
                 * maximum queue number of PF for network engine with
                 * revision_id greater than 0x30 is assigned by config file.
                 */
                if (RTE_LIBRTE_HNS3_MAX_TQP_NUM_PER_PF <= 0) {
                        hns3_err(hw, "RTE_LIBRTE_HNS3_MAX_TQP_NUM_PER_PF(%d) "
                                 "must be greater than 0.",
                                 RTE_LIBRTE_HNS3_MAX_TQP_NUM_PER_PF);
                        return -EINVAL;
                }

                hw->tqps_num = RTE_MIN(RTE_LIBRTE_HNS3_MAX_TQP_NUM_PER_PF,
                                       hw->total_tqps_num);