LXR dpdk/drivers/net/hns3/hns3

   1/* SPDX-License-Identifier: BSD-3-Clause
   2 * Copyright(c) 2020-2021 HiSilicon Limited.
   3 */
   4
   5#ifndef _HNS3_TM_H_
   6#define _HNS3_TM_H_
   7
   8#include <stdint.h>
   9#include <rte_tailq.h>
  10#include <rte_tm_driver.h>
  11
  12struct hns3_port_limit_rate_cmd {
  13        uint32_t speed;  /* Unit Mbps */
  14        uint32_t rsvd[5];
  15};
  16
  17struct hns3_tc_limit_rate_cmd {
  18        uint32_t speed;  /* Unit Mbps */
  19        uint8_t tc_id;
  20        uint8_t rsvd[3];
  21        uint32_t rsvd1[4];
  22};
  23
  24enum hns3_tm_node_type {
  25        HNS3_TM_NODE_TYPE_PORT,
  26        HNS3_TM_NODE_TYPE_TC,
  27        HNS3_TM_NODE_TYPE_QUEUE,
  28        HNS3_TM_NODE_TYPE_MAX,
  29};
  30
  31enum hns3_tm_node_level {
  32        HNS3_TM_NODE_LEVEL_PORT,
  33        HNS3_TM_NODE_LEVEL_TC,
  34        HNS3_TM_NODE_LEVEL_QUEUE,
  35        HNS3_TM_NODE_LEVEL_MAX,
  36};
  37
  38struct hns3_tm_shaper_profile {
  39        TAILQ_ENTRY(hns3_tm_shaper_profile) node;
  40        uint32_t shaper_profile_id;
  41        uint32_t reference_count;
  42        struct rte_tm_shaper_params profile;
  43};
  44
  45TAILQ_HEAD(hns3_shaper_profile_list, hns3_tm_shaper_profile);
  46
  47struct hns3_tm_node {
  48        TAILQ_ENTRY(hns3_tm_node) node;
  49        uint32_t id;
  50        uint32_t reference_count;
  51        struct hns3_tm_node *parent;
  52        struct hns3_tm_shaper_profile *shaper_profile;
  53        struct rte_tm_node_params params;
  54};
  55
  56TAILQ_HEAD(hns3_tm_node_list, hns3_tm_node);
  57
  58struct hns3_tm_conf {
  59        uint32_t nb_leaf_nodes_max; /* max numbers of leaf nodes */
  60        uint32_t nb_nodes_max; /* max numbers of nodes */
  61        uint32_t nb_shaper_profile_max; /* max numbers of shaper profile */
  62
  63        struct hns3_shaper_profile_list shaper_profile_list;
  64        uint32_t nb_shaper_profile; /* number of shaper profile */
  65
  66        struct hns3_tm_node *root;
  67        struct hns3_tm_node_list tc_list;
  68        struct hns3_tm_node_list queue_list;
  69        uint32_t nb_tc_node; /* number of added TC nodes */
  70        uint32_t nb_queue_node; /* number of added queue nodes */
  71
  72        /*
  73         * This flag is used to check if APP can change the TM node
  74         * configuration.
  75         * When it's true, means the configuration is applied to HW,
  76         * APP should not add/delete the TM node configuration.
  77         * When starting the port, APP should call the hierarchy_commit API to
  78         * set this flag to true. When stopping the port, this flag should be
  79         * set to false.
  80         */
  81        bool committed;
  82};
  83
  84/*
  85 * This API used to calc node TC no. User must make sure the node id is in the
  86 * TC node id range.
  87 *
  88 * User could call rte_eth_dev_info_get API to get port's max_tx_queues, The TM
  89 * id's assignment should following the below rules:
  90 *     [0, max_tx_queues-1]: correspond queues's node id
  91 *     max_tx_queues + 0   : correspond TC0's node id
  92 *     max_tx_queues + 1   : correspond TC1's node id
  93 *     ...
  94 *     max_tx_queues + 7   : correspond TC7's node id
  95 *     max_tx_queues + 8   : correspond port's node id
  96 *
  97 */
  98static inline uint8_t
  99hns3_tm_calc_node_tc_no(struct hns3_tm_conf *conf, uint32_t node_id)
 100{
 101        if (node_id >= conf->nb_leaf_nodes_max &&
 102            node_id < conf->nb_nodes_max - 1)
 103                return node_id - conf->nb_leaf_nodes_max;
 104        else
 105                return 0;
 106}
 107
 108void hns3_tm_conf_init(struct rte_eth_dev *dev);
 109void hns3_tm_conf_uninit(struct rte_eth_dev *dev);
 110int hns3_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *arg);
 111void hns3_tm_dev_start_proc(struct hns3_hw *hw);
 112void hns3_tm_dev_stop_proc(struct hns3_hw *hw);
 113int hns3_tm_conf_update(struct hns3_hw *hw);
 114
 115#endif /* _HNS3_TM_H */
 116