LXR dpdk/drivers/net/octeontx2/otx2_ethdev

   1/* SPDX-License-Identifier: BSD-3-Clause
   2 * Copyright (C) 2020 Marvell International Ltd.
   3 */
   4
   5#ifndef __OTX2_ETHDEV_SEC_H__
   6#define __OTX2_ETHDEV_SEC_H__
   7
   8#include <rte_ethdev.h>
   9
  10#include "otx2_ipsec_fp.h"
  11#include "otx2_ipsec_po.h"
  12
  13#define OTX2_CPT_RES_ALIGN              16
  14#define OTX2_NIX_SEND_DESC_ALIGN        16
  15#define OTX2_CPT_INST_SIZE              64
  16
  17#define OTX2_CPT_EGRP_INLINE_IPSEC      1
  18
  19#define OTX2_CPT_OP_INLINE_IPSEC_OUTB           (0x40 | 0x25)
  20#define OTX2_CPT_OP_INLINE_IPSEC_INB            (0x40 | 0x26)
  21#define OTX2_CPT_OP_WRITE_HMAC_IPAD_OPAD        (0x40 | 0x27)
  22
  23#define OTX2_SEC_CPT_COMP_GOOD  0x1
  24#define OTX2_SEC_UC_COMP_GOOD   0x0
  25#define OTX2_SEC_COMP_GOOD      (OTX2_SEC_UC_COMP_GOOD << 8 | \
  26                                 OTX2_SEC_CPT_COMP_GOOD)
  27
  28/* CPT Result */
  29struct otx2_cpt_res {
  30        union {
  31                struct {
  32                        uint64_t compcode:8;
  33                        uint64_t uc_compcode:8;
  34                        uint64_t doneint:1;
  35                        uint64_t reserved_17_63:47;
  36                        uint64_t reserved_64_127;
  37                };
  38                uint16_t u16[8];
  39        };
  40};
  41
  42struct otx2_cpt_inst_s {
  43        union {
  44                struct {
  45                        /* W0 */
  46                        uint64_t nixtxl : 3;
  47                        uint64_t doneint : 1;
  48                        uint64_t nixtx_addr : 60;
  49                        /* W1 */
  50                        uint64_t res_addr : 64;
  51                        /* W2 */
  52                        uint64_t tag : 32;
  53                        uint64_t tt : 2;
  54                        uint64_t grp : 10;
  55                        uint64_t rsvd_175_172 : 4;
  56                        uint64_t rvu_pf_func : 16;
  57                        /* W3 */
  58                        uint64_t qord : 1;
  59                        uint64_t rsvd_194_193 : 2;
  60                        uint64_t wqe_ptr : 61;
  61                        /* W4 */
  62                        uint64_t dlen : 16;
  63                        uint64_t param2 : 16;
  64                        uint64_t param1 : 16;
  65                        uint64_t opcode : 16;
  66                        /* W5 */
  67                        uint64_t dptr : 64;
  68                        /* W6 */
  69                        uint64_t rptr : 64;
  70                        /* W7 */
  71                        uint64_t cptr : 61;
  72                        uint64_t egrp : 3;
  73                };
  74                uint64_t u64[8];
  75        };
  76};
  77
  78/*
  79 * Security session for inline IPsec protocol offload. This is private data of
  80 * inline capable PMD.
  81 */
  82struct otx2_sec_session_ipsec_ip {
  83        RTE_STD_C11
  84        union {
  85                /*
  86                 * Inbound SA would accessed by crypto block. And so the memory
  87                 * is allocated differently and shared with the h/w. Only
  88                 * holding a pointer to this memory in the session private
  89                 * space.
  90                 */
  91                void *in_sa;
  92                /* Outbound SA */
  93                struct otx2_ipsec_fp_out_sa out_sa;
  94        };
  95
  96        /* Address of CPT LMTLINE */
  97        void *cpt_lmtline;
  98        /* CPT LF enqueue register address */
  99        rte_iova_t cpt_nq_reg;
 100
 101        /* Pre calculated lengths and data for a session */
 102        uint8_t partial_len;
 103        uint8_t roundup_len;
 104        uint8_t roundup_byte;
 105        uint16_t ip_id;
 106        union {
 107                uint64_t esn;
 108                struct {
 109                        uint32_t seq;
 110                        uint32_t esn_hi;
 111                };
 112        };
 113
 114        uint64_t inst_w7;
 115
 116        /* CPT QP used by SA */
 117        struct otx2_cpt_qp *qp;
 118};
 119
 120int otx2_eth_sec_ctx_create(struct rte_eth_dev *eth_dev);
 121
 122void otx2_eth_sec_ctx_destroy(struct rte_eth_dev *eth_dev);
 123
 124int otx2_eth_sec_update_tag_type(struct rte_eth_dev *eth_dev);
 125
 126int otx2_eth_sec_init(struct rte_eth_dev *eth_dev);
 127
 128void otx2_eth_sec_fini(struct rte_eth_dev *eth_dev);
 129
 130#endif /* __OTX2_ETHDEV_SEC_H__ */
 131