LXR dpdk/lib/pci/rte

   1/* SPDX-License-Identifier: BSD-3-Clause
   2 * Copyright(c) 2010-2015 Intel Corporation.
   3 * Copyright 2013-2014 6WIND S.A.
   4 */
   5
   6#ifndef _RTE_PCI_H_
   7#define _RTE_PCI_H_
   8
   9/**
  10 * @file
  11 *
  12 * RTE PCI Library
  13 */
  14
  15#ifdef __cplusplus
  16extern "C" {
  17#endif
  18
  19#include <stdio.h>
  20#include <limits.h>
  21#include <sys/queue.h>
  22#include <inttypes.h>
  23#include <sys/types.h>
  24
  25/*
  26 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
  27 * configuration space.  PCI-X Mode 2 and PCIe devices have 4096 bytes of
  28 * configuration space.
  29 */
  30#define RTE_PCI_CFG_SPACE_SIZE          256
  31#define RTE_PCI_CFG_SPACE_EXP_SIZE      4096
  32
  33#define RTE_PCI_VENDOR_ID       0x00    /* 16 bits */
  34#define RTE_PCI_DEVICE_ID       0x02    /* 16 bits */
  35#define RTE_PCI_COMMAND         0x04    /* 16 bits */
  36
  37/* PCI Command Register */
  38#define RTE_PCI_COMMAND_MASTER  0x4     /* Bus Master Enable */
  39
  40/* PCI Express capability registers */
  41#define RTE_PCI_EXP_DEVCTL      8       /* Device Control */
  42
  43/* Extended Capabilities (PCI-X 2.0 and Express) */
  44#define RTE_PCI_EXT_CAP_ID(header)      (header & 0x0000ffff)
  45#define RTE_PCI_EXT_CAP_NEXT(header)    ((header >> 20) & 0xffc)
  46
  47#define RTE_PCI_EXT_CAP_ID_ERR          0x01    /* Advanced Error Reporting */
  48#define RTE_PCI_EXT_CAP_ID_DSN          0x03    /* Device Serial Number */
  49#define RTE_PCI_EXT_CAP_ID_SRIOV        0x10    /* SR-IOV*/
  50
  51/* Single Root I/O Virtualization */
  52#define RTE_PCI_SRIOV_CAP               0x04    /* SR-IOV Capabilities */
  53#define RTE_PCI_SRIOV_CTRL              0x08    /* SR-IOV Control */
  54#define RTE_PCI_SRIOV_INITIAL_VF        0x0c    /* Initial VFs */
  55#define RTE_PCI_SRIOV_TOTAL_VF          0x0e    /* Total VFs */
  56#define RTE_PCI_SRIOV_NUM_VF            0x10    /* Number of VFs */
  57#define RTE_PCI_SRIOV_FUNC_LINK         0x12    /* Function Dependency Link */
  58#define RTE_PCI_SRIOV_VF_OFFSET         0x14    /* First VF Offset */
  59#define RTE_PCI_SRIOV_VF_STRIDE         0x16    /* Following VF Stride */
  60#define RTE_PCI_SRIOV_VF_DID            0x1a    /* VF Device ID */
  61#define RTE_PCI_SRIOV_SUP_PGSIZE        0x1c    /* Supported Page Sizes */
  62
  63/** Formatting string for PCI device identifier: Ex: 0000:00:01.0 */
  64#define PCI_PRI_FMT "%.4" PRIx32 ":%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
  65#define PCI_PRI_STR_SIZE sizeof("XXXXXXXX:XX:XX.X")
  66
  67/** Short formatting string, without domain, for PCI device: Ex: 00:01.0 */
  68#define PCI_SHORT_PRI_FMT "%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
  69
  70/** Nb. of values in PCI device identifier format string. */
  71#define PCI_FMT_NVAL 4
  72
  73/** Nb. of values in PCI resource format. */
  74#define PCI_RESOURCE_FMT_NVAL 3
  75
  76/** Maximum number of PCI resources. */
  77#define PCI_MAX_RESOURCE 6
  78
  79/**
  80 * A structure describing an ID for a PCI driver. Each driver provides a
  81 * table of these IDs for each device that it supports.
  82 */
  83struct rte_pci_id {
  84        uint32_t class_id;            /**< Class ID or RTE_CLASS_ANY_ID. */
  85        uint16_t vendor_id;           /**< Vendor ID or RTE_PCI_ANY_ID. */
  86        uint16_t device_id;           /**< Device ID or RTE_PCI_ANY_ID. */
  87        uint16_t subsystem_vendor_id; /**< Subsystem vendor ID or RTE_PCI_ANY_ID. */
  88        uint16_t subsystem_device_id; /**< Subsystem device ID or RTE_PCI_ANY_ID. */
  89};
  90
  91/**
  92 * A structure describing the location of a PCI device.
  93 */
  94struct rte_pci_addr {
  95        uint32_t domain;                /**< Device domain */
  96        uint8_t bus;                    /**< Device bus */
  97        uint8_t devid;                  /**< Device ID */
  98        uint8_t function;               /**< Device function. */
  99};
 100
 101/** Any PCI device identifier (vendor, device, ...) */
 102#define RTE_PCI_ANY_ID (0xffff)
 103/** @deprecated Replaced with RTE_PCI_ANY_ID */
 104#define PCI_ANY_ID RTE_DEPRECATED(PCI_ANY_ID) RTE_PCI_ANY_ID
 105#define RTE_CLASS_ANY_ID (0xffffff)
 106
 107/**
 108 * Utility function to write a pci device name, this device name can later be
 109 * used to retrieve the corresponding rte_pci_addr using eal_parse_pci_*
 110 * BDF helpers.
 111 *
 112 * @param addr
 113 *      The PCI Bus-Device-Function address
 114 * @param output
 115 *      The output buffer string
 116 * @param size
 117 *      The output buffer size
 118 */
 119void rte_pci_device_name(const struct rte_pci_addr *addr,
 120                     char *output, size_t size);
 121
 122/**
 123 * Utility function to compare two PCI device addresses.
 124 *
 125 * @param addr
 126 *      The PCI Bus-Device-Function address to compare
 127 * @param addr2
 128 *      The PCI Bus-Device-Function address to compare
 129 * @return
 130 *      0 on equal PCI address.
 131 *      Positive on addr is greater than addr2.
 132 *      Negative on addr is less than addr2, or error.
 133 */
 134int rte_pci_addr_cmp(const struct rte_pci_addr *addr,
 135                     const struct rte_pci_addr *addr2);
 136
 137
 138/**
 139 * Utility function to parse a string into a PCI location.
 140 *
 141 * @param str
 142 *      The string to parse
 143 * @param addr
 144 *      The reference to the structure where the location
 145 *      is stored.
 146 * @return
 147 *      0 on success
 148 *      <0 otherwise
 149 */
 150int rte_pci_addr_parse(const char *str, struct rte_pci_addr *addr);
 151
 152#ifdef __cplusplus
 153}
 154#endif
 155
 156#endif /* _RTE_PCI_H_ */
 157