1
2
3
4
5#ifndef _CNXK_BPHY_H_
6#define _CNXK_BPHY_H_
7
8#include <stdint.h>
9
10#include <rte_common.h>
11#include <rte_dev.h>
12#include <rte_malloc.h>
13#include <rte_memcpy.h>
14#include <rte_rawdev.h>
15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20enum cnxk_bphy_cgx_msg_type {
21 CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO,
22 CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE,
23 CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE,
24 CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE,
25 CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE,
26 CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_MODE,
27 CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE,
28 CNXK_BPHY_CGX_MSG_TYPE_START_RXTX,
29 CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX,
30 CNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC,
31 CNXK_BPHY_CGX_MSG_TYPE_SET_FEC,
32};
33
34enum cnxk_bphy_cgx_eth_link_speed {
35 CNXK_BPHY_CGX_ETH_LINK_SPEED_NONE,
36 CNXK_BPHY_CGX_ETH_LINK_SPEED_10M,
37 CNXK_BPHY_CGX_ETH_LINK_SPEED_100M,
38 CNXK_BPHY_CGX_ETH_LINK_SPEED_1G,
39 CNXK_BPHY_CGX_ETH_LINK_SPEED_2HG,
40 CNXK_BPHY_CGX_ETH_LINK_SPEED_5G,
41 CNXK_BPHY_CGX_ETH_LINK_SPEED_10G,
42 CNXK_BPHY_CGX_ETH_LINK_SPEED_20G,
43 CNXK_BPHY_CGX_ETH_LINK_SPEED_25G,
44 CNXK_BPHY_CGX_ETH_LINK_SPEED_40G,
45 CNXK_BPHY_CGX_ETH_LINK_SPEED_50G,
46 CNXK_BPHY_CGX_ETH_LINK_SPEED_80G,
47 CNXK_BPHY_CGX_ETH_LINK_SPEED_100G,
48 __CNXK_BPHY_CGX_ETH_LINK_SPEED_MAX
49};
50
51enum cnxk_bphy_cgx_eth_link_fec {
52 CNXK_BPHY_CGX_ETH_LINK_FEC_NONE,
53 CNXK_BPHY_CGX_ETH_LINK_FEC_BASE_R,
54 CNXK_BPHY_CGX_ETH_LINK_FEC_RS,
55 __CNXK_BPHY_CGX_ETH_LINK_FEC_MAX
56};
57
58enum cnxk_bphy_cgx_eth_link_mode {
59 CNXK_BPHY_CGX_ETH_LINK_MODE_SGMII_BIT,
60 CNXK_BPHY_CGX_ETH_LINK_MODE_1000_BASEX_BIT,
61 CNXK_BPHY_CGX_ETH_LINK_MODE_QSGMII_BIT,
62 CNXK_BPHY_CGX_ETH_LINK_MODE_10G_C2C_BIT,
63 CNXK_BPHY_CGX_ETH_LINK_MODE_10G_C2M_BIT,
64 CNXK_BPHY_CGX_ETH_LINK_MODE_10G_KR_BIT,
65 CNXK_BPHY_CGX_ETH_LINK_MODE_20G_C2C_BIT,
66 CNXK_BPHY_CGX_ETH_LINK_MODE_25G_C2C_BIT,
67 CNXK_BPHY_CGX_ETH_LINK_MODE_25G_C2M_BIT,
68 CNXK_BPHY_CGX_ETH_LINK_MODE_25G_2_C2C_BIT,
69 CNXK_BPHY_CGX_ETH_LINK_MODE_25G_CR_BIT,
70 CNXK_BPHY_CGX_ETH_LINK_MODE_25G_KR_BIT,
71 CNXK_BPHY_CGX_ETH_LINK_MODE_40G_C2C_BIT,
72 CNXK_BPHY_CGX_ETH_LINK_MODE_40G_C2M_BIT,
73 CNXK_BPHY_CGX_ETH_LINK_MODE_40G_CR4_BIT,
74 CNXK_BPHY_CGX_ETH_LINK_MODE_40G_KR4_BIT,
75 CNXK_BPHY_CGX_ETH_LINK_MODE_40GAUI_C2C_BIT,
76 CNXK_BPHY_CGX_ETH_LINK_MODE_50G_C2C_BIT,
77 CNXK_BPHY_CGX_ETH_LINK_MODE_50G_C2M_BIT,
78 CNXK_BPHY_CGX_ETH_LINK_MODE_50G_4_C2C_BIT,
79 CNXK_BPHY_CGX_ETH_LINK_MODE_50G_CR_BIT,
80 CNXK_BPHY_CGX_ETH_LINK_MODE_50G_KR_BIT,
81 CNXK_BPHY_CGX_ETH_LINK_MODE_80GAUI_C2C_BIT,
82 CNXK_BPHY_CGX_ETH_LINK_MODE_100G_C2C_BIT,
83 CNXK_BPHY_CGX_ETH_LINK_MODE_100G_C2M_BIT,
84 CNXK_BPHY_CGX_ETH_LINK_MODE_100G_CR4_BIT,
85 CNXK_BPHY_CGX_ETH_LINK_MODE_100G_KR4_BIT,
86 __CNXK_BPHY_CGX_ETH_LINK_MODE_MAX
87};
88
89struct cnxk_bphy_cgx_msg_link_mode {
90 bool full_duplex;
91 bool autoneg;
92 enum cnxk_bphy_cgx_eth_link_speed speed;
93 enum cnxk_bphy_cgx_eth_link_mode mode;
94};
95
96struct cnxk_bphy_cgx_msg_link_info {
97 bool link_up;
98 bool full_duplex;
99 enum cnxk_bphy_cgx_eth_link_speed speed;
100 bool autoneg;
101 enum cnxk_bphy_cgx_eth_link_fec fec;
102 enum cnxk_bphy_cgx_eth_link_mode mode;
103};
104
105struct cnxk_bphy_cgx_msg_set_link_state {
106 bool state;
107};
108
109struct cnxk_bphy_cgx_msg {
110 enum cnxk_bphy_cgx_msg_type type;
111
112
113
114
115 void *data;
116};
117
118#define CNXK_BPHY_DEF_QUEUE 0
119
120typedef void (*cnxk_bphy_intr_handler_t)(int irq_num, void *isr_data);
121
122struct cnxk_bphy_mem {
123 struct rte_mem_resource res0;
124 struct rte_mem_resource res2;
125};
126
127enum cnxk_bphy_irq_msg_type {
128 CNXK_BPHY_IRQ_MSG_TYPE_INIT,
129 CNXK_BPHY_IRQ_MSG_TYPE_FINI,
130 CNXK_BPHY_IRQ_MSG_TYPE_REGISTER,
131 CNXK_BPHY_IRQ_MSG_TYPE_UNREGISTER,
132 CNXK_BPHY_IRQ_MSG_TYPE_MEM_GET,
133 CNXK_BPHY_MSG_TYPE_NPA_PF_FUNC,
134 CNXK_BPHY_MSG_TYPE_SSO_PF_FUNC,
135};
136
137struct cnxk_bphy_irq_msg {
138 enum cnxk_bphy_irq_msg_type type;
139
140
141
142
143
144
145
146 void *data;
147};
148
149struct cnxk_bphy_irq_info {
150 int irq_num;
151 cnxk_bphy_intr_handler_t handler;
152 void *data;
153 int cpu;
154};
155
156static __rte_always_inline int
157__rte_pmd_bphy_enq_deq(uint16_t dev_id, unsigned int queue, void *req,
158 void *rsp, size_t rsp_size)
159{
160 struct rte_rawdev_buf *bufs[1];
161 struct rte_rawdev_buf buf;
162 void *q;
163 int ret;
164
165 q = (void *)(size_t)queue;
166 buf.buf_addr = req;
167 bufs[0] = &buf;
168
169 ret = rte_rawdev_enqueue_buffers(dev_id, bufs, RTE_DIM(bufs), q);
170 if (ret < 0)
171 return ret;
172 if (ret != RTE_DIM(bufs))
173 return -EIO;
174
175 if (!rsp)
176 return 0;
177
178 ret = rte_rawdev_dequeue_buffers(dev_id, bufs, RTE_DIM(bufs), q);
179 if (ret < 0)
180 return ret;
181 if (ret != RTE_DIM(bufs))
182 return -EIO;
183
184 rte_memcpy(rsp, buf.buf_addr, rsp_size);
185 rte_free(buf.buf_addr);
186
187 return 0;
188}
189
190static __rte_always_inline int
191rte_pmd_bphy_intr_init(uint16_t dev_id)
192{
193 struct cnxk_bphy_irq_msg msg = {
194 .type = CNXK_BPHY_IRQ_MSG_TYPE_INIT,
195 };
196
197 return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
198 NULL, 0);
199}
200
201static __rte_always_inline int
202rte_pmd_bphy_intr_fini(uint16_t dev_id)
203{
204 struct cnxk_bphy_irq_msg msg = {
205 .type = CNXK_BPHY_IRQ_MSG_TYPE_FINI,
206 };
207
208 return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
209 NULL, 0);
210}
211
212static __rte_always_inline int
213rte_pmd_bphy_intr_register(uint16_t dev_id, int irq_num,
214 cnxk_bphy_intr_handler_t handler, void *data,
215 int cpu)
216{
217 struct cnxk_bphy_irq_info info = {
218 .irq_num = irq_num,
219 .handler = handler,
220 .data = data,
221 .cpu = cpu,
222 };
223 struct cnxk_bphy_irq_msg msg = {
224 .type = CNXK_BPHY_IRQ_MSG_TYPE_REGISTER,
225 .data = &info
226 };
227
228 return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
229 NULL, 0);
230}
231
232static __rte_always_inline int
233rte_pmd_bphy_intr_unregister(uint16_t dev_id, int irq_num)
234{
235 struct cnxk_bphy_irq_info info = {
236 .irq_num = irq_num,
237 };
238 struct cnxk_bphy_irq_msg msg = {
239 .type = CNXK_BPHY_IRQ_MSG_TYPE_UNREGISTER,
240 .data = &info
241 };
242
243 return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
244 NULL, 0);
245}
246
247static __rte_always_inline int
248rte_pmd_bphy_intr_mem_get(uint16_t dev_id, struct cnxk_bphy_mem *mem)
249{
250 struct cnxk_bphy_irq_msg msg = {
251 .type = CNXK_BPHY_IRQ_MSG_TYPE_MEM_GET,
252 };
253
254 return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
255 mem, sizeof(*mem));
256}
257
258static __rte_always_inline int
259rte_pmd_bphy_npa_pf_func_get(uint16_t dev_id, uint16_t *pf_func)
260{
261 struct cnxk_bphy_irq_msg msg = {
262 .type = CNXK_BPHY_MSG_TYPE_NPA_PF_FUNC,
263 };
264
265 return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
266 pf_func, sizeof(*pf_func));
267}
268
269static __rte_always_inline int
270rte_pmd_bphy_sso_pf_func_get(uint16_t dev_id, uint16_t *pf_func)
271{
272 struct cnxk_bphy_irq_msg msg = {
273 .type = CNXK_BPHY_MSG_TYPE_SSO_PF_FUNC,
274 };
275
276 return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
277 pf_func, sizeof(*pf_func));
278}
279
280static __rte_always_inline int
281rte_pmd_bphy_cgx_get_link_info(uint16_t dev_id, uint16_t lmac,
282 struct cnxk_bphy_cgx_msg_link_info *info)
283{
284 struct cnxk_bphy_cgx_msg msg = {
285 .type = CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO,
286 };
287
288 return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, info, sizeof(*info));
289}
290
291static __rte_always_inline int
292rte_pmd_bphy_cgx_intlbk_disable(uint16_t dev_id, uint16_t lmac)
293{
294 struct cnxk_bphy_cgx_msg msg = {
295 .type = CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE,
296 };
297
298 return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
299}
300
301static __rte_always_inline int
302rte_pmd_bphy_cgx_intlbk_enable(uint16_t dev_id, uint16_t lmac)
303{
304 struct cnxk_bphy_cgx_msg msg = {
305 .type = CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE,
306 };
307
308 return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
309}
310
311static __rte_always_inline int
312rte_pmd_bphy_cgx_ptp_rx_disable(uint16_t dev_id, uint16_t lmac)
313{
314 struct cnxk_bphy_cgx_msg msg = {
315 .type = CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE,
316 };
317
318 return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
319}
320
321static __rte_always_inline int
322rte_pmd_bphy_cgx_ptp_rx_enable(uint16_t dev_id, uint16_t lmac)
323{
324 struct cnxk_bphy_cgx_msg msg = {
325 .type = CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE,
326 };
327
328 return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
329}
330
331static __rte_always_inline int
332rte_pmd_bphy_cgx_set_link_mode(uint16_t dev_id, uint16_t lmac,
333 struct cnxk_bphy_cgx_msg_link_mode *mode)
334{
335 struct cnxk_bphy_cgx_msg msg = {
336 .type = CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_MODE,
337 .data = mode,
338 };
339
340 return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
341}
342
343static __rte_always_inline int
344rte_pmd_bphy_cgx_set_link_state(uint16_t dev_id, uint16_t lmac, bool up)
345{
346 struct cnxk_bphy_cgx_msg_set_link_state state = {
347 .state = up,
348 };
349 struct cnxk_bphy_cgx_msg msg = {
350 .type = CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE,
351 .data = &state,
352 };
353
354 return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
355}
356
357static __rte_always_inline int
358rte_pmd_bphy_cgx_start_rxtx(uint16_t dev_id, uint16_t lmac)
359{
360 struct cnxk_bphy_cgx_msg msg = {
361 .type = CNXK_BPHY_CGX_MSG_TYPE_START_RXTX,
362 };
363
364 return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
365}
366
367static __rte_always_inline int
368rte_pmd_bphy_cgx_stop_rxtx(uint16_t dev_id, uint16_t lmac)
369{
370 struct cnxk_bphy_cgx_msg msg = {
371 .type = CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX,
372 };
373
374 return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
375}
376
377static __rte_always_inline int
378rte_pmd_bphy_cgx_get_supported_fec(uint16_t dev_id, uint16_t lmac,
379 enum cnxk_bphy_cgx_eth_link_fec *fec)
380{
381 struct cnxk_bphy_cgx_msg msg = {
382 .type = CNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC,
383 };
384
385 return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, fec, sizeof(*fec));
386}
387
388static __rte_always_inline int
389rte_pmd_bphy_cgx_set_fec(uint16_t dev_id, uint16_t lmac,
390 enum cnxk_bphy_cgx_eth_link_fec fec)
391{
392 struct cnxk_bphy_cgx_msg msg = {
393 .type = CNXK_BPHY_CGX_MSG_TYPE_SET_FEC,
394 .data = &fec,
395 };
396
397 return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
398}
399
400#ifdef __cplusplus
401}
402#endif
403
404#endif
405
