LXR dpdk/drivers/event/cnxk/cnxk

   1/* SPDX-License-Identifier: BSD-3-Clause
   2 * Copyright(C) 2021 Marvell.
   3 */
   4
   5#ifndef __CNXK_EVENTDEV_H__
   6#define __CNXK_EVENTDEV_H__
   7
   8#include <string.h>
   9
  10#include <cryptodev_pmd.h>
  11#include <rte_devargs.h>
  12#include <rte_ethdev.h>
  13#include <rte_event_eth_rx_adapter.h>
  14#include <rte_event_eth_tx_adapter.h>
  15#include <rte_kvargs.h>
  16#include <rte_mbuf_pool_ops.h>
  17#include <rte_pci.h>
  18
  19#include <eventdev_pmd_pci.h>
  20
  21#include "roc_api.h"
  22
  23#include "cnxk_tim_evdev.h"
  24
  25#define CNXK_SSO_XAE_CNT   "xae_cnt"
  26#define CNXK_SSO_GGRP_QOS  "qos"
  27#define CNXK_SSO_FORCE_BP  "force_rx_bp"
  28#define CN9K_SSO_SINGLE_WS "single_ws"
  29#define CN10K_SSO_GW_MODE  "gw_mode"
  30
  31#define NSEC2USEC(__ns)         ((__ns) / 1E3)
  32#define USEC2NSEC(__us)         ((__us)*1E3)
  33#define NSEC2TICK(__ns, __freq) (((__ns) * (__freq)) / 1E9)
  34
  35#define CNXK_SSO_MAX_HWGRP     (RTE_EVENT_MAX_QUEUES_PER_DEV + 1)
  36#define CNXK_SSO_FC_NAME       "cnxk_evdev_xaq_fc"
  37#define CNXK_SSO_MZ_NAME       "cnxk_evdev_mz"
  38#define CNXK_SSO_XAQ_CACHE_CNT (0x7)
  39#define CNXK_SSO_XAQ_SLACK     (8)
  40#define CNXK_SSO_WQE_SG_PTR    (9)
  41
  42#define CNXK_TT_FROM_TAG(x)         (((x) >> 32) & SSO_TT_EMPTY)
  43#define CNXK_TT_FROM_EVENT(x)       (((x) >> 38) & SSO_TT_EMPTY)
  44#define CNXK_EVENT_TYPE_FROM_TAG(x) (((x) >> 28) & 0xf)
  45#define CNXK_SUB_EVENT_FROM_TAG(x)  (((x) >> 20) & 0xff)
  46#define CNXK_CLR_SUB_EVENT(x)       (~(0xffull << 20) & x)
  47#define CNXK_GRP_FROM_TAG(x)        (((x) >> 36) & 0x3ff)
  48#define CNXK_SWTAG_PEND(x)          (BIT_ULL(62) & x)
  49#define CNXK_TAG_IS_HEAD(x)         (BIT_ULL(35) & x)
  50
  51#define CN9K_SSOW_GET_BASE_ADDR(_GW) ((_GW)-SSOW_LF_GWS_OP_GET_WORK0)
  52
  53#define CN10K_GW_MODE_NONE     0
  54#define CN10K_GW_MODE_PREF     1
  55#define CN10K_GW_MODE_PREF_WFE 2
  56
  57#define CNXK_VALID_DEV_OR_ERR_RET(dev, drv_name)                               \
  58        do {                                                                   \
  59                if (strncmp(dev->driver->name, drv_name, strlen(drv_name)))    \
  60                        return -EINVAL;                                        \
  61        } while (0)
  62
  63typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id);
  64typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t grp_base);
  65typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws);
  66typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map,
  67                               uint16_t nb_link);
  68typedef int (*cnxk_sso_unlink_t)(void *dev, void *ws, uint16_t *map,
  69                                 uint16_t nb_link);
  70typedef void (*cnxk_handle_event_t)(void *arg, struct rte_event ev);
  71typedef void (*cnxk_sso_hws_reset_t)(void *arg, void *ws);
  72typedef void (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,
  73                                     cnxk_handle_event_t fn, void *arg);
  74
  75struct cnxk_sso_qos {
  76        uint16_t queue;
  77        uint16_t xaq_prcnt;
  78        uint16_t taq_prcnt;
  79        uint16_t iaq_prcnt;
  80};
  81
  82struct cnxk_sso_evdev {
  83        struct roc_sso sso;
  84        uint8_t max_event_queues;
  85        uint8_t max_event_ports;
  86        uint8_t is_timeout_deq;
  87        uint8_t nb_event_queues;
  88        uint8_t nb_event_ports;
  89        uint8_t configured;
  90        uint32_t deq_tmo_ns;
  91        uint32_t min_dequeue_timeout_ns;
  92        uint32_t max_dequeue_timeout_ns;
  93        int32_t max_num_events;
  94        uint64_t xaq_lmt;
  95        rte_iova_t fc_iova;
  96        uint64_t rx_offloads;
  97        uint64_t tx_offloads;
  98        uint64_t adptr_xae_cnt;
  99        uint16_t rx_adptr_pool_cnt;
 100        uint64_t *rx_adptr_pools;
 101        uint64_t *tx_adptr_data;
 102        size_t tx_adptr_data_sz;
 103        uint16_t max_port_id;
 104        uint16_t max_queue_id[RTE_MAX_ETHPORTS];
 105        uint8_t tx_adptr_configured;
 106        uint16_t tim_adptr_ring_cnt;
 107        uint16_t *timer_adptr_rings;
 108        uint64_t *timer_adptr_sz;
 109        uint16_t vec_pool_cnt;
 110        uint64_t *vec_pools;
 111        /* Dev args */
 112        uint32_t xae_cnt;
 113        uint8_t qos_queue_cnt;
 114        struct cnxk_sso_qos *qos_parse_data;
 115        uint8_t force_ena_bp;
 116        /* CN9K */
 117        uint8_t dual_ws;
 118        /* CN10K */
 119        uint8_t gw_mode;
 120        /* Crypto adapter */
 121        uint8_t is_ca_internal_port;
 122} __rte_cache_aligned;
 123
 124struct cn10k_sso_hws {
 125        uint64_t base;
 126        uint64_t gw_rdata;
 127        /* PTP timestamp */
 128        struct cnxk_timesync_info *tstamp;
 129        void *lookup_mem;
 130        uint32_t gw_wdata;
 131        uint8_t swtag_req;
 132        uint8_t hws_id;
 133        /* Add Work Fastpath data */
 134        uint64_t xaq_lmt __rte_cache_aligned;
 135        uint64_t *fc_mem;
 136        uintptr_t grp_base;
 137        /* Tx Fastpath data */
 138        uintptr_t lmt_base __rte_cache_aligned;
 139        uint64_t lso_tun_fmt;
 140        uint8_t tx_adptr_data[];
 141} __rte_cache_aligned;
 142
 143/* Event port a.k.a GWS */
 144struct cn9k_sso_hws {
 145        uint64_t base;
 146        uint64_t gw_wdata;
 147        /* PTP timestamp */
 148        struct cnxk_timesync_info *tstamp;
 149        void *lookup_mem;
 150        uint8_t swtag_req;
 151        uint8_t hws_id;
 152        /* Add Work Fastpath data */
 153        uint64_t xaq_lmt __rte_cache_aligned;
 154        uint64_t *fc_mem;
 155        uintptr_t grp_base;
 156        /* Tx Fastpath data */
 157        uint64_t lso_tun_fmt __rte_cache_aligned;
 158        uint8_t tx_adptr_data[];
 159} __rte_cache_aligned;
 160
 161struct cn9k_sso_hws_dual {
 162        uint64_t base[2]; /* Ping and Pong */
 163        uint64_t gw_wdata;
 164        /* PTP timestamp */
 165        struct cnxk_timesync_info *tstamp;
 166        void *lookup_mem;
 167        uint8_t swtag_req;
 168        uint8_t vws; /* Ping pong bit */
 169        uint8_t hws_id;
 170        /* Add Work Fastpath data */
 171        uint64_t xaq_lmt __rte_cache_aligned;
 172        uint64_t *fc_mem;
 173        uintptr_t grp_base;
 174        /* Tx Fastpath data */
 175        uint64_t lso_tun_fmt __rte_cache_aligned;
 176        uint8_t tx_adptr_data[];
 177} __rte_cache_aligned;
 178
 179struct cnxk_sso_hws_cookie {
 180        const struct rte_eventdev *event_dev;
 181        bool configured;
 182} __rte_cache_aligned;
 183
 184static inline int
 185parse_kvargs_flag(const char *key, const char *value, void *opaque)
 186{
 187        RTE_SET_USED(key);
 188
 189        *(uint8_t *)opaque = !!atoi(value);
 190        return 0;
 191}
 192
 193static inline int
 194parse_kvargs_value(const char *key, const char *value, void *opaque)
 195{
 196        RTE_SET_USED(key);
 197
 198        *(uint32_t *)opaque = (uint32_t)atoi(value);
 199        return 0;
 200}
 201
 202static inline struct cnxk_sso_evdev *
 203cnxk_sso_pmd_priv(const struct rte_eventdev *event_dev)
 204{
 205        return event_dev->data->dev_private;
 206}
 207
 208static inline struct cnxk_sso_hws_cookie *
 209cnxk_sso_hws_get_cookie(void *ws)
 210{
 211        return RTE_PTR_SUB(ws, sizeof(struct cnxk_sso_hws_cookie));
 212}
 213
 214/* Configuration functions */
 215int cnxk_sso_xae_reconfigure(struct rte_eventdev *event_dev);
 216int cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev);
 217void cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data,
 218                           uint32_t event_type);
 219
 220/* Common ops API. */
 221int cnxk_sso_init(struct rte_eventdev *event_dev);
 222int cnxk_sso_fini(struct rte_eventdev *event_dev);
 223int cnxk_sso_remove(struct rte_pci_device *pci_dev);
 224void cnxk_sso_info_get(struct cnxk_sso_evdev *dev,
 225                       struct rte_event_dev_info *dev_info);
 226int cnxk_sso_dev_validate(const struct rte_eventdev *event_dev);
 227int cnxk_setup_event_ports(const struct rte_eventdev *event_dev,
 228                           cnxk_sso_init_hws_mem_t init_hws_mem,
 229                           cnxk_sso_hws_setup_t hws_setup);
 230void cnxk_sso_restore_links(const struct rte_eventdev *event_dev,
 231                            cnxk_sso_link_t link_fn);
 232void cnxk_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id,
 233                             struct rte_event_queue_conf *queue_conf);
 234int cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id,
 235                         const struct rte_event_queue_conf *queue_conf);
 236void cnxk_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id);
 237void cnxk_sso_port_def_conf(struct rte_eventdev *event_dev, uint8_t port_id,
 238                            struct rte_event_port_conf *port_conf);
 239int cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
 240                        cnxk_sso_hws_setup_t hws_setup_fn);
 241int cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns,
 242                           uint64_t *tmo_ticks);
 243int cnxk_sso_start(struct rte_eventdev *event_dev,
 244                   cnxk_sso_hws_reset_t reset_fn,
 245                   cnxk_sso_hws_flush_t flush_fn);
 246void cnxk_sso_stop(struct rte_eventdev *event_dev,
 247                   cnxk_sso_hws_reset_t reset_fn,
 248                   cnxk_sso_hws_flush_t flush_fn);
 249int cnxk_sso_close(struct rte_eventdev *event_dev, cnxk_sso_unlink_t unlink_fn);
 250int cnxk_sso_selftest(const char *dev_name);
 251void cnxk_sso_dump(struct rte_eventdev *event_dev, FILE *f);
 252
 253/* Stats API. */
 254int cnxk_sso_xstats_get_names(const struct rte_eventdev *event_dev,
 255                              enum rte_event_dev_xstats_mode mode,
 256                              uint8_t queue_port_id,
 257                              struct rte_event_dev_xstats_name *xstats_names,
 258                              unsigned int *ids, unsigned int size);
 259int cnxk_sso_xstats_get(const struct rte_eventdev *event_dev,
 260                        enum rte_event_dev_xstats_mode mode,
 261                        uint8_t queue_port_id, const unsigned int ids[],
 262                        uint64_t values[], unsigned int n);
 263int cnxk_sso_xstats_reset(struct rte_eventdev *event_dev,
 264                          enum rte_event_dev_xstats_mode mode,
 265                          int16_t queue_port_id, const uint32_t ids[],
 266                          uint32_t n);
 267
 268/* Crypto adapter APIs. */
 269int cnxk_crypto_adapter_qp_add(const struct rte_eventdev *event_dev,
 270                               const struct rte_cryptodev *cdev,
 271                               int32_t queue_pair_id);
 272int cnxk_crypto_adapter_qp_del(const struct rte_cryptodev *cdev,
 273                               int32_t queue_pair_id);
 274
 275/* CN9K */
 276void cn9k_sso_set_rsrc(void *arg);
 277
 278/* Common adapter ops */
 279int cnxk_sso_rx_adapter_queue_add(
 280        const struct rte_eventdev *event_dev, const struct rte_eth_dev *eth_dev,
 281        int32_t rx_queue_id,
 282        const struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
 283int cnxk_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev,
 284                                  const struct rte_eth_dev *eth_dev,
 285                                  int32_t rx_queue_id);
 286int cnxk_sso_rx_adapter_start(const struct rte_eventdev *event_dev,
 287                              const struct rte_eth_dev *eth_dev);
 288int cnxk_sso_rx_adapter_stop(const struct rte_eventdev *event_dev,
 289                             const struct rte_eth_dev *eth_dev);
 290int cnxk_sso_tx_adapter_queue_add(const struct rte_eventdev *event_dev,
 291                                  const struct rte_eth_dev *eth_dev,
 292                                  int32_t tx_queue_id);
 293int cnxk_sso_tx_adapter_queue_del(const struct rte_eventdev *event_dev,
 294                                  const struct rte_eth_dev *eth_dev,
 295                                  int32_t tx_queue_id);
 296
 297#endif /* __CNXK_EVENTDEV_H__ */
 298