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4
5#ifndef _IXGBE_COMMON_H_
6#define _IXGBE_COMMON_H_
7
8#include "ixgbe_type.h"
9#define IXGBE_WRITE_REG64(hw, reg, value) \
10 do { \
11 IXGBE_WRITE_REG(hw, reg, (u32) value); \
12 IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
13 } while (0)
14#define IXGBE_REMOVED(a) (0)
15struct ixgbe_pba {
16 u16 word[2];
17 u16 *pba_block;
18};
19
20void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map);
21
22u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
23s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
24s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
25s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
26void ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
27s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
28s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);
29s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
30 u32 pba_num_size);
31s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
32 u32 eeprom_buf_size, u16 max_pba_block_size,
33 struct ixgbe_pba *pba);
34s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
35 u32 eeprom_buf_size, struct ixgbe_pba *pba);
36s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,
37 u32 eeprom_buf_size, u16 *pba_block_size);
38s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
39s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
40void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status);
41void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
42s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
43
44s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
45s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
46s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw);
47
48s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
49s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
50s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
51 u16 words, u16 *data);
52s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
53s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
54 u16 words, u16 *data);
55s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
56s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
57 u16 words, u16 *data);
58s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
59 u16 *data);
60s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
61 u16 words, u16 *data);
62s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
63s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
64 u16 *checksum_val);
65s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
66s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);
67
68s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
69 u32 enable_addr);
70s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
71s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
72s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list,
73 u32 mc_addr_count,
74 ixgbe_mc_addr_itr func, bool clear);
75s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list,
76 u32 addr_count, ixgbe_mc_addr_itr func);
77s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
78s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
79s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
80s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw);
81s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw);
82
83s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
84bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
85void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
86s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);
87
88s32 ixgbe_validate_mac_addr(u8 *mac_addr);
89s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
90void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
91s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);
92
93s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
94s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);
95
96s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
97s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
98
99s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
100s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
101
102s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
103s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
104s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
105s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
106s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
107s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
108 u32 vind, bool vlan_on, bool vlvf_bypass);
109s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
110 bool vlan_on, u32 *vfta_delta, u32 vfta,
111 bool vlvf_bypass);
112s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
113s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass);
114
115s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
116 ixgbe_link_speed *speed,
117 bool *link_up, bool link_up_wait_to_complete);
118
119s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
120 u16 *wwpn_prefix);
121
122s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs);
123void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
124void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
125s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);
126void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
127 int strategy);
128void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw);
129s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
130 u8 build, u8 ver, u16 len, const char *str);
131u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
132s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
133 u32 length, u32 timeout, bool return_data);
134s32 ixgbe_hic_unlocked(struct ixgbe_hw *, u32 *buffer, u32 length, u32 timeout);
135s32 ixgbe_shutdown_fw_phy(struct ixgbe_hw *);
136s32 ixgbe_fw_phy_activity(struct ixgbe_hw *, u16 activity,
137 u32 (*data)[FW_PHY_ACT_DATA_COUNT]);
138void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
139
140extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);
141extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
142bool ixgbe_mng_present(struct ixgbe_hw *hw);
143bool ixgbe_mng_enabled(struct ixgbe_hw *hw);
144
145#define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8
146#define IXGBE_EMC_INTERNAL_DATA 0x00
147#define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20
148#define IXGBE_EMC_DIODE1_DATA 0x01
149#define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19
150#define IXGBE_EMC_DIODE2_DATA 0x23
151#define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A
152#define IXGBE_EMC_DIODE3_DATA 0x2A
153#define IXGBE_EMC_DIODE3_THERM_LIMIT 0x30
154
155s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);
156s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);
157
158void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver);
159void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
160 struct ixgbe_nvm_version *nvm_ver);
161void ixgbe_get_orom_version(struct ixgbe_hw *hw,
162 struct ixgbe_nvm_version *nvm_ver);
163void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
164void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
165s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
166 ixgbe_link_speed speed,
167 bool autoneg_wait_to_complete);
168void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
169 ixgbe_link_speed speed);
170#endif
171
