LXR dpdk/drivers/net/dpaa/dpaa

   1/* SPDX-License-Identifier: BSD-3-Clause
   2 *
   3 *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
   4 *   Copyright 2017,2020-2021 NXP
   5 *
   6 */
   7
   8#ifndef __DPDK_RXTX_H__
   9#define __DPDK_RXTX_H__
  10
  11/* internal offset from where IC is copied to packet buffer*/
  12#define DEFAULT_ICIOF          32
  13/* IC transfer size */
  14#define DEFAULT_ICSZ    48
  15
  16/* IC offsets from buffer header address */
  17#define DEFAULT_RX_ICEOF        16
  18#define DEFAULT_TX_ICEOF        16
  19
  20/*
  21 * Values for the L3R field of the FM Parse Results
  22 */
  23/* L3 Type field: First IP Present IPv4 */
  24#define DPAA_L3_PARSE_RESULT_IPV4 0x80
  25/* L3 Type field: First IP Present IPv6 */
  26#define DPAA_L3_PARSE_RESULT_IPV6       0x40
  27/* Values for the L4R field of the FM Parse Results
  28 * See $8.8.4.7.20 - L4 HXS - L4 Results from DPAA-Rev2 Reference Manual.
  29 */
  30/* L4 Type field: UDP */
  31#define DPAA_L4_PARSE_RESULT_UDP        0x40
  32/* L4 Type field: TCP */
  33#define DPAA_L4_PARSE_RESULT_TCP        0x20
  34
  35#define DPAA_MAX_DEQUEUE_NUM_FRAMES    63
  36        /** <Maximum number of frames to be dequeued in a single rx call*/
  37
  38/* FD structure masks and offset */
  39#define DPAA_FD_FORMAT_MASK 0xE0000000
  40#define DPAA_FD_OFFSET_MASK 0x1FF00000
  41#define DPAA_FD_LENGTH_MASK 0xFFFFF
  42#define DPAA_FD_FORMAT_SHIFT 29
  43#define DPAA_FD_OFFSET_SHIFT 20
  44
  45/* Parsing mask (Little Endian) - 0x00E044ED00800000
  46 *      Classification Plan ID 0x00
  47 *      L4R 0xE0 -
  48 *              0x20 - TCP
  49 *              0x40 - UDP
  50 *              0x80 - SCTP
  51 *      L3R 0xEDC4 (in Big Endian) -
  52 *              0x8000 - IPv4
  53 *              0x4000 - IPv6
  54 *              0x8140 - IPv4 Ext + Frag
  55 *              0x8040 - IPv4 Frag
  56 *              0x8100 - IPv4 Ext
  57 *              0x4140 - IPv6 Ext + Frag
  58 *              0x4040 - IPv6 Frag
  59 *              0x4100 - IPv6 Ext
  60 *      L2R 0x8000 (in Big Endian) -
  61 *              0x8000 - Ethernet type
  62 *      ShimR & Logical Port ID 0x0000
  63 */
  64#define DPAA_PARSE_MASK                 0x00F044EF00800000
  65#define DPAA_PARSE_VLAN_MASK            0x0000000000700000
  66
  67/* Parsed values (Little Endian) */
  68#define DPAA_PKT_TYPE_NONE              0x0000000000000000
  69#define DPAA_PKT_TYPE_ETHER             0x0000000000800000
  70#define DPAA_PKT_TYPE_IPV4 \
  71                        (0x0000008000000000 | DPAA_PKT_TYPE_ETHER)
  72#define DPAA_PKT_TYPE_IPV6 \
  73                        (0x0000004000000000 | DPAA_PKT_TYPE_ETHER)
  74#define DPAA_PKT_TYPE_GRE \
  75                        (0x0000002000000000 | DPAA_PKT_TYPE_ETHER)
  76#define DPAA_PKT_TYPE_IPV4_FRAG \
  77                        (0x0000400000000000 | DPAA_PKT_TYPE_IPV4)
  78#define DPAA_PKT_TYPE_IPV6_FRAG \
  79                        (0x0000400000000000 | DPAA_PKT_TYPE_IPV6)
  80#define DPAA_PKT_TYPE_IPV4_EXT \
  81                        (0x0000000100000000 | DPAA_PKT_TYPE_IPV4)
  82#define DPAA_PKT_TYPE_IPV6_EXT \
  83                        (0x0000000100000000 | DPAA_PKT_TYPE_IPV6)
  84#define DPAA_PKT_TYPE_IPV4_TCP \
  85                        (0x0020000000000000 | DPAA_PKT_TYPE_IPV4)
  86#define DPAA_PKT_TYPE_IPV6_TCP \
  87                        (0x0020000000000000 | DPAA_PKT_TYPE_IPV6)
  88#define DPAA_PKT_TYPE_IPV4_UDP \
  89                        (0x0040000000000000 | DPAA_PKT_TYPE_IPV4)
  90#define DPAA_PKT_TYPE_IPV6_UDP \
  91                        (0x0040000000000000 | DPAA_PKT_TYPE_IPV6)
  92#define DPAA_PKT_TYPE_IPV4_SCTP \
  93                        (0x0080000000000000 | DPAA_PKT_TYPE_IPV4)
  94#define DPAA_PKT_TYPE_IPV6_SCTP \
  95                        (0x0080000000000000 | DPAA_PKT_TYPE_IPV6)
  96#define DPAA_PKT_TYPE_IPV4_FRAG_TCP \
  97                        (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
  98#define DPAA_PKT_TYPE_IPV6_FRAG_TCP \
  99                        (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
 100#define DPAA_PKT_TYPE_IPV4_FRAG_UDP \
 101                        (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
 102#define DPAA_PKT_TYPE_IPV6_FRAG_UDP \
 103                        (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
 104#define DPAA_PKT_TYPE_IPV4_FRAG_SCTP \
 105                        (0x0080000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
 106#define DPAA_PKT_TYPE_IPV6_FRAG_SCTP \
 107                        (0x0080000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
 108#define DPAA_PKT_TYPE_IPV4_EXT_UDP \
 109                        (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_EXT)
 110#define DPAA_PKT_TYPE_IPV6_EXT_UDP \
 111                        (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_EXT)
 112#define DPAA_PKT_TYPE_IPV4_EXT_TCP \
 113                        (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_EXT)
 114#define DPAA_PKT_TYPE_IPV6_EXT_TCP \
 115                        (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_EXT)
 116#define DPAA_PKT_TYPE_TUNNEL_4_4 \
 117                        (0x0000000800000000 | DPAA_PKT_TYPE_IPV4)
 118#define DPAA_PKT_TYPE_TUNNEL_6_6 \
 119                        (0x0000000400000000 | DPAA_PKT_TYPE_IPV6)
 120#define DPAA_PKT_TYPE_TUNNEL_4_6 \
 121                        (0x0000000400000000 | DPAA_PKT_TYPE_IPV4)
 122#define DPAA_PKT_TYPE_TUNNEL_6_4 \
 123                        (0x0000000800000000 | DPAA_PKT_TYPE_IPV6)
 124#define DPAA_PKT_TYPE_TUNNEL_4_4_UDP \
 125                        (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4)
 126#define DPAA_PKT_TYPE_TUNNEL_6_6_UDP \
 127                        (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6)
 128#define DPAA_PKT_TYPE_TUNNEL_4_6_UDP \
 129                        (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6)
 130#define DPAA_PKT_TYPE_TUNNEL_6_4_UDP \
 131                        (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4)
 132#define DPAA_PKT_TYPE_TUNNEL_4_4_TCP \
 133                        (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4)
 134#define DPAA_PKT_TYPE_TUNNEL_6_6_TCP \
 135                        (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6)
 136#define DPAA_PKT_TYPE_TUNNEL_4_6_TCP \
 137                        (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6)
 138#define DPAA_PKT_TYPE_TUNNEL_6_4_TCP \
 139                        (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4)
 140
 141/* Checksum Errors */
 142#define DPAA_PKT_IP_CSUM_ERR            0x0000400200000000
 143#define DPAA_PKT_L4_CSUM_ERR            0x0010000000000000
 144#define DPAA_PKT_TYPE_IPV4_CSUM_ERR \
 145                        (DPAA_PKT_IP_CSUM_ERR | DPAA_PKT_TYPE_IPV4)
 146#define DPAA_PKT_TYPE_IPV6_CSUM_ERR \
 147                        (DPAA_PKT_IP_CSUM_ERR | DPAA_PKT_TYPE_IPV6)
 148#define DPAA_PKT_TYPE_IPV4_TCP_CSUM_ERR \
 149                        (DPAA_PKT_L4_CSUM_ERR | DPAA_PKT_TYPE_IPV4_TCP)
 150#define DPAA_PKT_TYPE_IPV6_TCP_CSUM_ERR \
 151                        (DPAA_PKT_L4_CSUM_ERR | DPAA_PKT_TYPE_IPV6_TCP)
 152#define DPAA_PKT_TYPE_IPV4_UDP_CSUM_ERR \
 153                        (DPAA_PKT_L4_CSUM_ERR | DPAA_PKT_TYPE_IPV4_UDP)
 154#define DPAA_PKT_TYPE_IPV6_UDP_CSUM_ERR \
 155                        (DPAA_PKT_L4_CSUM_ERR | DPAA_PKT_TYPE_IPV6_UDP)
 156
 157#define DPAA_PKT_L3_LEN_SHIFT   7
 158
 159/**
 160 * FMan parse result array
 161 */
 162struct dpaa_eth_parse_results_t {
 163         uint8_t     lpid;               /**< Logical port id */
 164         uint8_t     shimr;              /**< Shim header result  */
 165         union {
 166                uint16_t              l2r;      /**< Layer 2 result */
 167                struct {
 168#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
 169                        uint16_t      ethernet:1;
 170                        uint16_t      vlan:1;
 171                        uint16_t      llc_snap:1;
 172                        uint16_t      mpls:1;
 173                        uint16_t      ppoe_ppp:1;
 174                        uint16_t      unused_1:3;
 175                        uint16_t      unknown_eth_proto:1;
 176                        uint16_t      eth_frame_type:2;
 177                        uint16_t      l2r_err:5;
 178                        /*00-unicast, 01-multicast, 11-broadcast*/
 179#else
 180                        uint16_t      l2r_err:5;
 181                        uint16_t      eth_frame_type:2;
 182                        uint16_t      unknown_eth_proto:1;
 183                        uint16_t      unused_1:3;
 184                        uint16_t      ppoe_ppp:1;
 185                        uint16_t      mpls:1;
 186                        uint16_t      llc_snap:1;
 187                        uint16_t      vlan:1;
 188                        uint16_t      ethernet:1;
 189#endif
 190                } __rte_packed;
 191         } __rte_packed;
 192         union {
 193                uint16_t              l3r;      /**< Layer 3 result */
 194                struct {
 195#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
 196                        uint16_t      first_ipv4:1;
 197                        uint16_t      first_ipv6:1;
 198                        uint16_t      gre:1;
 199                        uint16_t      min_enc:1;
 200                        uint16_t      last_ipv4:1;
 201                        uint16_t      last_ipv6:1;
 202                        uint16_t      first_info_err:1;/*0 info, 1 error*/
 203                        uint16_t      first_ip_err_code:5;
 204                        uint16_t      last_info_err:1;  /*0 info, 1 error*/
 205                        uint16_t      last_ip_err_code:3;
 206#else
 207                        uint16_t      last_ip_err_code:3;
 208                        uint16_t      last_info_err:1;  /*0 info, 1 error*/
 209                        uint16_t      first_ip_err_code:5;
 210                        uint16_t      first_info_err:1;/*0 info, 1 error*/
 211                        uint16_t      last_ipv6:1;
 212                        uint16_t      last_ipv4:1;
 213                        uint16_t      min_enc:1;
 214                        uint16_t      gre:1;
 215                        uint16_t      first_ipv6:1;
 216                        uint16_t      first_ipv4:1;
 217#endif
 218                } __rte_packed;
 219         } __rte_packed;
 220         union {
 221                uint8_t               l4r;      /**< Layer 4 result */
 222                struct{
 223#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
 224                        uint8_t        l4_type:3;
 225                        uint8_t        l4_info_err:1;
 226                        uint8_t        l4_result:4;
 227                                        /* if type IPSec: 1 ESP, 2 AH */
 228#else
 229                        uint8_t        l4_result:4;
 230                                        /* if type IPSec: 1 ESP, 2 AH */
 231                        uint8_t        l4_info_err:1;
 232                        uint8_t        l4_type:3;
 233#endif
 234                } __rte_packed;
 235         } __rte_packed;
 236         uint8_t     cplan;              /**< Classification plan id */
 237         uint16_t    nxthdr;             /**< Next Header  */
 238         uint16_t    cksum;              /**< Checksum */
 239         uint32_t    lcv;                /**< LCV */
 240         uint8_t     shim_off[3];        /**< Shim offset */
 241         uint8_t     eth_off;            /**< ETH offset */
 242         uint8_t     llc_snap_off;       /**< LLC_SNAP offset */
 243         uint8_t     vlan_off[2];        /**< VLAN offset */
 244         uint8_t     etype_off;          /**< ETYPE offset */
 245         uint8_t     pppoe_off;          /**< PPP offset */
 246         uint8_t     mpls_off[2];        /**< MPLS offset */
 247         uint8_t     ip_off[2];          /**< IP offset */
 248         uint8_t     gre_off;            /**< GRE offset */
 249         uint8_t     l4_off;             /**< Layer 4 offset */
 250         uint8_t     nxthdr_off;         /**< Parser end point */
 251} __rte_packed;
 252
 253/* The structure is the Prepended Data to the Frame which is used by FMAN */
 254struct annotations_t {
 255        uint8_t reserved[DEFAULT_RX_ICEOF];
 256        struct dpaa_eth_parse_results_t parse;  /**< Pointer to Parsed result*/
 257        uint64_t reserved1;
 258        uint64_t hash;                  /**< Hash Result */
 259};
 260
 261#define GET_ANNOTATIONS(_buf) \
 262        (struct annotations_t *)(_buf)
 263
 264#define GET_RX_PRS(_buf) \
 265        (struct dpaa_eth_parse_results_t *)((uint8_t *)(_buf) + \
 266        DEFAULT_RX_ICEOF)
 267
 268#define GET_TX_PRS(_buf) \
 269        (struct dpaa_eth_parse_results_t *)((uint8_t *)(_buf) + \
 270        DEFAULT_TX_ICEOF)
 271
 272uint16_t dpaa_eth_queue_rx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
 273
 274uint16_t dpaa_eth_queue_tx_slow(void *q, struct rte_mbuf **bufs,
 275                                uint16_t nb_bufs);
 276uint16_t dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
 277
 278uint16_t dpaa_eth_tx_drop_all(void *q  __rte_unused,
 279                              struct rte_mbuf **bufs __rte_unused,
 280                              uint16_t nb_bufs __rte_unused);
 281
 282uint16_t dpaa_free_mbuf(const struct qm_fd *fd);
 283void dpaa_rx_cb(struct qman_fq **fq,
 284                struct qm_dqrr_entry **dqrr, void **bufs, int num_bufs);
 285
 286void dpaa_rx_cb_prepare(struct qm_dqrr_entry *dq, void **bufs);
 287
 288void dpaa_rx_cb_no_prefetch(struct qman_fq **fq,
 289                    struct qm_dqrr_entry **dqrr, void **bufs, int num_bufs);
 290#endif
 291