LXR linux/arch/alpha/kernel/irq

   1/*
   2 * Handle interrupts from the SRM, assuming no additional weirdness.
   3 */
   4
   5#include <linux/init.h>
   6#include <linux/sched.h>
   7#include <linux/irq.h>
   8
   9#include "proto.h"
  10#include "irq_impl.h"
  11
  12
  13/*
  14 * Is the palcode SMP safe? In other words: can we call cserve_ena/dis
  15 * at the same time in multiple CPUs? To be safe I added a spinlock
  16 * but it can be removed trivially if the palcode is robust against smp.
  17 */
  18DEFINE_SPINLOCK(srm_irq_lock);
  19
  20static inline void
  21srm_enable_irq(struct irq_data *d)
  22{
  23        spin_lock(&srm_irq_lock);
  24        cserve_ena(d->irq - 16);
  25        spin_unlock(&srm_irq_lock);
  26}
  27
  28static void
  29srm_disable_irq(struct irq_data *d)
  30{
  31        spin_lock(&srm_irq_lock);
  32        cserve_dis(d->irq - 16);
  33        spin_unlock(&srm_irq_lock);
  34}
  35
  36/* Handle interrupts from the SRM, assuming no additional weirdness.  */
  37static struct irq_chip srm_irq_type = {
  38        .name           = "SRM",
  39        .irq_unmask     = srm_enable_irq,
  40        .irq_mask       = srm_disable_irq,
  41        .irq_mask_ack   = srm_disable_irq,
  42};
  43
  44void __init
  45init_srm_irqs(long max, unsigned long ignore_mask)
  46{
  47        long i;
  48
  49        if (NR_IRQS <= 16)
  50                return;
  51        for (i = 16; i < max; ++i) {
  52                if (i < 64 && ((ignore_mask >> i) & 1))
  53                        continue;
  54                irq_set_chip_and_handler(i, &srm_irq_type, handle_level_irq);
  55                irq_set_status_flags(i, IRQ_LEVEL);
  56        }
  57}
  58
  59void 
  60srm_device_interrupt(unsigned long vector)
  61{
  62        int irq = (vector - 0x800) >> 4;
  63        handle_irq(irq);
  64}
  65