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11#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
12#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
13
14extern bool omap4_cminst_is_clkdm_in_hwsup(u8 part, s16 inst, u16 cdoffs);
15extern void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs);
16extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs);
17extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs);
18extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs);
19extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
20extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
21 u16 clkctrl_offs);
22extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
23 u16 clkctrl_offs);
24extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
25 u16 clkctrl_offs);
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30extern u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx);
31extern void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx);
32extern u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
33 s16 inst, s16 idx);
34extern u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, s16 inst,
35 s16 idx);
36extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst,
37 s16 idx);
38extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
39 u32 mask);
40
41extern void omap_cm_base_init(void);
42
43#endif
44