LXR linux/arch/arm/plat-samsung/include/plat/uncompress.h

   1/* arch/arm/plat-samsung/include/plat/uncompress.h
   2 *
   3 * Copyright 2003, 2007 Simtec Electronics
   4 *      http://armlinux.simtec.co.uk/
   5 *      Ben Dooks <ben@simtec.co.uk>
   6 *
   7 * S3C - uncompress code
   8 *
   9 * This program is free software; you can redistribute it and/or modify
  10 * it under the terms of the GNU General Public License version 2 as
  11 * published by the Free Software Foundation.
  12*/
  13
  14#ifndef __ASM_PLAT_UNCOMPRESS_H
  15#define __ASM_PLAT_UNCOMPRESS_H
  16
  17typedef unsigned int upf_t;     /* cannot include linux/serial_core.h */
  18
  19/* uart setup */
  20
  21unsigned int fifo_mask;
  22unsigned int fifo_max;
  23
  24/* forward declerations */
  25
  26static void arch_detect_cpu(void);
  27
  28/* defines for UART registers */
  29
  30#include <plat/regs-serial.h>
  31#include <plat/regs-watchdog.h>
  32
  33/* working in physical space... */
  34#undef S3C2410_WDOGREG
  35#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
  36
  37/* how many bytes we allow into the FIFO at a time in FIFO mode */
  38#define FIFO_MAX         (14)
  39
  40#ifdef S3C_PA_UART
  41#define uart_base S3C_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT)
  42#endif
  43
  44static __inline__ void
  45uart_wr(unsigned int reg, unsigned int val)
  46{
  47        volatile unsigned int *ptr;
  48
  49        ptr = (volatile unsigned int *)(reg + uart_base);
  50        *ptr = val;
  51}
  52
  53static __inline__ unsigned int
  54uart_rd(unsigned int reg)
  55{
  56        volatile unsigned int *ptr;
  57
  58        ptr = (volatile unsigned int *)(reg + uart_base);
  59        return *ptr;
  60}
  61
  62/* we can deal with the case the UARTs are being run
  63 * in FIFO mode, so that we don't hold up our execution
  64 * waiting for tx to happen...
  65*/
  66
  67static void putc(int ch)
  68{
  69        if (!config_enabled(CONFIG_DEBUG_LL))
  70                return;
  71
  72        if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
  73                int level;
  74
  75                while (1) {
  76                        level = uart_rd(S3C2410_UFSTAT);
  77                        level &= fifo_mask;
  78
  79                        if (level < fifo_max)
  80                                break;
  81                }
  82
  83        } else {
  84                /* not using fifos */
  85
  86                while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
  87                        barrier();
  88        }
  89
  90        /* write byte to transmission register */
  91        uart_wr(S3C2410_UTXH, ch);
  92}
  93
  94static inline void flush(void)
  95{
  96}
  97
  98#define __raw_writel(d, ad)                     \
  99        do {                                                    \
 100                *((volatile unsigned int __force *)(ad)) = (d); \
 101        } while (0)
 102
 103#ifdef CONFIG_S3C_BOOT_ERROR_RESET
 104
 105static void arch_decomp_error(const char *x)
 106{
 107        putstr("\n\n");
 108        putstr(x);
 109        putstr("\n\n -- System resetting\n");
 110
 111        __raw_writel(0x4000, S3C2410_WTDAT);
 112        __raw_writel(0x4000, S3C2410_WTCNT);
 113        __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
 114
 115        while(1);
 116}
 117
 118#define arch_error arch_decomp_error
 119#endif
 120
 121#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
 122static inline void arch_enable_uart_fifo(void)
 123{
 124        u32 fifocon;
 125
 126        if (!config_enabled(CONFIG_DEBUG_LL))
 127                return;
 128
 129        fifocon = uart_rd(S3C2410_UFCON);
 130
 131        if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
 132                fifocon |= S3C2410_UFCON_RESETBOTH;
 133                uart_wr(S3C2410_UFCON, fifocon);
 134
 135                /* wait for fifo reset to complete */
 136                while (1) {
 137                        fifocon = uart_rd(S3C2410_UFCON);
 138                        if (!(fifocon & S3C2410_UFCON_RESETBOTH))
 139                                break;
 140                }
 141        }
 142}
 143#else
 144#define arch_enable_uart_fifo() do { } while(0)
 145#endif
 146
 147
 148static void
 149arch_decomp_setup(void)
 150{
 151        /* we may need to setup the uart(s) here if we are not running
 152         * on an BAST... the BAST will have left the uarts configured
 153         * after calling linux.
 154         */
 155
 156        arch_detect_cpu();
 157
 158        /* Enable the UART FIFOs if they where not enabled and our
 159         * configuration says we should turn them on.
 160         */
 161
 162        arch_enable_uart_fifo();
 163}
 164
 165
 166#endif /* __ASM_PLAT_UNCOMPRESS_H */
 167