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62#ifndef MPI_INIT_H
63#define MPI_INIT_H
64
65
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73
74
75
76typedef struct _MSG_SCSI_IO_REQUEST
77{
78 U8 TargetID;
79 U8 Bus;
80 U8 ChainOffset;
81 U8 Function;
82 U8 CDBLength;
83 U8 SenseBufferLength;
84 U8 Reserved;
85 U8 MsgFlags;
86 U32 MsgContext;
87 U8 LUN[8];
88 U32 Control;
89 U8 CDB[16];
90 U32 DataLength;
91 U32 SenseBufferLowAddr;
92 SGE_IO_UNION SGL;
93} MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST,
94 SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t;
95
96
97
98
99#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01)
100#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00)
101#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01)
102
103#define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02)
104#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00)
105#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02)
106
107#define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
108
109
110
111#define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
112#define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
113#define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
114#define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
115#define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00)
116#define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00)
117
118
119
120#define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
121#define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
122#define MPI_SCSIIO_CONTROL_WRITE (0x01000000)
123#define MPI_SCSIIO_CONTROL_READ (0x02000000)
124
125#define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000)
126#define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
127
128#define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
129#define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
130#define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100)
131#define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
132#define MPI_SCSIIO_CONTROL_ACAQ (0x00000400)
133#define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500)
134#define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700)
135
136#define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000)
137#define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000)
138#define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000)
139#define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000)
140#define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000)
141#define MPI_SCSIIO_CONTROL_RESERVED (0x00080000)
142#define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000)
143#define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000)
144#define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000)
145
146
147
148typedef struct _MSG_SCSI_IO_REPLY
149{
150 U8 TargetID;
151 U8 Bus;
152 U8 MsgLength;
153 U8 Function;
154 U8 CDBLength;
155 U8 SenseBufferLength;
156 U8 Reserved;
157 U8 MsgFlags;
158 U32 MsgContext;
159 U8 SCSIStatus;
160 U8 SCSIState;
161 U16 IOCStatus;
162 U32 IOCLogInfo;
163 U32 TransferCount;
164 U32 SenseCount;
165 U32 ResponseInfo;
166 U16 TaskTag;
167 U16 Reserved1;
168} MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY,
169 SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t;
170
171
172
173
174#define MPI_SCSI_STATUS_SUCCESS (0x00)
175#define MPI_SCSI_STATUS_CHECK_CONDITION (0x02)
176#define MPI_SCSI_STATUS_CONDITION_MET (0x04)
177#define MPI_SCSI_STATUS_BUSY (0x08)
178#define MPI_SCSI_STATUS_INTERMEDIATE (0x10)
179#define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
180#define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
181#define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22)
182#define MPI_SCSI_STATUS_TASK_SET_FULL (0x28)
183#define MPI_SCSI_STATUS_ACA_ACTIVE (0x30)
184
185#define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT (0x80)
186#define MPI_SCSI_STATUS_FCPEXT_NO_LINK (0x81)
187#define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED (0x82)
188
189
190
191
192#define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01)
193#define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02)
194#define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04)
195#define MPI_SCSI_STATE_TERMINATED (0x08)
196#define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
197#define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20)
198
199
200
201
202#define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000)
203#define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000)
204#define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000)
205#define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000)
206#define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000)
207#define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000)
208#define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000)
209
210#define MPI_SCSI_TASKTAG_UNKNOWN (0xFFFF)
211
212
213
214
215
216
217typedef struct
218{
219 U8 CDB[20];
220 U32 PrimaryReferenceTag;
221 U16 PrimaryApplicationTag;
222 U16 PrimaryApplicationTagMask;
223 U32 TransferLength;
224} MPI_SCSI_IO32_CDB_EEDP32, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP32,
225 MpiScsiIo32CdbEedp32_t, MPI_POINTER pMpiScsiIo32CdbEedp32_t;
226
227typedef struct
228{
229 U8 CDB[16];
230 U32 DataLength;
231 U32 PrimaryReferenceTag;
232 U16 PrimaryApplicationTag;
233 U16 PrimaryApplicationTagMask;
234 U32 TransferLength;
235} MPI_SCSI_IO32_CDB_EEDP16, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP16,
236 MpiScsiIo32CdbEedp16_t, MPI_POINTER pMpiScsiIo32CdbEedp16_t;
237
238typedef union
239{
240 U8 CDB32[32];
241 MPI_SCSI_IO32_CDB_EEDP32 EEDP32;
242 MPI_SCSI_IO32_CDB_EEDP16 EEDP16;
243 SGE_SIMPLE_UNION SGE;
244} MPI_SCSI_IO32_CDB_UNION, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_UNION,
245 MpiScsiIo32Cdb_t, MPI_POINTER pMpiScsiIo32Cdb_t;
246
247typedef struct
248{
249 U8 TargetID;
250 U8 Bus;
251 U16 Reserved1;
252 U32 Reserved2;
253} MPI_SCSI_IO32_BUS_TARGET_ID_FORM, MPI_POINTER PTR_MPI_SCSI_IO32_BUS_TARGET_ID_FORM,
254 MpiScsiIo32BusTargetIdForm_t, MPI_POINTER pMpiScsiIo32BusTargetIdForm_t;
255
256typedef union
257{
258 MPI_SCSI_IO32_BUS_TARGET_ID_FORM SCSIID;
259 U64 WWID;
260} MPI_SCSI_IO32_ADDRESS, MPI_POINTER PTR_MPI_SCSI_IO32_ADDRESS,
261 MpiScsiIo32Address_t, MPI_POINTER pMpiScsiIo32Address_t;
262
263typedef struct _MSG_SCSI_IO32_REQUEST
264{
265 U8 Port;
266 U8 Reserved1;
267 U8 ChainOffset;
268 U8 Function;
269 U8 CDBLength;
270 U8 SenseBufferLength;
271 U8 Flags;
272 U8 MsgFlags;
273 U32 MsgContext;
274 U8 LUN[8];
275 U32 Control;
276 MPI_SCSI_IO32_CDB_UNION CDB;
277 U32 DataLength;
278 U32 BidirectionalDataLength;
279 U32 SecondaryReferenceTag;
280 U16 SecondaryApplicationTag;
281 U16 Reserved2;
282 U16 EEDPFlags;
283 U16 ApplicationTagTranslationMask;
284 U32 EEDPBlockSize;
285 MPI_SCSI_IO32_ADDRESS DeviceAddress;
286 U8 SGLOffset0;
287 U8 SGLOffset1;
288 U8 SGLOffset2;
289 U8 SGLOffset3;
290 U32 Reserved3;
291 U32 Reserved4;
292 U32 SenseBufferLowAddr;
293 SGE_IO_UNION SGL;
294} MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST,
295 SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t;
296
297
298#define MPI_SCSIIO32_MSGFLGS_SENSE_WIDTH (0x01)
299#define MPI_SCSIIO32_MSGFLGS_32_SENSE_WIDTH (0x00)
300#define MPI_SCSIIO32_MSGFLGS_64_SENSE_WIDTH (0x01)
301
302#define MPI_SCSIIO32_MSGFLGS_SENSE_LOCATION (0x02)
303#define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_HOST (0x00)
304#define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_IOC (0x02)
305
306#define MPI_SCSIIO32_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
307#define MPI_SCSIIO32_MSGFLGS_SGL_OFFSETS_CHAINS (0x08)
308#define MPI_SCSIIO32_MSGFLGS_MULTICAST (0x10)
309#define MPI_SCSIIO32_MSGFLGS_BIDIRECTIONAL (0x20)
310#define MPI_SCSIIO32_MSGFLGS_LARGE_CDB (0x40)
311
312
313#define MPI_SCSIIO32_FLAGS_FORM_MASK (0x03)
314#define MPI_SCSIIO32_FLAGS_FORM_SCSIID (0x00)
315#define MPI_SCSIIO32_FLAGS_FORM_WWID (0x01)
316
317
318#define MPI_SCSIIO32_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
319#define MPI_SCSIIO32_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
320#define MPI_SCSIIO32_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
321#define MPI_SCSIIO32_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
322#define MPI_SCSIIO32_LUN_LEVEL_1_WORD (0xFF00)
323#define MPI_SCSIIO32_LUN_LEVEL_1_DWORD (0x0000FF00)
324
325
326#define MPI_SCSIIO32_CONTROL_DATADIRECTION_MASK (0x03000000)
327#define MPI_SCSIIO32_CONTROL_NODATATRANSFER (0x00000000)
328#define MPI_SCSIIO32_CONTROL_WRITE (0x01000000)
329#define MPI_SCSIIO32_CONTROL_READ (0x02000000)
330#define MPI_SCSIIO32_CONTROL_BIDIRECTIONAL (0x03000000)
331
332#define MPI_SCSIIO32_CONTROL_ADDCDBLEN_MASK (0xFC000000)
333#define MPI_SCSIIO32_CONTROL_ADDCDBLEN_SHIFT (26)
334
335#define MPI_SCSIIO32_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
336#define MPI_SCSIIO32_CONTROL_SIMPLEQ (0x00000000)
337#define MPI_SCSIIO32_CONTROL_HEADOFQ (0x00000100)
338#define MPI_SCSIIO32_CONTROL_ORDEREDQ (0x00000200)
339#define MPI_SCSIIO32_CONTROL_ACAQ (0x00000400)
340#define MPI_SCSIIO32_CONTROL_UNTAGGED (0x00000500)
341#define MPI_SCSIIO32_CONTROL_NO_DISCONNECT (0x00000700)
342
343#define MPI_SCSIIO32_CONTROL_TASKMANAGE_MASK (0x00FF0000)
344#define MPI_SCSIIO32_CONTROL_OBSOLETE (0x00800000)
345#define MPI_SCSIIO32_CONTROL_CLEAR_ACA_RSV (0x00400000)
346#define MPI_SCSIIO32_CONTROL_TARGET_RESET (0x00200000)
347#define MPI_SCSIIO32_CONTROL_LUN_RESET_RSV (0x00100000)
348#define MPI_SCSIIO32_CONTROL_RESERVED (0x00080000)
349#define MPI_SCSIIO32_CONTROL_CLR_TASK_SET_RSV (0x00040000)
350#define MPI_SCSIIO32_CONTROL_ABORT_TASK_SET (0x00020000)
351#define MPI_SCSIIO32_CONTROL_RESERVED2 (0x00010000)
352
353
354#define MPI_SCSIIO32_EEDPFLAGS_MASK_OP (0x0007)
355#define MPI_SCSIIO32_EEDPFLAGS_NOOP_OP (0x0000)
356#define MPI_SCSIIO32_EEDPFLAGS_CHK_OP (0x0001)
357#define MPI_SCSIIO32_EEDPFLAGS_STRIP_OP (0x0002)
358#define MPI_SCSIIO32_EEDPFLAGS_CHKRM_OP (0x0003)
359#define MPI_SCSIIO32_EEDPFLAGS_INSERT_OP (0x0004)
360#define MPI_SCSIIO32_EEDPFLAGS_REPLACE_OP (0x0006)
361#define MPI_SCSIIO32_EEDPFLAGS_CHKREGEN_OP (0x0007)
362
363#define MPI_SCSIIO32_EEDPFLAGS_PASS_REF_TAG (0x0008)
364#define MPI_SCSIIO32_EEDPFLAGS_8_9THS_MODE (0x0010)
365
366#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_MASK (0x0700)
367#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_GUARD (0x0100)
368#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_REFTAG (0x0200)
369#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_LBATAG (0x0400)
370#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_SHIFT (8)
371
372#define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
373#define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
374#define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
375#define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
376
377
378
379typedef struct _MSG_SCSIIO32_IO_REPLY
380{
381 U8 Port;
382 U8 Reserved1;
383 U8 MsgLength;
384 U8 Function;
385 U8 CDBLength;
386 U8 SenseBufferLength;
387 U8 Flags;
388 U8 MsgFlags;
389 U32 MsgContext;
390 U8 SCSIStatus;
391 U8 SCSIState;
392 U16 IOCStatus;
393 U32 IOCLogInfo;
394 U32 TransferCount;
395 U32 SenseCount;
396 U32 ResponseInfo;
397 U16 TaskTag;
398 U16 Reserved2;
399 U32 BidirectionalTransferCount;
400} MSG_SCSIIO32_IO_REPLY, MPI_POINTER PTR_MSG_SCSIIO32_IO_REPLY,
401 SCSIIO32Reply_t, MPI_POINTER pSCSIIO32Reply_t;
402
403
404
405
406
407
408typedef struct _MSG_SCSI_TASK_MGMT
409{
410 U8 TargetID;
411 U8 Bus;
412 U8 ChainOffset;
413 U8 Function;
414 U8 Reserved;
415 U8 TaskType;
416 U8 Reserved1;
417 U8 MsgFlags;
418 U32 MsgContext;
419 U8 LUN[8];
420 U32 Reserved2[7];
421 U32 TaskMsgContext;
422} MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT,
423 SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t;
424
425
426
427#define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
428#define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
429#define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
430#define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04)
431#define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
432#define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
433#define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
434#define MPI_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
435
436
437#define MPI_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
438
439#define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00)
440#define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02)
441#define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04)
442
443#define MPI_SCSITASKMGMT_MSGFLAGS_SOFT_RESET_OPTION (0x08)
444
445
446typedef struct _MSG_SCSI_TASK_MGMT_REPLY
447{
448 U8 TargetID;
449 U8 Bus;
450 U8 MsgLength;
451 U8 Function;
452 U8 ResponseCode;
453 U8 TaskType;
454 U8 Reserved1;
455 U8 MsgFlags;
456 U32 MsgContext;
457 U8 Reserved2[2];
458 U16 IOCStatus;
459 U32 IOCLogInfo;
460 U32 TerminationCount;
461} MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY,
462 SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t;
463
464
465#define MPI_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
466#define MPI_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
467#define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
468#define MPI_SCSITASKMGMT_RSP_TM_FAILED (0x05)
469#define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
470#define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
471#define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
472
473
474
475
476
477
478typedef struct _MSG_SEP_REQUEST
479{
480 U8 TargetID;
481 U8 Bus;
482 U8 ChainOffset;
483 U8 Function;
484 U8 Action;
485 U8 Flags;
486 U8 Reserved1;
487 U8 MsgFlags;
488 U32 MsgContext;
489 U32 SlotStatus;
490 U32 Reserved2;
491 U32 Reserved3;
492 U32 Reserved4;
493 U16 Slot;
494 U16 EnclosureHandle;
495} MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST,
496 SEPRequest_t, MPI_POINTER pSEPRequest_t;
497
498
499#define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00)
500#define MPI_SEP_REQ_ACTION_READ_STATUS (0x01)
501
502
503#define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
504#define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS (0x00)
505
506
507#define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
508#define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
509#define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
510#define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
511#define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
512#define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020)
513#define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
514#define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
515#define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
516#define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
517#define MPI_SEP_REQ_SLOTSTATUS_REQ_CONSISTENCY_CHECK (0x00001000)
518#define MPI_SEP_REQ_SLOTSTATUS_DISABLE (0x00002000)
519#define MPI_SEP_REQ_SLOTSTATUS_REQ_RESERVED_DEVICE (0x00004000)
520#define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
521#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
522#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000)
523#define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000)
524#define MPI_SEP_REQ_SLOTSTATUS_ACTIVE (0x00800000)
525#define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
526#define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
527#define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000)
528#define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000)
529
530
531typedef struct _MSG_SEP_REPLY
532{
533 U8 TargetID;
534 U8 Bus;
535 U8 MsgLength;
536 U8 Function;
537 U8 Action;
538 U8 Reserved1;
539 U8 Reserved2;
540 U8 MsgFlags;
541 U32 MsgContext;
542 U16 Reserved3;
543 U16 IOCStatus;
544 U32 IOCLogInfo;
545 U32 SlotStatus;
546 U32 Reserved4;
547 U16 Slot;
548 U16 EnclosureHandle;
549} MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY,
550 SEPReply_t, MPI_POINTER pSEPReply_t;
551
552
553#define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
554#define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
555#define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
556#define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
557#define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
558#define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020)
559#define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
560#define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
561#define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
562#define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
563#define MPI_SEP_REPLY_SLOTSTATUS_CONSISTENCY_CHECK (0x00001000)
564#define MPI_SEP_REPLY_SLOTSTATUS_DISABLE (0x00002000)
565#define MPI_SEP_REPLY_SLOTSTATUS_RESERVED_DEVICE (0x00004000)
566#define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000)
567#define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
568#define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
569#define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000)
570#define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000)
571#define MPI_SEP_REPLY_SLOTSTATUS_ACTIVE (0x00800000)
572#define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000)
573#define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000)
574#define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
575#define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
576#define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000)
577#define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000)
578#define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000)
579
580#endif
581