LXR linux/drivers/misc/mei/pci-me.c

   1/*
   2 *
   3 * Intel Management Engine Interface (Intel MEI) Linux driver
   4 * Copyright (c) 2003-2012, Intel Corporation.
   5 *
   6 * This program is free software; you can redistribute it and/or modify it
   7 * under the terms and conditions of the GNU General Public License,
   8 * version 2, as published by the Free Software Foundation.
   9 *
  10 * This program is distributed in the hope it will be useful, but WITHOUT
  11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13 * more details.
  14 *
  15 */
  16#include <linux/module.h>
  17#include <linux/moduleparam.h>
  18#include <linux/kernel.h>
  19#include <linux/device.h>
  20#include <linux/fs.h>
  21#include <linux/errno.h>
  22#include <linux/types.h>
  23#include <linux/fcntl.h>
  24#include <linux/aio.h>
  25#include <linux/pci.h>
  26#include <linux/poll.h>
  27#include <linux/init.h>
  28#include <linux/ioctl.h>
  29#include <linux/cdev.h>
  30#include <linux/sched.h>
  31#include <linux/uuid.h>
  32#include <linux/compat.h>
  33#include <linux/jiffies.h>
  34#include <linux/interrupt.h>
  35
  36#include <linux/pm_domain.h>
  37#include <linux/pm_runtime.h>
  38
  39#include <linux/mei.h>
  40
  41#include "mei_dev.h"
  42#include "client.h"
  43#include "hw-me-regs.h"
  44#include "hw-me.h"
  45
  46/* mei_pci_tbl - PCI Device ID Table */
  47static const struct pci_device_id mei_me_pci_tbl[] = {
  48        {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)},
  49        {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)},
  50        {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)},
  51        {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)},
  52        {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)},
  53        {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)},
  54        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)},
  55        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)},
  56        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)},
  57        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)},
  58        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)},
  59
  60        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)},
  61        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)},
  62        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)},
  63        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)},
  64        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)},
  65        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)},
  66        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)},
  67        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)},
  68        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)},
  69        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)},
  70        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)},
  71        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)},
  72        {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)},
  73
  74        {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)},
  75        {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)},
  76        {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)},
  77        {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)},
  78        {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)},
  79        {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)},
  80        {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)},
  81        {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)},
  82        {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)},
  83        {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)},
  84        {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)},
  85        {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)},
  86        {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)},
  87
  88        {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)},
  89        {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)},
  90        {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)},
  91        {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)},
  92        {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, mei_me_pch8_cfg)},
  93
  94        {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, mei_me_pch8_cfg)},
  95        {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, mei_me_pch8_cfg)},
  96
  97        {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, mei_me_pch8_cfg)},
  98        {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, mei_me_pch8_cfg)},
  99
 100        /* required last entry */
 101        {0, }
 102};
 103
 104MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
 105
 106#ifdef CONFIG_PM
 107static inline void mei_me_set_pm_domain(struct mei_device *dev);
 108static inline void mei_me_unset_pm_domain(struct mei_device *dev);
 109#else
 110static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
 111static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
 112#endif /* CONFIG_PM */
 113
 114/**
 115 * mei_me_quirk_probe - probe for devices that doesn't valid ME interface
 116 *
 117 * @pdev: PCI device structure
 118 * @cfg: per generation config
 119 *
 120 * Return: true if ME Interface is valid, false otherwise
 121 */
 122static bool mei_me_quirk_probe(struct pci_dev *pdev,
 123                                const struct mei_cfg *cfg)
 124{
 125        if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
 126                dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
 127                return false;
 128        }
 129
 130        return true;
 131}
 132
 133/**
 134 * mei_me_probe - Device Initialization Routine
 135 *
 136 * @pdev: PCI device structure
 137 * @ent: entry in kcs_pci_tbl
 138 *
 139 * Return: 0 on success, <0 on failure.
 140 */
 141static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 142{
 143        const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data);
 144        struct mei_device *dev;
 145        struct mei_me_hw *hw;
 146        unsigned int irqflags;
 147        int err;
 148
 149
 150        if (!mei_me_quirk_probe(pdev, cfg))
 151                return -ENODEV;
 152
 153        /* enable pci dev */
 154        err = pci_enable_device(pdev);
 155        if (err) {
 156                dev_err(&pdev->dev, "failed to enable pci device.\n");
 157                goto end;
 158        }
 159        /* set PCI host mastering  */
 160        pci_set_master(pdev);
 161        /* pci request regions for mei driver */
 162        err = pci_request_regions(pdev, KBUILD_MODNAME);
 163        if (err) {
 164                dev_err(&pdev->dev, "failed to get pci regions.\n");
 165                goto disable_device;
 166        }
 167
 168        if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
 169            dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
 170
 171                err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
 172                if (err)
 173                        err = dma_set_coherent_mask(&pdev->dev,
 174                                                    DMA_BIT_MASK(32));
 175        }
 176        if (err) {
 177                dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
 178                goto release_regions;
 179        }
 180
 181
 182        /* allocates and initializes the mei dev structure */
 183        dev = mei_me_dev_init(pdev, cfg);
 184        if (!dev) {
 185                err = -ENOMEM;
 186                goto release_regions;
 187        }
 188        hw = to_me_hw(dev);
 189        /* mapping  IO device memory */
 190        hw->mem_addr = pci_iomap(pdev, 0, 0);
 191        if (!hw->mem_addr) {
 192                dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
 193                err = -ENOMEM;
 194                goto free_device;
 195        }
 196        pci_enable_msi(pdev);
 197
 198         /* request and enable interrupt */
 199        irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
 200
 201        err = request_threaded_irq(pdev->irq,
 202                        mei_me_irq_quick_handler,
 203                        mei_me_irq_thread_handler,
 204                        irqflags, KBUILD_MODNAME, dev);
 205        if (err) {
 206                dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
 207                       pdev->irq);
 208                goto disable_msi;
 209        }
 210
 211        if (mei_start(dev)) {
 212                dev_err(&pdev->dev, "init hw failure.\n");
 213                err = -ENODEV;
 214                goto release_irq;
 215        }
 216
 217        pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
 218        pm_runtime_use_autosuspend(&pdev->dev);
 219
 220        err = mei_register(dev, &pdev->dev);
 221        if (err)
 222                goto stop;
 223
 224        pci_set_drvdata(pdev, dev);
 225
 226        /*
 227        * For not wake-able HW runtime pm framework
 228        * can't be used on pci device level.
 229        * Use domain runtime pm callbacks instead.
 230        */
 231        if (!pci_dev_run_wake(pdev))
 232                mei_me_set_pm_domain(dev);
 233
 234        if (mei_pg_is_enabled(dev)) {
 235                pm_runtime_put_noidle(&pdev->dev);
 236                if (hw->d0i3_supported)
 237                        pm_runtime_allow(&pdev->dev);
 238        }
 239
 240        dev_dbg(&pdev->dev, "initialization successful.\n");
 241
 242        return 0;
 243
 244stop:
 245        mei_stop(dev);
 246release_irq:
 247        mei_cancel_work(dev);
 248        mei_disable_interrupts(dev);
 249        free_irq(pdev->irq, dev);
 250disable_msi:
 251        pci_disable_msi(pdev);
 252        pci_iounmap(pdev, hw->mem_addr);
 253free_device:
 254        kfree(dev);
 255release_regions:
 256        pci_release_regions(pdev);
 257disable_device:
 258        pci_disable_device(pdev);
 259end:
 260        dev_err(&pdev->dev, "initialization failed.\n");
 261        return err;
 262}
 263
 264/**
 265 * mei_me_shutdown - Device Removal Routine
 266 *
 267 * @pdev: PCI device structure
 268 *
 269 * mei_me_shutdown is called from the reboot notifier
 270 * it's a simplified version of remove so we go down
 271 * faster.
 272 */
 273static void mei_me_shutdown(struct pci_dev *pdev)
 274{
 275        struct mei_device *dev;
 276
 277        dev = pci_get_drvdata(pdev);
 278        if (!dev)
 279                return;
 280
 281        dev_dbg(&pdev->dev, "shutdown\n");
 282        mei_stop(dev);
 283
 284        if (!pci_dev_run_wake(pdev))
 285                mei_me_unset_pm_domain(dev);
 286
 287        mei_disable_interrupts(dev);
 288        free_irq(pdev->irq, dev);
 289}
 290
 291/**
 292 * mei_me_remove - Device Removal Routine
 293 *
 294 * @pdev: PCI device structure
 295 *
 296 * mei_me_remove is called by the PCI subsystem to alert the driver
 297 * that it should release a PCI device.
 298 */
 299static void mei_me_remove(struct pci_dev *pdev)
 300{
 301        struct mei_device *dev;
 302        struct mei_me_hw *hw;
 303
 304        dev = pci_get_drvdata(pdev);
 305        if (!dev)
 306                return;
 307
 308        if (mei_pg_is_enabled(dev))
 309                pm_runtime_get_noresume(&pdev->dev);
 310
 311        hw = to_me_hw(dev);
 312
 313
 314        dev_dbg(&pdev->dev, "stop\n");
 315        mei_stop(dev);
 316
 317        if (!pci_dev_run_wake(pdev))
 318                mei_me_unset_pm_domain(dev);
 319
 320        /* disable interrupts */
 321        mei_disable_interrupts(dev);
 322
 323        free_irq(pdev->irq, dev);
 324        pci_disable_msi(pdev);
 325
 326        if (hw->mem_addr)
 327                pci_iounmap(pdev, hw->mem_addr);
 328
 329        mei_deregister(dev);
 330
 331        kfree(dev);
 332
 333        pci_release_regions(pdev);
 334        pci_disable_device(pdev);
 335
 336
 337}
 338#ifdef CONFIG_PM_SLEEP
 339static int mei_me_pci_suspend(struct device *device)
 340{
 341        struct pci_dev *pdev = to_pci_dev(device);
 342        struct mei_device *dev = pci_get_drvdata(pdev);
 343
 344        if (!dev)
 345                return -ENODEV;
 346
 347        dev_dbg(&pdev->dev, "suspend\n");
 348
 349        mei_stop(dev);
 350
 351        mei_disable_interrupts(dev);
 352
 353        free_irq(pdev->irq, dev);
 354        pci_disable_msi(pdev);
 355
 356        return 0;
 357}
 358
 359static int mei_me_pci_resume(struct device *device)
 360{
 361        struct pci_dev *pdev = to_pci_dev(device);
 362        struct mei_device *dev;
 363        unsigned int irqflags;
 364        int err;
 365
 366        dev = pci_get_drvdata(pdev);
 367        if (!dev)
 368                return -ENODEV;
 369
 370        pci_enable_msi(pdev);
 371
 372        irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
 373
 374        /* request and enable interrupt */
 375        err = request_threaded_irq(pdev->irq,
 376                        mei_me_irq_quick_handler,
 377                        mei_me_irq_thread_handler,
 378                        irqflags, KBUILD_MODNAME, dev);
 379
 380        if (err) {
 381                dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
 382                                pdev->irq);
 383                return err;
 384        }
 385
 386        err = mei_restart(dev);
 387        if (err)
 388                return err;
 389
 390        /* Start timer if stopped in suspend */
 391        schedule_delayed_work(&dev->timer_work, HZ);
 392
 393        return 0;
 394}
 395#endif /* CONFIG_PM_SLEEP */
 396
 397#ifdef CONFIG_PM
 398static int mei_me_pm_runtime_idle(struct device *device)
 399{
 400        struct pci_dev *pdev = to_pci_dev(device);
 401        struct mei_device *dev;
 402
 403        dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
 404
 405        dev = pci_get_drvdata(pdev);
 406        if (!dev)
 407                return -ENODEV;
 408        if (mei_write_is_idle(dev))
 409                pm_runtime_autosuspend(device);
 410
 411        return -EBUSY;
 412}
 413
 414static int mei_me_pm_runtime_suspend(struct device *device)
 415{
 416        struct pci_dev *pdev = to_pci_dev(device);
 417        struct mei_device *dev;
 418        int ret;
 419
 420        dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
 421
 422        dev = pci_get_drvdata(pdev);
 423        if (!dev)
 424                return -ENODEV;
 425
 426        mutex_lock(&dev->device_lock);
 427
 428        if (mei_write_is_idle(dev))
 429                ret = mei_me_pg_enter_sync(dev);
 430        else
 431                ret = -EAGAIN;
 432
 433        mutex_unlock(&dev->device_lock);
 434
 435        dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
 436
 437        if (ret && ret != -EAGAIN)
 438                schedule_work(&dev->reset_work);
 439
 440        return ret;
 441}
 442
 443static int mei_me_pm_runtime_resume(struct device *device)
 444{
 445        struct pci_dev *pdev = to_pci_dev(device);
 446        struct mei_device *dev;
 447        int ret;
 448
 449        dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
 450
 451        dev = pci_get_drvdata(pdev);
 452        if (!dev)
 453                return -ENODEV;
 454
 455        mutex_lock(&dev->device_lock);
 456
 457        ret = mei_me_pg_exit_sync(dev);
 458
 459        mutex_unlock(&dev->device_lock);
 460
 461        dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
 462
 463        if (ret)
 464                schedule_work(&dev->reset_work);
 465
 466        return ret;
 467}
 468
 469/**
 470 * mei_me_set_pm_domain - fill and set pm domain structure for device
 471 *
 472 * @dev: mei_device
 473 */
 474static inline void mei_me_set_pm_domain(struct mei_device *dev)
 475{
 476        struct pci_dev *pdev  = to_pci_dev(dev->dev);
 477
 478        if (pdev->dev.bus && pdev->dev.bus->pm) {
 479                dev->pg_domain.ops = *pdev->dev.bus->pm;
 480
 481                dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
 482                dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
 483                dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;
 484
 485                dev_pm_domain_set(&pdev->dev, &dev->pg_domain);
 486        }
 487}
 488
 489/**
 490 * mei_me_unset_pm_domain - clean pm domain structure for device
 491 *
 492 * @dev: mei_device
 493 */
 494static inline void mei_me_unset_pm_domain(struct mei_device *dev)
 495{
 496        /* stop using pm callbacks if any */
 497        dev_pm_domain_set(dev->dev, NULL);
 498}
 499
 500static const struct dev_pm_ops mei_me_pm_ops = {
 501        SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
 502                                mei_me_pci_resume)
 503        SET_RUNTIME_PM_OPS(
 504                mei_me_pm_runtime_suspend,
 505                mei_me_pm_runtime_resume,
 506                mei_me_pm_runtime_idle)
 507};
 508
 509#define MEI_ME_PM_OPS   (&mei_me_pm_ops)
 510#else
 511#define MEI_ME_PM_OPS   NULL
 512#endif /* CONFIG_PM */
 513/*
 514 *  PCI driver structure
 515 */
 516static struct pci_driver mei_me_driver = {
 517        .name = KBUILD_MODNAME,
 518        .id_table = mei_me_pci_tbl,
 519        .probe = mei_me_probe,
 520        .remove = mei_me_remove,
 521        .shutdown = mei_me_shutdown,
 522        .driver.pm = MEI_ME_PM_OPS,
 523};
 524
 525module_pci_driver(mei_me_driver);
 526
 527MODULE_AUTHOR("Intel Corporation");
 528MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
 529MODULE_LICENSE("GPL v2");
 530