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22#include <linux/interrupt.h>
23#include <linux/kernel.h>
24#include <linux/netdevice.h>
25#include <linux/phy.h>
26#include <linux/pci.h>
27#include <linux/if_vlan.h>
28#include <linux/dma-mapping.h>
29#include <linux/crc32.h>
30#include <linux/slab.h>
31#include <linux/module.h>
32#include <asm/unaligned.h>
33#include "smsc9420.h"
34
35#define DRV_NAME "smsc9420"
36#define PFX DRV_NAME ": "
37#define DRV_MDIONAME "smsc9420-mdio"
38#define DRV_DESCRIPTION "SMSC LAN9420 driver"
39#define DRV_VERSION "1.01"
40
41MODULE_LICENSE("GPL");
42MODULE_VERSION(DRV_VERSION);
43
44struct smsc9420_dma_desc {
45 u32 status;
46 u32 length;
47 u32 buffer1;
48 u32 buffer2;
49};
50
51struct smsc9420_ring_info {
52 struct sk_buff *skb;
53 dma_addr_t mapping;
54};
55
56struct smsc9420_pdata {
57 void __iomem *ioaddr;
58 struct pci_dev *pdev;
59 struct net_device *dev;
60
61 struct smsc9420_dma_desc *rx_ring;
62 struct smsc9420_dma_desc *tx_ring;
63 struct smsc9420_ring_info *tx_buffers;
64 struct smsc9420_ring_info *rx_buffers;
65 dma_addr_t rx_dma_addr;
66 dma_addr_t tx_dma_addr;
67 int tx_ring_head, tx_ring_tail;
68 int rx_ring_head, rx_ring_tail;
69
70 spinlock_t int_lock;
71 spinlock_t phy_lock;
72
73 struct napi_struct napi;
74
75 bool software_irq_signal;
76 bool rx_csum;
77 u32 msg_enable;
78
79 struct phy_device *phy_dev;
80 struct mii_bus *mii_bus;
81 int phy_irq[PHY_MAX_ADDR];
82 int last_duplex;
83 int last_carrier;
84};
85
86static const struct pci_device_id smsc9420_id_table[] = {
87 { PCI_VENDOR_ID_9420, PCI_DEVICE_ID_9420, PCI_ANY_ID, PCI_ANY_ID, },
88 { 0, }
89};
90
91MODULE_DEVICE_TABLE(pci, smsc9420_id_table);
92
93#define SMSC_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
94
95static uint smsc_debug;
96static uint debug = -1;
97module_param(debug, uint, 0);
98MODULE_PARM_DESC(debug, "debug level");
99
100#define smsc_dbg(TYPE, f, a...) \
101do { if ((pd)->msg_enable & NETIF_MSG_##TYPE) \
102 printk(KERN_DEBUG PFX f "\n", ## a); \
103} while (0)
104
105#define smsc_info(TYPE, f, a...) \
106do { if ((pd)->msg_enable & NETIF_MSG_##TYPE) \
107 printk(KERN_INFO PFX f "\n", ## a); \
108} while (0)
109
110#define smsc_warn(TYPE, f, a...) \
111do { if ((pd)->msg_enable & NETIF_MSG_##TYPE) \
112 printk(KERN_WARNING PFX f "\n", ## a); \
113} while (0)
114
115static inline u32 smsc9420_reg_read(struct smsc9420_pdata *pd, u32 offset)
116{
117 return ioread32(pd->ioaddr + offset);
118}
119
120static inline void
121smsc9420_reg_write(struct smsc9420_pdata *pd, u32 offset, u32 value)
122{
123 iowrite32(value, pd->ioaddr + offset);
124}
125
126static inline void smsc9420_pci_flush_write(struct smsc9420_pdata *pd)
127{
128
129 smsc9420_reg_read(pd, ID_REV);
130}
131
132static int smsc9420_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
133{
134 struct smsc9420_pdata *pd = (struct smsc9420_pdata *)bus->priv;
135 unsigned long flags;
136 u32 addr;
137 int i, reg = -EIO;
138
139 spin_lock_irqsave(&pd->phy_lock, flags);
140
141
142 if ((smsc9420_reg_read(pd, MII_ACCESS) & MII_ACCESS_MII_BUSY_)) {
143 smsc_warn(DRV, "MII is busy???");
144 goto out;
145 }
146
147
148 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
149 MII_ACCESS_MII_READ_;
150 smsc9420_reg_write(pd, MII_ACCESS, addr);
151
152
153 for (i = 0; i < 5; i++) {
154 if (!(smsc9420_reg_read(pd, MII_ACCESS) &
155 MII_ACCESS_MII_BUSY_)) {
156 reg = (u16)smsc9420_reg_read(pd, MII_DATA);
157 goto out;
158 }
159 udelay(10);
160 }
161
162 smsc_warn(DRV, "MII busy timeout!");
163
164out:
165 spin_unlock_irqrestore(&pd->phy_lock, flags);
166 return reg;
167}
168
169static int smsc9420_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
170 u16 val)
171{
172 struct smsc9420_pdata *pd = (struct smsc9420_pdata *)bus->priv;
173 unsigned long flags;
174 u32 addr;
175 int i, reg = -EIO;
176
177 spin_lock_irqsave(&pd->phy_lock, flags);
178
179
180 if ((smsc9420_reg_read(pd, MII_ACCESS) & MII_ACCESS_MII_BUSY_)) {
181 smsc_warn(DRV, "MII is busy???");
182 goto out;
183 }
184
185
186 smsc9420_reg_write(pd, MII_DATA, (u32)val);
187
188
189 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
190 MII_ACCESS_MII_WRITE_;
191 smsc9420_reg_write(pd, MII_ACCESS, addr);
192
193
194 for (i = 0; i < 5; i++) {
195 if (!(smsc9420_reg_read(pd, MII_ACCESS) &
196 MII_ACCESS_MII_BUSY_)) {
197 reg = 0;
198 goto out;
199 }
200 udelay(10);
201 }
202
203 smsc_warn(DRV, "MII busy timeout!");
204
205out:
206 spin_unlock_irqrestore(&pd->phy_lock, flags);
207 return reg;
208}
209
210
211
212
213static u32 smsc9420_hash(u8 addr[ETH_ALEN])
214{
215 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
216}
217
218static int smsc9420_eeprom_reload(struct smsc9420_pdata *pd)
219{
220 int timeout = 100000;
221
222 BUG_ON(!pd);
223
224 if (smsc9420_reg_read(pd, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
225 smsc_dbg(DRV, "smsc9420_eeprom_reload: Eeprom busy");
226 return -EIO;
227 }
228
229 smsc9420_reg_write(pd, E2P_CMD,
230 (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_RELOAD_));
231
232 do {
233 udelay(10);
234 if (!(smsc9420_reg_read(pd, E2P_CMD) & E2P_CMD_EPC_BUSY_))
235 return 0;
236 } while (timeout--);
237
238 smsc_warn(DRV, "smsc9420_eeprom_reload: Eeprom timed out");
239 return -EIO;
240}
241
242
243static int smsc9420_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
244{
245 struct smsc9420_pdata *pd = netdev_priv(dev);
246
247 if (!netif_running(dev) || !pd->phy_dev)
248 return -EINVAL;
249
250 return phy_mii_ioctl(pd->phy_dev, ifr, cmd);
251}
252
253static int smsc9420_ethtool_get_settings(struct net_device *dev,
254 struct ethtool_cmd *cmd)
255{
256 struct smsc9420_pdata *pd = netdev_priv(dev);
257
258 if (!pd->phy_dev)
259 return -ENODEV;
260
261 cmd->maxtxpkt = 1;
262 cmd->maxrxpkt = 1;
263 return phy_ethtool_gset(pd->phy_dev, cmd);
264}
265
266static int smsc9420_ethtool_set_settings(struct net_device *dev,
267 struct ethtool_cmd *cmd)
268{
269 struct smsc9420_pdata *pd = netdev_priv(dev);
270
271 if (!pd->phy_dev)
272 return -ENODEV;
273
274 return phy_ethtool_sset(pd->phy_dev, cmd);
275}
276
277static void smsc9420_ethtool_get_drvinfo(struct net_device *netdev,
278 struct ethtool_drvinfo *drvinfo)
279{
280 struct smsc9420_pdata *pd = netdev_priv(netdev);
281
282 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
283 strlcpy(drvinfo->bus_info, pci_name(pd->pdev),
284 sizeof(drvinfo->bus_info));
285 strlcpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
286}
287
288static u32 smsc9420_ethtool_get_msglevel(struct net_device *netdev)
289{
290 struct smsc9420_pdata *pd = netdev_priv(netdev);
291 return pd->msg_enable;
292}
293
294static void smsc9420_ethtool_set_msglevel(struct net_device *netdev, u32 data)
295{
296 struct smsc9420_pdata *pd = netdev_priv(netdev);
297 pd->msg_enable = data;
298}
299
300static int smsc9420_ethtool_nway_reset(struct net_device *netdev)
301{
302 struct smsc9420_pdata *pd = netdev_priv(netdev);
303
304 if (!pd->phy_dev)
305 return -ENODEV;
306
307 return phy_start_aneg(pd->phy_dev);
308}
309
310static int smsc9420_ethtool_getregslen(struct net_device *dev)
311{
312
313 return 0x100 + (32 * sizeof(u32));
314}
315
316static void
317smsc9420_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
318 void *buf)
319{
320 struct smsc9420_pdata *pd = netdev_priv(dev);
321 struct phy_device *phy_dev = pd->phy_dev;
322 unsigned int i, j = 0;
323 u32 *data = buf;
324
325 regs->version = smsc9420_reg_read(pd, ID_REV);
326 for (i = 0; i < 0x100; i += (sizeof(u32)))
327 data[j++] = smsc9420_reg_read(pd, i);
328
329
330 if (!phy_dev)
331 return;
332
333 for (i = 0; i <= 31; i++)
334 data[j++] = smsc9420_mii_read(phy_dev->mdio_bus,
335 phy_dev->mdio_addr, i);
336}
337
338static void smsc9420_eeprom_enable_access(struct smsc9420_pdata *pd)
339{
340 unsigned int temp = smsc9420_reg_read(pd, GPIO_CFG);
341 temp &= ~GPIO_CFG_EEPR_EN_;
342 smsc9420_reg_write(pd, GPIO_CFG, temp);
343 msleep(1);
344}
345
346static int smsc9420_eeprom_send_cmd(struct smsc9420_pdata *pd, u32 op)
347{
348 int timeout = 100;
349 u32 e2cmd;
350
351 smsc_dbg(HW, "op 0x%08x", op);
352 if (smsc9420_reg_read(pd, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
353 smsc_warn(HW, "Busy at start");
354 return -EBUSY;
355 }
356
357 e2cmd = op | E2P_CMD_EPC_BUSY_;
358 smsc9420_reg_write(pd, E2P_CMD, e2cmd);
359
360 do {
361 msleep(1);
362 e2cmd = smsc9420_reg_read(pd, E2P_CMD);
363 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
364
365 if (!timeout) {
366 smsc_info(HW, "TIMED OUT");
367 return -EAGAIN;
368 }
369
370 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
371 smsc_info(HW, "Error occurred during eeprom operation");
372 return -EINVAL;
373 }
374
375 return 0;
376}
377
378static int smsc9420_eeprom_read_location(struct smsc9420_pdata *pd,
379 u8 address, u8 *data)
380{
381 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
382 int ret;
383
384 smsc_dbg(HW, "address 0x%x", address);
385 ret = smsc9420_eeprom_send_cmd(pd, op);
386
387 if (!ret)
388 data[address] = smsc9420_reg_read(pd, E2P_DATA);
389
390 return ret;
391}
392
393static int smsc9420_eeprom_write_location(struct smsc9420_pdata *pd,
394 u8 address, u8 data)
395{
396 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
397 int ret;
398
399 smsc_dbg(HW, "address 0x%x, data 0x%x", address, data);
400 ret = smsc9420_eeprom_send_cmd(pd, op);
401
402 if (!ret) {
403 op = E2P_CMD_EPC_CMD_WRITE_ | address;
404 smsc9420_reg_write(pd, E2P_DATA, (u32)data);
405 ret = smsc9420_eeprom_send_cmd(pd, op);
406 }
407
408 return ret;
409}
410
411static int smsc9420_ethtool_get_eeprom_len(struct net_device *dev)
412{
413 return SMSC9420_EEPROM_SIZE;
414}
415
416static int smsc9420_ethtool_get_eeprom(struct net_device *dev,
417 struct ethtool_eeprom *eeprom, u8 *data)
418{
419 struct smsc9420_pdata *pd = netdev_priv(dev);
420 u8 eeprom_data[SMSC9420_EEPROM_SIZE];
421 int len, i;
422
423 smsc9420_eeprom_enable_access(pd);
424
425 len = min(eeprom->len, SMSC9420_EEPROM_SIZE);
426 for (i = 0; i < len; i++) {
427 int ret = smsc9420_eeprom_read_location(pd, i, eeprom_data);
428 if (ret < 0) {
429 eeprom->len = 0;
430 return ret;
431 }
432 }
433
434 memcpy(data, &eeprom_data[eeprom->offset], len);
435 eeprom->magic = SMSC9420_EEPROM_MAGIC;
436 eeprom->len = len;
437 return 0;
438}
439
440static int smsc9420_ethtool_set_eeprom(struct net_device *dev,
441 struct ethtool_eeprom *eeprom, u8 *data)
442{
443 struct smsc9420_pdata *pd = netdev_priv(dev);
444 int ret;
445
446 if (eeprom->magic != SMSC9420_EEPROM_MAGIC)
447 return -EINVAL;
448
449 smsc9420_eeprom_enable_access(pd);
450 smsc9420_eeprom_send_cmd(pd, E2P_CMD_EPC_CMD_EWEN_);
451 ret = smsc9420_eeprom_write_location(pd, eeprom->offset, *data);
452 smsc9420_eeprom_send_cmd(pd, E2P_CMD_EPC_CMD_EWDS_);
453
454
455 eeprom->len = 1;
456
457 return ret;
458}
459
460static const struct ethtool_ops smsc9420_ethtool_ops = {
461 .get_settings = smsc9420_ethtool_get_settings,
462 .set_settings = smsc9420_ethtool_set_settings,
463 .get_drvinfo = smsc9420_ethtool_get_drvinfo,
464 .get_msglevel = smsc9420_ethtool_get_msglevel,
465 .set_msglevel = smsc9420_ethtool_set_msglevel,
466 .nway_reset = smsc9420_ethtool_nway_reset,
467 .get_link = ethtool_op_get_link,
468 .get_eeprom_len = smsc9420_ethtool_get_eeprom_len,
469 .get_eeprom = smsc9420_ethtool_get_eeprom,
470 .set_eeprom = smsc9420_ethtool_set_eeprom,
471 .get_regs_len = smsc9420_ethtool_getregslen,
472 .get_regs = smsc9420_ethtool_getregs,
473 .get_ts_info = ethtool_op_get_ts_info,
474};
475
476
477static void smsc9420_set_mac_address(struct net_device *dev)
478{
479 struct smsc9420_pdata *pd = netdev_priv(dev);
480 u8 *dev_addr = dev->dev_addr;
481 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
482 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
483 (dev_addr[1] << 8) | dev_addr[0];
484
485 smsc9420_reg_write(pd, ADDRH, mac_high16);
486 smsc9420_reg_write(pd, ADDRL, mac_low32);
487}
488
489static void smsc9420_check_mac_address(struct net_device *dev)
490{
491 struct smsc9420_pdata *pd = netdev_priv(dev);
492
493
494 if (is_valid_ether_addr(dev->dev_addr)) {
495 smsc9420_set_mac_address(dev);
496 smsc_dbg(PROBE, "MAC Address is specified by configuration");
497 } else {
498
499
500 u32 mac_high16 = smsc9420_reg_read(pd, ADDRH);
501 u32 mac_low32 = smsc9420_reg_read(pd, ADDRL);
502 dev->dev_addr[0] = (u8)(mac_low32);
503 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
504 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
505 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
506 dev->dev_addr[4] = (u8)(mac_high16);
507 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
508
509 if (is_valid_ether_addr(dev->dev_addr)) {
510
511 smsc_dbg(PROBE, "Mac Address is read from EEPROM");
512 } else {
513
514 eth_hw_addr_random(dev);
515 smsc9420_set_mac_address(dev);
516 smsc_dbg(PROBE, "MAC Address is set to random");
517 }
518 }
519}
520
521static void smsc9420_stop_tx(struct smsc9420_pdata *pd)
522{
523 u32 dmac_control, mac_cr, dma_intr_ena;
524 int timeout = 1000;
525
526
527 dmac_control = smsc9420_reg_read(pd, DMAC_CONTROL);
528 dmac_control &= (~DMAC_CONTROL_ST_);
529 smsc9420_reg_write(pd, DMAC_CONTROL, dmac_control);
530
531
532 while (--timeout) {
533 if (smsc9420_reg_read(pd, DMAC_STATUS) & DMAC_STS_TS_)
534 break;
535 udelay(10);
536 }
537
538 if (!timeout)
539 smsc_warn(IFDOWN, "TX DMAC failed to stop");
540
541
542 smsc9420_reg_write(pd, DMAC_STATUS, DMAC_STS_TXPS_);
543
544
545 dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA);
546 dma_intr_ena &= ~(DMAC_INTR_ENA_TX_);
547 smsc9420_reg_write(pd, DMAC_INTR_ENA, dma_intr_ena);
548 smsc9420_pci_flush_write(pd);
549
550
551 mac_cr = smsc9420_reg_read(pd, MAC_CR) & (~MAC_CR_TXEN_);
552 smsc9420_reg_write(pd, MAC_CR, mac_cr);
553 smsc9420_pci_flush_write(pd);
554}
555
556static void smsc9420_free_tx_ring(struct smsc9420_pdata *pd)
557{
558 int i;
559
560 BUG_ON(!pd->tx_ring);
561
562 if (!pd->tx_buffers)
563 return;
564
565 for (i = 0; i < TX_RING_SIZE; i++) {
566 struct sk_buff *skb = pd->tx_buffers[i].skb;
567
568 if (skb) {
569 BUG_ON(!pd->tx_buffers[i].mapping);
570 pci_unmap_single(pd->pdev, pd->tx_buffers[i].mapping,
571 skb->len, PCI_DMA_TODEVICE);
572 dev_kfree_skb_any(skb);
573 }
574
575 pd->tx_ring[i].status = 0;
576 pd->tx_ring[i].length = 0;
577 pd->tx_ring[i].buffer1 = 0;
578 pd->tx_ring[i].buffer2 = 0;
579 }
580 wmb();
581
582 kfree(pd->tx_buffers);
583 pd->tx_buffers = NULL;
584
585 pd->tx_ring_head = 0;
586 pd->tx_ring_tail = 0;
587}
588
589static void smsc9420_free_rx_ring(struct smsc9420_pdata *pd)
590{
591 int i;
592
593 BUG_ON(!pd->rx_ring);
594
595 if (!pd->rx_buffers)
596 return;
597
598 for (i = 0; i < RX_RING_SIZE; i++) {
599 if (pd->rx_buffers[i].skb)
600 dev_kfree_skb_any(pd->rx_buffers[i].skb);
601
602 if (pd->rx_buffers[i].mapping)
603 pci_unmap_single(pd->pdev, pd->rx_buffers[i].mapping,
604 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
605
606 pd->rx_ring[i].status = 0;
607 pd->rx_ring[i].length = 0;
608 pd->rx_ring[i].buffer1 = 0;
609 pd->rx_ring[i].buffer2 = 0;
610 }
611 wmb();
612
613 kfree(pd->rx_buffers);
614 pd->rx_buffers = NULL;
615
616 pd->rx_ring_head = 0;
617 pd->rx_ring_tail = 0;
618}
619
620static void smsc9420_stop_rx(struct smsc9420_pdata *pd)
621{
622 int timeout = 1000;
623 u32 mac_cr, dmac_control, dma_intr_ena;
624
625
626 dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA);
627 dma_intr_ena &= (~DMAC_INTR_ENA_RX_);
628 smsc9420_reg_write(pd, DMAC_INTR_ENA, dma_intr_ena);
629 smsc9420_pci_flush_write(pd);
630
631
632 mac_cr = smsc9420_reg_read(pd, MAC_CR) & (~MAC_CR_RXEN_);
633 smsc9420_reg_write(pd, MAC_CR, mac_cr);
634 smsc9420_pci_flush_write(pd);
635
636
637 dmac_control = smsc9420_reg_read(pd, DMAC_CONTROL);
638 dmac_control &= (~DMAC_CONTROL_SR_);
639 smsc9420_reg_write(pd, DMAC_CONTROL, dmac_control);
640 smsc9420_pci_flush_write(pd);
641
642
643 while (--timeout) {
644 if (smsc9420_reg_read(pd, DMAC_STATUS) & DMAC_STS_RS_)
645 break;
646 udelay(10);
647 }
648
649 if (!timeout)
650 smsc_warn(IFDOWN, "RX DMAC did not stop! timeout.");
651
652
653 smsc9420_reg_write(pd, DMAC_STATUS, DMAC_STS_RXPS_);
654}
655
656static irqreturn_t smsc9420_isr(int irq, void *dev_id)
657{
658 struct smsc9420_pdata *pd = dev_id;
659 u32 int_cfg, int_sts, int_ctl;
660 irqreturn_t ret = IRQ_NONE;
661 ulong flags;
662
663 BUG_ON(!pd);
664 BUG_ON(!pd->ioaddr);
665
666 int_cfg = smsc9420_reg_read(pd, INT_CFG);
667
668
669 if ((int_cfg & (INT_CFG_IRQ_EN_ | INT_CFG_IRQ_INT_)) !=
670 (INT_CFG_IRQ_EN_ | INT_CFG_IRQ_INT_))
671 return IRQ_NONE;
672
673 int_sts = smsc9420_reg_read(pd, INT_STAT);
674
675 if (likely(INT_STAT_DMAC_INT_ & int_sts)) {
676 u32 status = smsc9420_reg_read(pd, DMAC_STATUS);
677 u32 ints_to_clear = 0;
678
679 if (status & DMAC_STS_TX_) {
680 ints_to_clear |= (DMAC_STS_TX_ | DMAC_STS_NIS_);
681 netif_wake_queue(pd->dev);
682 }
683
684 if (status & DMAC_STS_RX_) {
685
686 u32 dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA);
687 dma_intr_ena &= (~DMAC_INTR_ENA_RX_);
688 smsc9420_reg_write(pd, DMAC_INTR_ENA, dma_intr_ena);
689 smsc9420_pci_flush_write(pd);
690
691 ints_to_clear |= (DMAC_STS_RX_ | DMAC_STS_NIS_);
692 napi_schedule(&pd->napi);
693 }
694
695 if (ints_to_clear)
696 smsc9420_reg_write(pd, DMAC_STATUS, ints_to_clear);
697
698 ret = IRQ_HANDLED;
699 }
700
701 if (unlikely(INT_STAT_SW_INT_ & int_sts)) {
702
703 spin_lock_irqsave(&pd->int_lock, flags);
704 int_ctl = smsc9420_reg_read(pd, INT_CTL);
705 int_ctl &= (~INT_CTL_SW_INT_EN_);
706 smsc9420_reg_write(pd, INT_CTL, int_ctl);
707 spin_unlock_irqrestore(&pd->int_lock, flags);
708
709 smsc9420_reg_write(pd, INT_STAT, INT_STAT_SW_INT_);
710 pd->software_irq_signal = true;
711 smp_wmb();
712
713 ret = IRQ_HANDLED;
714 }
715
716
717 smsc9420_pci_flush_write(pd);
718
719 return ret;
720}
721
722#ifdef CONFIG_NET_POLL_CONTROLLER
723static void smsc9420_poll_controller(struct net_device *dev)
724{
725 struct smsc9420_pdata *pd = netdev_priv(dev);
726 const int irq = pd->pdev->irq;
727
728 disable_irq(irq);
729 smsc9420_isr(0, dev);
730 enable_irq(irq);
731}
732#endif
733
734static void smsc9420_dmac_soft_reset(struct smsc9420_pdata *pd)
735{
736 smsc9420_reg_write(pd, BUS_MODE, BUS_MODE_SWR_);
737 smsc9420_reg_read(pd, BUS_MODE);
738 udelay(2);
739 if (smsc9420_reg_read(pd, BUS_MODE) & BUS_MODE_SWR_)
740 smsc_warn(DRV, "Software reset not cleared");
741}
742
743static int smsc9420_stop(struct net_device *dev)
744{
745 struct smsc9420_pdata *pd = netdev_priv(dev);
746 u32 int_cfg;
747 ulong flags;
748
749 BUG_ON(!pd);
750 BUG_ON(!pd->phy_dev);
751
752
753 spin_lock_irqsave(&pd->int_lock, flags);
754 int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_);
755 smsc9420_reg_write(pd, INT_CFG, int_cfg);
756 spin_unlock_irqrestore(&pd->int_lock, flags);
757
758 netif_tx_disable(dev);
759 napi_disable(&pd->napi);
760
761 smsc9420_stop_tx(pd);
762 smsc9420_free_tx_ring(pd);
763
764 smsc9420_stop_rx(pd);
765 smsc9420_free_rx_ring(pd);
766
767 free_irq(pd->pdev->irq, pd);
768
769 smsc9420_dmac_soft_reset(pd);
770
771 phy_stop(pd->phy_dev);
772
773 phy_disconnect(pd->phy_dev);
774 pd->phy_dev = NULL;
775 mdiobus_unregister(pd->mii_bus);
776 mdiobus_free(pd->mii_bus);
777
778 return 0;
779}
780
781static void smsc9420_rx_count_stats(struct net_device *dev, u32 desc_status)
782{
783 if (unlikely(desc_status & RDES0_ERROR_SUMMARY_)) {
784 dev->stats.rx_errors++;
785 if (desc_status & RDES0_DESCRIPTOR_ERROR_)
786 dev->stats.rx_over_errors++;
787 else if (desc_status & (RDES0_FRAME_TOO_LONG_ |
788 RDES0_RUNT_FRAME_ | RDES0_COLLISION_SEEN_))
789 dev->stats.rx_frame_errors++;
790 else if (desc_status & RDES0_CRC_ERROR_)
791 dev->stats.rx_crc_errors++;
792 }
793
794 if (unlikely(desc_status & RDES0_LENGTH_ERROR_))
795 dev->stats.rx_length_errors++;
796
797 if (unlikely(!((desc_status & RDES0_LAST_DESCRIPTOR_) &&
798 (desc_status & RDES0_FIRST_DESCRIPTOR_))))
799 dev->stats.rx_length_errors++;
800
801 if (desc_status & RDES0_MULTICAST_FRAME_)
802 dev->stats.multicast++;
803}
804
805static void smsc9420_rx_handoff(struct smsc9420_pdata *pd, const int index,
806 const u32 status)
807{
808 struct net_device *dev = pd->dev;
809 struct sk_buff *skb;
810 u16 packet_length = (status & RDES0_FRAME_LENGTH_MASK_)
811 >> RDES0_FRAME_LENGTH_SHFT_;
812
813
814 packet_length -= 4;
815
816 if (pd->rx_csum)
817 packet_length -= 2;
818
819 dev->stats.rx_packets++;
820 dev->stats.rx_bytes += packet_length;
821
822 pci_unmap_single(pd->pdev, pd->rx_buffers[index].mapping,
823 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
824 pd->rx_buffers[index].mapping = 0;
825
826 skb = pd->rx_buffers[index].skb;
827 pd->rx_buffers[index].skb = NULL;
828
829 if (pd->rx_csum) {
830 u16 hw_csum = get_unaligned_le16(skb_tail_pointer(skb) +
831 NET_IP_ALIGN + packet_length + 4);
832 put_unaligned_le16(hw_csum, &skb->csum);
833 skb->ip_summed = CHECKSUM_COMPLETE;
834 }
835
836 skb_reserve(skb, NET_IP_ALIGN);
837 skb_put(skb, packet_length);
838
839 skb->protocol = eth_type_trans(skb, dev);
840
841 netif_receive_skb(skb);
842}
843
844static int smsc9420_alloc_rx_buffer(struct smsc9420_pdata *pd, int index)
845{
846 struct sk_buff *skb = netdev_alloc_skb(pd->dev, PKT_BUF_SZ);
847 dma_addr_t mapping;
848
849 BUG_ON(pd->rx_buffers[index].skb);
850 BUG_ON(pd->rx_buffers[index].mapping);
851
852 if (unlikely(!skb))
853 return -ENOMEM;
854
855 mapping = pci_map_single(pd->pdev, skb_tail_pointer(skb),
856 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
857 if (pci_dma_mapping_error(pd->pdev, mapping)) {
858 dev_kfree_skb_any(skb);
859 smsc_warn(RX_ERR, "pci_map_single failed!");
860 return -ENOMEM;
861 }
862
863 pd->rx_buffers[index].skb = skb;
864 pd->rx_buffers[index].mapping = mapping;
865 pd->rx_ring[index].buffer1 = mapping + NET_IP_ALIGN;
866 pd->rx_ring[index].status = RDES0_OWN_;
867 wmb();
868
869 return 0;
870}
871
872static void smsc9420_alloc_new_rx_buffers(struct smsc9420_pdata *pd)
873{
874 while (pd->rx_ring_tail != pd->rx_ring_head) {
875 if (smsc9420_alloc_rx_buffer(pd, pd->rx_ring_tail))
876 break;
877
878 pd->rx_ring_tail = (pd->rx_ring_tail + 1) % RX_RING_SIZE;
879 }
880}
881
882static int smsc9420_rx_poll(struct napi_struct *napi, int budget)
883{
884 struct smsc9420_pdata *pd =
885 container_of(napi, struct smsc9420_pdata, napi);
886 struct net_device *dev = pd->dev;
887 u32 drop_frame_cnt, dma_intr_ena, status;
888 int work_done;
889
890 for (work_done = 0; work_done < budget; work_done++) {
891 rmb();
892 status = pd->rx_ring[pd->rx_ring_head].status;
893
894
895 if (status & RDES0_OWN_)
896 break;
897
898 smsc9420_rx_count_stats(dev, status);
899 smsc9420_rx_handoff(pd, pd->rx_ring_head, status);
900 pd->rx_ring_head = (pd->rx_ring_head + 1) % RX_RING_SIZE;
901 smsc9420_alloc_new_rx_buffers(pd);
902 }
903
904 drop_frame_cnt = smsc9420_reg_read(pd, MISS_FRAME_CNTR);
905 dev->stats.rx_dropped +=
906 (drop_frame_cnt & 0xFFFF) + ((drop_frame_cnt >> 17) & 0x3FF);
907
908
909 smsc9420_reg_write(pd, RX_POLL_DEMAND, 1);
910 smsc9420_pci_flush_write(pd);
911
912 if (work_done < budget) {
913 napi_complete(&pd->napi);
914
915
916 dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA);
917 dma_intr_ena |= (DMAC_INTR_ENA_RX_ | DMAC_INTR_ENA_NIS_);
918 smsc9420_reg_write(pd, DMAC_INTR_ENA, dma_intr_ena);
919 smsc9420_pci_flush_write(pd);
920 }
921 return work_done;
922}
923
924static void
925smsc9420_tx_update_stats(struct net_device *dev, u32 status, u32 length)
926{
927 if (unlikely(status & TDES0_ERROR_SUMMARY_)) {
928 dev->stats.tx_errors++;
929 if (status & (TDES0_EXCESSIVE_DEFERRAL_ |
930 TDES0_EXCESSIVE_COLLISIONS_))
931 dev->stats.tx_aborted_errors++;
932
933 if (status & (TDES0_LOSS_OF_CARRIER_ | TDES0_NO_CARRIER_))
934 dev->stats.tx_carrier_errors++;
935 } else {
936 dev->stats.tx_packets++;
937 dev->stats.tx_bytes += (length & 0x7FF);
938 }
939
940 if (unlikely(status & TDES0_EXCESSIVE_COLLISIONS_)) {
941 dev->stats.collisions += 16;
942 } else {
943 dev->stats.collisions +=
944 (status & TDES0_COLLISION_COUNT_MASK_) >>
945 TDES0_COLLISION_COUNT_SHFT_;
946 }
947
948 if (unlikely(status & TDES0_HEARTBEAT_FAIL_))
949 dev->stats.tx_heartbeat_errors++;
950}
951
952
953static void smsc9420_complete_tx(struct net_device *dev)
954{
955 struct smsc9420_pdata *pd = netdev_priv(dev);
956
957 while (pd->tx_ring_tail != pd->tx_ring_head) {
958 int index = pd->tx_ring_tail;
959 u32 status, length;
960
961 rmb();
962 status = pd->tx_ring[index].status;
963 length = pd->tx_ring[index].length;
964
965
966 if (unlikely(TDES0_OWN_ & status))
967 break;
968
969 smsc9420_tx_update_stats(dev, status, length);
970
971 BUG_ON(!pd->tx_buffers[index].skb);
972 BUG_ON(!pd->tx_buffers[index].mapping);
973
974 pci_unmap_single(pd->pdev, pd->tx_buffers[index].mapping,
975 pd->tx_buffers[index].skb->len, PCI_DMA_TODEVICE);
976 pd->tx_buffers[index].mapping = 0;
977
978 dev_kfree_skb_any(pd->tx_buffers[index].skb);
979 pd->tx_buffers[index].skb = NULL;
980
981 pd->tx_ring[index].buffer1 = 0;
982 wmb();
983
984 pd->tx_ring_tail = (pd->tx_ring_tail + 1) % TX_RING_SIZE;
985 }
986}
987
988static netdev_tx_t smsc9420_hard_start_xmit(struct sk_buff *skb,
989 struct net_device *dev)
990{
991 struct smsc9420_pdata *pd = netdev_priv(dev);
992 dma_addr_t mapping;
993 int index = pd->tx_ring_head;
994 u32 tmp_desc1;
995 bool about_to_take_last_desc =
996 (((pd->tx_ring_head + 2) % TX_RING_SIZE) == pd->tx_ring_tail);
997
998 smsc9420_complete_tx(dev);
999
1000 rmb();
1001 BUG_ON(pd->tx_ring[index].status & TDES0_OWN_);
1002 BUG_ON(pd->tx_buffers[index].skb);
1003 BUG_ON(pd->tx_buffers[index].mapping);
1004
1005 mapping = pci_map_single(pd->pdev, skb->data,
1006 skb->len, PCI_DMA_TODEVICE);
1007 if (pci_dma_mapping_error(pd->pdev, mapping)) {
1008 smsc_warn(TX_ERR, "pci_map_single failed, dropping packet");
1009 return NETDEV_TX_BUSY;
1010 }
1011
1012 pd->tx_buffers[index].skb = skb;
1013 pd->tx_buffers[index].mapping = mapping;
1014
1015 tmp_desc1 = (TDES1_LS_ | ((u32)skb->len & 0x7FF));
1016 if (unlikely(about_to_take_last_desc)) {
1017 tmp_desc1 |= TDES1_IC_;
1018 netif_stop_queue(pd->dev);
1019 }
1020
1021
1022 if (unlikely(index == (TX_RING_SIZE - 1)))
1023 tmp_desc1 |= TDES1_TER_;
1024
1025 pd->tx_ring[index].buffer1 = mapping;
1026 pd->tx_ring[index].length = tmp_desc1;
1027 wmb();
1028
1029
1030 pd->tx_ring_head = (pd->tx_ring_head + 1) % TX_RING_SIZE;
1031
1032
1033 pd->tx_ring[index].status = TDES0_OWN_;
1034 wmb();
1035
1036 skb_tx_timestamp(skb);
1037
1038
1039 smsc9420_reg_write(pd, TX_POLL_DEMAND, 1);
1040 smsc9420_pci_flush_write(pd);
1041
1042 return NETDEV_TX_OK;
1043}
1044
1045static struct net_device_stats *smsc9420_get_stats(struct net_device *dev)
1046{
1047 struct smsc9420_pdata *pd = netdev_priv(dev);
1048 u32 counter = smsc9420_reg_read(pd, MISS_FRAME_CNTR);
1049 dev->stats.rx_dropped +=
1050 (counter & 0x0000FFFF) + ((counter >> 17) & 0x000003FF);
1051 return &dev->stats;
1052}
1053
1054static void smsc9420_set_multicast_list(struct net_device *dev)
1055{
1056 struct smsc9420_pdata *pd = netdev_priv(dev);
1057 u32 mac_cr = smsc9420_reg_read(pd, MAC_CR);
1058
1059 if (dev->flags & IFF_PROMISC) {
1060 smsc_dbg(HW, "Promiscuous Mode Enabled");
1061 mac_cr |= MAC_CR_PRMS_;
1062 mac_cr &= (~MAC_CR_MCPAS_);
1063 mac_cr &= (~MAC_CR_HPFILT_);
1064 } else if (dev->flags & IFF_ALLMULTI) {
1065 smsc_dbg(HW, "Receive all Multicast Enabled");
1066 mac_cr &= (~MAC_CR_PRMS_);
1067 mac_cr |= MAC_CR_MCPAS_;
1068 mac_cr &= (~MAC_CR_HPFILT_);
1069 } else if (!netdev_mc_empty(dev)) {
1070 struct netdev_hw_addr *ha;
1071 u32 hash_lo = 0, hash_hi = 0;
1072
1073 smsc_dbg(HW, "Multicast filter enabled");
1074 netdev_for_each_mc_addr(ha, dev) {
1075 u32 bit_num = smsc9420_hash(ha->addr);
1076 u32 mask = 1 << (bit_num & 0x1F);
1077
1078 if (bit_num & 0x20)
1079 hash_hi |= mask;
1080 else
1081 hash_lo |= mask;
1082
1083 }
1084 smsc9420_reg_write(pd, HASHH, hash_hi);
1085 smsc9420_reg_write(pd, HASHL, hash_lo);
1086
1087 mac_cr &= (~MAC_CR_PRMS_);
1088 mac_cr &= (~MAC_CR_MCPAS_);
1089 mac_cr |= MAC_CR_HPFILT_;
1090 } else {
1091 smsc_dbg(HW, "Receive own packets only.");
1092 smsc9420_reg_write(pd, HASHH, 0);
1093 smsc9420_reg_write(pd, HASHL, 0);
1094
1095 mac_cr &= (~MAC_CR_PRMS_);
1096 mac_cr &= (~MAC_CR_MCPAS_);
1097 mac_cr &= (~MAC_CR_HPFILT_);
1098 }
1099
1100 smsc9420_reg_write(pd, MAC_CR, mac_cr);
1101 smsc9420_pci_flush_write(pd);
1102}
1103
1104static void smsc9420_phy_update_flowcontrol(struct smsc9420_pdata *pd)
1105{
1106 struct phy_device *phy_dev = pd->phy_dev;
1107 u32 flow;
1108
1109 if (phy_dev->duplex == DUPLEX_FULL) {
1110 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
1111 u16 rmtadv = phy_read(phy_dev, MII_LPA);
1112 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1113
1114 if (cap & FLOW_CTRL_RX)
1115 flow = 0xFFFF0002;
1116 else
1117 flow = 0;
1118
1119 smsc_info(LINK, "rx pause %s, tx pause %s",
1120 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1121 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1122 } else {
1123 smsc_info(LINK, "half duplex");
1124 flow = 0;
1125 }
1126
1127 smsc9420_reg_write(pd, FLOW, flow);
1128}
1129
1130
1131
1132static void smsc9420_phy_adjust_link(struct net_device *dev)
1133{
1134 struct smsc9420_pdata *pd = netdev_priv(dev);
1135 struct phy_device *phy_dev = pd->phy_dev;
1136 int carrier;
1137
1138 if (phy_dev->duplex != pd->last_duplex) {
1139 u32 mac_cr = smsc9420_reg_read(pd, MAC_CR);
1140 if (phy_dev->duplex) {
1141 smsc_dbg(LINK, "full duplex mode");
1142 mac_cr |= MAC_CR_FDPX_;
1143 } else {
1144 smsc_dbg(LINK, "half duplex mode");
1145 mac_cr &= ~MAC_CR_FDPX_;
1146 }
1147 smsc9420_reg_write(pd, MAC_CR, mac_cr);
1148
1149 smsc9420_phy_update_flowcontrol(pd);
1150 pd->last_duplex = phy_dev->duplex;
1151 }
1152
1153 carrier = netif_carrier_ok(dev);
1154 if (carrier != pd->last_carrier) {
1155 if (carrier)
1156 smsc_dbg(LINK, "carrier OK");
1157 else
1158 smsc_dbg(LINK, "no carrier");
1159 pd->last_carrier = carrier;
1160 }
1161}
1162
1163static int smsc9420_mii_probe(struct net_device *dev)
1164{
1165 struct smsc9420_pdata *pd = netdev_priv(dev);
1166 struct phy_device *phydev = NULL;
1167
1168 BUG_ON(pd->phy_dev);
1169
1170
1171 if (!pd->mii_bus->phy_map[1]) {
1172 pr_err("%s: no PHY found at address 1\n", dev->name);
1173 return -ENODEV;
1174 }
1175
1176 phydev = phy_connect(dev, phydev_name(phydev),
1177 smsc9420_phy_adjust_link, PHY_INTERFACE_MODE_MII);
1178
1179 if (IS_ERR(phydev)) {
1180 pr_err("%s: Could not attach to PHY\n", dev->name);
1181 return PTR_ERR(phydev);
1182 }
1183
1184
1185 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
1186 SUPPORTED_Asym_Pause);
1187 phydev->advertising = phydev->supported;
1188
1189 phy_attached_info(phydev);
1190
1191 pd->phy_dev = phydev;
1192 pd->last_duplex = -1;
1193 pd->last_carrier = -1;
1194
1195 return 0;
1196}
1197
1198static int smsc9420_mii_init(struct net_device *dev)
1199{
1200 struct smsc9420_pdata *pd = netdev_priv(dev);
1201 int err = -ENXIO, i;
1202
1203 pd->mii_bus = mdiobus_alloc();
1204 if (!pd->mii_bus) {
1205 err = -ENOMEM;
1206 goto err_out_1;
1207 }
1208 pd->mii_bus->name = DRV_MDIONAME;
1209 snprintf(pd->mii_bus->id, MII_BUS_ID_SIZE, "%x",
1210 (pd->pdev->bus->number << 8) | pd->pdev->devfn);
1211 pd->mii_bus->priv = pd;
1212 pd->mii_bus->read = smsc9420_mii_read;
1213 pd->mii_bus->write = smsc9420_mii_write;
1214 pd->mii_bus->irq = pd->phy_irq;
1215 for (i = 0; i < PHY_MAX_ADDR; ++i)
1216 pd->mii_bus->irq[i] = PHY_POLL;
1217
1218
1219 pd->mii_bus->phy_mask = ~(1 << 1);
1220
1221 if (mdiobus_register(pd->mii_bus)) {
1222 smsc_warn(PROBE, "Error registering mii bus");
1223 goto err_out_free_bus_2;
1224 }
1225
1226 if (smsc9420_mii_probe(dev) < 0) {
1227 smsc_warn(PROBE, "Error probing mii bus");
1228 goto err_out_unregister_bus_3;
1229 }
1230
1231 return 0;
1232
1233err_out_unregister_bus_3:
1234 mdiobus_unregister(pd->mii_bus);
1235err_out_free_bus_2:
1236 mdiobus_free(pd->mii_bus);
1237err_out_1:
1238 return err;
1239}
1240
1241static int smsc9420_alloc_tx_ring(struct smsc9420_pdata *pd)
1242{
1243 int i;
1244
1245 BUG_ON(!pd->tx_ring);
1246
1247 pd->tx_buffers = kmalloc_array(TX_RING_SIZE,
1248 sizeof(struct smsc9420_ring_info),
1249 GFP_KERNEL);
1250 if (!pd->tx_buffers)
1251 return -ENOMEM;
1252
1253
1254 for (i = 0; i < TX_RING_SIZE; i++) {
1255 pd->tx_buffers[i].skb = NULL;
1256 pd->tx_buffers[i].mapping = 0;
1257 pd->tx_ring[i].status = 0;
1258 pd->tx_ring[i].length = 0;
1259 pd->tx_ring[i].buffer1 = 0;
1260 pd->tx_ring[i].buffer2 = 0;
1261 }
1262 pd->tx_ring[TX_RING_SIZE - 1].length = TDES1_TER_;
1263 wmb();
1264
1265 pd->tx_ring_head = 0;
1266 pd->tx_ring_tail = 0;
1267
1268 smsc9420_reg_write(pd, TX_BASE_ADDR, pd->tx_dma_addr);
1269 smsc9420_pci_flush_write(pd);
1270
1271 return 0;
1272}
1273
1274static int smsc9420_alloc_rx_ring(struct smsc9420_pdata *pd)
1275{
1276 int i;
1277
1278 BUG_ON(!pd->rx_ring);
1279
1280 pd->rx_buffers = kmalloc((sizeof(struct smsc9420_ring_info) *
1281 RX_RING_SIZE), GFP_KERNEL);
1282 if (pd->rx_buffers == NULL) {
1283 smsc_warn(IFUP, "Failed to allocated rx_buffers");
1284 goto out;
1285 }
1286
1287
1288 for (i = 0; i < RX_RING_SIZE; i++) {
1289 pd->rx_ring[i].status = 0;
1290 pd->rx_ring[i].length = PKT_BUF_SZ;
1291 pd->rx_ring[i].buffer2 = 0;
1292 pd->rx_buffers[i].skb = NULL;
1293 pd->rx_buffers[i].mapping = 0;
1294 }
1295 pd->rx_ring[RX_RING_SIZE - 1].length = (PKT_BUF_SZ | RDES1_RER_);
1296
1297
1298 for (i = 0; i < RX_RING_SIZE; i++) {
1299 if (smsc9420_alloc_rx_buffer(pd, i)) {
1300 smsc_warn(IFUP, "failed to allocate rx skb %d", i);
1301 goto out_free_rx_skbs;
1302 }
1303 }
1304
1305 pd->rx_ring_head = 0;
1306 pd->rx_ring_tail = 0;
1307
1308 smsc9420_reg_write(pd, VLAN1, ETH_P_8021Q);
1309 smsc_dbg(IFUP, "VLAN1 = 0x%08x", smsc9420_reg_read(pd, VLAN1));
1310
1311 if (pd->rx_csum) {
1312
1313 u32 coe = smsc9420_reg_read(pd, COE_CR) | RX_COE_EN;
1314 smsc9420_reg_write(pd, COE_CR, coe);
1315 smsc_dbg(IFUP, "COE_CR = 0x%08x", coe);
1316 }
1317
1318 smsc9420_reg_write(pd, RX_BASE_ADDR, pd->rx_dma_addr);
1319 smsc9420_pci_flush_write(pd);
1320
1321 return 0;
1322
1323out_free_rx_skbs:
1324 smsc9420_free_rx_ring(pd);
1325out:
1326 return -ENOMEM;
1327}
1328
1329static int smsc9420_open(struct net_device *dev)
1330{
1331 struct smsc9420_pdata *pd = netdev_priv(dev);
1332 u32 bus_mode, mac_cr, dmac_control, int_cfg, dma_intr_ena, int_ctl;
1333 const int irq = pd->pdev->irq;
1334 unsigned long flags;
1335 int result = 0, timeout;
1336
1337 if (!is_valid_ether_addr(dev->dev_addr)) {
1338 smsc_warn(IFUP, "dev_addr is not a valid MAC address");
1339 result = -EADDRNOTAVAIL;
1340 goto out_0;
1341 }
1342
1343 netif_carrier_off(dev);
1344
1345
1346 spin_lock_irqsave(&pd->int_lock, flags);
1347 int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_);
1348 smsc9420_reg_write(pd, INT_CFG, int_cfg);
1349 smsc9420_reg_write(pd, INT_CTL, 0);
1350 spin_unlock_irqrestore(&pd->int_lock, flags);
1351 smsc9420_reg_write(pd, DMAC_INTR_ENA, 0);
1352 smsc9420_reg_write(pd, INT_STAT, 0xFFFFFFFF);
1353 smsc9420_pci_flush_write(pd);
1354
1355 result = request_irq(irq, smsc9420_isr, IRQF_SHARED | IRQF_DISABLED,
1356 DRV_NAME, pd);
1357 if (result) {
1358 smsc_warn(IFUP, "Unable to use IRQ = %d", irq);
1359 result = -ENODEV;
1360 goto out_0;
1361 }
1362
1363 smsc9420_dmac_soft_reset(pd);
1364
1365
1366 smsc9420_reg_write(pd, MAC_CR, 0);
1367
1368 smsc9420_set_mac_address(dev);
1369
1370
1371 smsc9420_reg_write(pd, GPIO_CFG,
1372 (GPIO_CFG_LED_3_ | GPIO_CFG_LED_2_ | GPIO_CFG_LED_1_));
1373
1374 bus_mode = BUS_MODE_DMA_BURST_LENGTH_16;
1375
1376#ifdef __BIG_ENDIAN
1377 bus_mode |= BUS_MODE_DBO_;
1378#endif
1379
1380 smsc9420_reg_write(pd, BUS_MODE, bus_mode);
1381
1382 smsc9420_pci_flush_write(pd);
1383
1384
1385 smsc9420_reg_write(pd, BUS_CFG, BUS_CFG_RXTXWEIGHT_4_1);
1386
1387 smsc9420_reg_write(pd, DMAC_CONTROL,
1388 (DMAC_CONTROL_SF_ | DMAC_CONTROL_OSF_));
1389
1390 smsc9420_pci_flush_write(pd);
1391
1392
1393 smsc_dbg(IFUP, "Testing ISR using IRQ %d", irq);
1394 pd->software_irq_signal = false;
1395
1396 spin_lock_irqsave(&pd->int_lock, flags);
1397
1398 int_cfg = smsc9420_reg_read(pd, INT_CFG) | INT_CFG_IRQ_EN_;
1399 int_cfg &= ~(INT_CFG_INT_DEAS_MASK);
1400 int_cfg |= (INT_DEAS_TIME & INT_CFG_INT_DEAS_MASK);
1401 smsc9420_reg_write(pd, INT_CFG, int_cfg);
1402
1403
1404 int_ctl = smsc9420_reg_read(pd, INT_CTL) | INT_CTL_SW_INT_EN_;
1405 smsc9420_reg_write(pd, INT_CTL, int_ctl);
1406 spin_unlock_irqrestore(&pd->int_lock, flags);
1407 smsc9420_pci_flush_write(pd);
1408
1409 timeout = 1000;
1410 while (timeout--) {
1411 if (pd->software_irq_signal)
1412 break;
1413 msleep(1);
1414 }
1415
1416
1417 spin_lock_irqsave(&pd->int_lock, flags);
1418 int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_);
1419 smsc9420_reg_write(pd, INT_CFG, int_cfg);
1420 spin_unlock_irqrestore(&pd->int_lock, flags);
1421
1422 if (!pd->software_irq_signal) {
1423 smsc_warn(IFUP, "ISR failed signaling test");
1424 result = -ENODEV;
1425 goto out_free_irq_1;
1426 }
1427
1428 smsc_dbg(IFUP, "ISR passed test using IRQ %d", irq);
1429
1430 result = smsc9420_alloc_tx_ring(pd);
1431 if (result) {
1432 smsc_warn(IFUP, "Failed to Initialize tx dma ring");
1433 result = -ENOMEM;
1434 goto out_free_irq_1;
1435 }
1436
1437 result = smsc9420_alloc_rx_ring(pd);
1438 if (result) {
1439 smsc_warn(IFUP, "Failed to Initialize rx dma ring");
1440 result = -ENOMEM;
1441 goto out_free_tx_ring_2;
1442 }
1443
1444 result = smsc9420_mii_init(dev);
1445 if (result) {
1446 smsc_warn(IFUP, "Failed to initialize Phy");
1447 result = -ENODEV;
1448 goto out_free_rx_ring_3;
1449 }
1450
1451
1452 phy_start(pd->phy_dev);
1453
1454 napi_enable(&pd->napi);
1455
1456
1457 mac_cr = smsc9420_reg_read(pd, MAC_CR) | MAC_CR_TXEN_ | MAC_CR_RXEN_;
1458 smsc9420_reg_write(pd, MAC_CR, mac_cr);
1459
1460 dmac_control = smsc9420_reg_read(pd, DMAC_CONTROL);
1461 dmac_control |= DMAC_CONTROL_ST_ | DMAC_CONTROL_SR_;
1462 smsc9420_reg_write(pd, DMAC_CONTROL, dmac_control);
1463 smsc9420_pci_flush_write(pd);
1464
1465 dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA);
1466 dma_intr_ena |=
1467 (DMAC_INTR_ENA_TX_ | DMAC_INTR_ENA_RX_ | DMAC_INTR_ENA_NIS_);
1468 smsc9420_reg_write(pd, DMAC_INTR_ENA, dma_intr_ena);
1469 smsc9420_pci_flush_write(pd);
1470
1471 netif_wake_queue(dev);
1472
1473 smsc9420_reg_write(pd, RX_POLL_DEMAND, 1);
1474
1475
1476 spin_lock_irqsave(&pd->int_lock, flags);
1477 int_cfg = smsc9420_reg_read(pd, INT_CFG) | INT_CFG_IRQ_EN_;
1478 smsc9420_reg_write(pd, INT_CFG, int_cfg);
1479 spin_unlock_irqrestore(&pd->int_lock, flags);
1480
1481 return 0;
1482
1483out_free_rx_ring_3:
1484 smsc9420_free_rx_ring(pd);
1485out_free_tx_ring_2:
1486 smsc9420_free_tx_ring(pd);
1487out_free_irq_1:
1488 free_irq(irq, pd);
1489out_0:
1490 return result;
1491}
1492
1493#ifdef CONFIG_PM
1494
1495static int smsc9420_suspend(struct pci_dev *pdev, pm_message_t state)
1496{
1497 struct net_device *dev = pci_get_drvdata(pdev);
1498 struct smsc9420_pdata *pd = netdev_priv(dev);
1499 u32 int_cfg;
1500 ulong flags;
1501
1502
1503 spin_lock_irqsave(&pd->int_lock, flags);
1504 int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_);
1505 smsc9420_reg_write(pd, INT_CFG, int_cfg);
1506 spin_unlock_irqrestore(&pd->int_lock, flags);
1507
1508 if (netif_running(dev)) {
1509 netif_tx_disable(dev);
1510 smsc9420_stop_tx(pd);
1511 smsc9420_free_tx_ring(pd);
1512
1513 napi_disable(&pd->napi);
1514 smsc9420_stop_rx(pd);
1515 smsc9420_free_rx_ring(pd);
1516
1517 free_irq(pd->pdev->irq, pd);
1518
1519 netif_device_detach(dev);
1520 }
1521
1522 pci_save_state(pdev);
1523 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1524 pci_disable_device(pdev);
1525 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1526
1527 return 0;
1528}
1529
1530static int smsc9420_resume(struct pci_dev *pdev)
1531{
1532 struct net_device *dev = pci_get_drvdata(pdev);
1533 struct smsc9420_pdata *pd = netdev_priv(dev);
1534 int err;
1535
1536 pci_set_power_state(pdev, PCI_D0);
1537 pci_restore_state(pdev);
1538
1539 err = pci_enable_device(pdev);
1540 if (err)
1541 return err;
1542
1543 pci_set_master(pdev);
1544
1545 err = pci_enable_wake(pdev, 0, 0);
1546 if (err)
1547 smsc_warn(IFUP, "pci_enable_wake failed: %d", err);
1548
1549 if (netif_running(dev)) {
1550
1551 err = smsc9420_open(dev);
1552 netif_device_attach(dev);
1553 }
1554 return err;
1555}
1556
1557#endif
1558
1559static const struct net_device_ops smsc9420_netdev_ops = {
1560 .ndo_open = smsc9420_open,
1561 .ndo_stop = smsc9420_stop,
1562 .ndo_start_xmit = smsc9420_hard_start_xmit,
1563 .ndo_get_stats = smsc9420_get_stats,
1564 .ndo_set_rx_mode = smsc9420_set_multicast_list,
1565 .ndo_do_ioctl = smsc9420_do_ioctl,
1566 .ndo_validate_addr = eth_validate_addr,
1567 .ndo_set_mac_address = eth_mac_addr,
1568#ifdef CONFIG_NET_POLL_CONTROLLER
1569 .ndo_poll_controller = smsc9420_poll_controller,
1570#endif
1571};
1572
1573static int
1574smsc9420_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1575{
1576 struct net_device *dev;
1577 struct smsc9420_pdata *pd;
1578 void __iomem *virt_addr;
1579 int result = 0;
1580 u32 id_rev;
1581
1582 printk(KERN_INFO DRV_DESCRIPTION " version " DRV_VERSION "\n");
1583
1584
1585 result = pci_enable_device(pdev);
1586 if (unlikely(result)) {
1587 printk(KERN_ERR "Cannot enable smsc9420\n");
1588 goto out_0;
1589 }
1590
1591 pci_set_master(pdev);
1592
1593 dev = alloc_etherdev(sizeof(*pd));
1594 if (!dev)
1595 goto out_disable_pci_device_1;
1596
1597 SET_NETDEV_DEV(dev, &pdev->dev);
1598
1599 if (!(pci_resource_flags(pdev, SMSC_BAR) & IORESOURCE_MEM)) {
1600 printk(KERN_ERR "Cannot find PCI device base address\n");
1601 goto out_free_netdev_2;
1602 }
1603
1604 if ((pci_request_regions(pdev, DRV_NAME))) {
1605 printk(KERN_ERR "Cannot obtain PCI resources, aborting.\n");
1606 goto out_free_netdev_2;
1607 }
1608
1609 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1610 printk(KERN_ERR "No usable DMA configuration, aborting.\n");
1611 goto out_free_regions_3;
1612 }
1613
1614 virt_addr = ioremap(pci_resource_start(pdev, SMSC_BAR),
1615 pci_resource_len(pdev, SMSC_BAR));
1616 if (!virt_addr) {
1617 printk(KERN_ERR "Cannot map device registers, aborting.\n");
1618 goto out_free_regions_3;
1619 }
1620
1621
1622 virt_addr += LAN9420_CPSR_ENDIAN_OFFSET;
1623
1624 pd = netdev_priv(dev);
1625
1626
1627 pd->rx_ring = pci_alloc_consistent(pdev,
1628 sizeof(struct smsc9420_dma_desc) * RX_RING_SIZE +
1629 sizeof(struct smsc9420_dma_desc) * TX_RING_SIZE,
1630 &pd->rx_dma_addr);
1631
1632 if (!pd->rx_ring)
1633 goto out_free_io_4;
1634
1635
1636 pd->tx_ring = (pd->rx_ring + RX_RING_SIZE);
1637 pd->tx_dma_addr = pd->rx_dma_addr +
1638 sizeof(struct smsc9420_dma_desc) * RX_RING_SIZE;
1639
1640 pd->pdev = pdev;
1641 pd->dev = dev;
1642 pd->ioaddr = virt_addr;
1643 pd->msg_enable = smsc_debug;
1644 pd->rx_csum = true;
1645
1646 smsc_dbg(PROBE, "lan_base=0x%08lx", (ulong)virt_addr);
1647
1648 id_rev = smsc9420_reg_read(pd, ID_REV);
1649 switch (id_rev & 0xFFFF0000) {
1650 case 0x94200000:
1651 smsc_info(PROBE, "LAN9420 identified, ID_REV=0x%08X", id_rev);
1652 break;
1653 default:
1654 smsc_warn(PROBE, "LAN9420 NOT identified");
1655 smsc_warn(PROBE, "ID_REV=0x%08X", id_rev);
1656 goto out_free_dmadesc_5;
1657 }
1658
1659 smsc9420_dmac_soft_reset(pd);
1660 smsc9420_eeprom_reload(pd);
1661 smsc9420_check_mac_address(dev);
1662
1663 dev->netdev_ops = &smsc9420_netdev_ops;
1664 dev->ethtool_ops = &smsc9420_ethtool_ops;
1665
1666 netif_napi_add(dev, &pd->napi, smsc9420_rx_poll, NAPI_WEIGHT);
1667
1668 result = register_netdev(dev);
1669 if (result) {
1670 smsc_warn(PROBE, "error %i registering device", result);
1671 goto out_free_dmadesc_5;
1672 }
1673
1674 pci_set_drvdata(pdev, dev);
1675
1676 spin_lock_init(&pd->int_lock);
1677 spin_lock_init(&pd->phy_lock);
1678
1679 dev_info(&dev->dev, "MAC Address: %pM\n", dev->dev_addr);
1680
1681 return 0;
1682
1683out_free_dmadesc_5:
1684 pci_free_consistent(pdev, sizeof(struct smsc9420_dma_desc) *
1685 (RX_RING_SIZE + TX_RING_SIZE), pd->rx_ring, pd->rx_dma_addr);
1686out_free_io_4:
1687 iounmap(virt_addr - LAN9420_CPSR_ENDIAN_OFFSET);
1688out_free_regions_3:
1689 pci_release_regions(pdev);
1690out_free_netdev_2:
1691 free_netdev(dev);
1692out_disable_pci_device_1:
1693 pci_disable_device(pdev);
1694out_0:
1695 return -ENODEV;
1696}
1697
1698static void smsc9420_remove(struct pci_dev *pdev)
1699{
1700 struct net_device *dev;
1701 struct smsc9420_pdata *pd;
1702
1703 dev = pci_get_drvdata(pdev);
1704 if (!dev)
1705 return;
1706
1707 pci_set_drvdata(pdev, NULL);
1708
1709 pd = netdev_priv(dev);
1710 unregister_netdev(dev);
1711
1712
1713 BUG_ON(pd->tx_buffers);
1714 BUG_ON(pd->rx_buffers);
1715
1716 BUG_ON(!pd->tx_ring);
1717 BUG_ON(!pd->rx_ring);
1718
1719 pci_free_consistent(pdev, sizeof(struct smsc9420_dma_desc) *
1720 (RX_RING_SIZE + TX_RING_SIZE), pd->rx_ring, pd->rx_dma_addr);
1721
1722 iounmap(pd->ioaddr - LAN9420_CPSR_ENDIAN_OFFSET);
1723 pci_release_regions(pdev);
1724 free_netdev(dev);
1725 pci_disable_device(pdev);
1726}
1727
1728static struct pci_driver smsc9420_driver = {
1729 .name = DRV_NAME,
1730 .id_table = smsc9420_id_table,
1731 .probe = smsc9420_probe,
1732 .remove = smsc9420_remove,
1733#ifdef CONFIG_PM
1734 .suspend = smsc9420_suspend,
1735 .resume = smsc9420_resume,
1736#endif
1737};
1738
1739static int __init smsc9420_init_module(void)
1740{
1741 smsc_debug = netif_msg_init(debug, SMSC_MSG_DEFAULT);
1742
1743 return pci_register_driver(&smsc9420_driver);
1744}
1745
1746static void __exit smsc9420_exit_module(void)
1747{
1748 pci_unregister_driver(&smsc9420_driver);
1749}
1750
1751module_init(smsc9420_init_module);
1752module_exit(smsc9420_exit_module);
1753
