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6
7#include "qla_def.h"
8#include "qla_gbl.h"
9
10#include <linux/delay.h>
11#include <linux/slab.h>
12#include <linux/vmalloc.h>
13
14#include "qla_devtbl.h"
15
16#ifdef CONFIG_SPARC
17#include <asm/prom.h>
18#endif
19
20#include <target/target_core_base.h>
21#include "qla_target.h"
22
23
24
25
26static int qla2x00_isp_firmware(scsi_qla_host_t *);
27static int qla2x00_setup_chip(scsi_qla_host_t *);
28static int qla2x00_fw_ready(scsi_qla_host_t *);
29static int qla2x00_configure_hba(scsi_qla_host_t *);
30static int qla2x00_configure_loop(scsi_qla_host_t *);
31static int qla2x00_configure_local_loop(scsi_qla_host_t *);
32static int qla2x00_configure_fabric(scsi_qla_host_t *);
33static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
34static int qla2x00_restart_isp(scsi_qla_host_t *);
35
36static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
37static int qla84xx_init_chip(scsi_qla_host_t *);
38static int qla25xx_init_queues(struct qla_hw_data *);
39static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
40static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *,
41 struct event_arg *);
42static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
43 struct event_arg *);
44static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
45
46
47
48void
49qla2x00_sp_timeout(unsigned long __data)
50{
51 srb_t *sp = (srb_t *)__data;
52 struct srb_iocb *iocb;
53 struct req_que *req;
54 unsigned long flags;
55 struct qla_hw_data *ha = sp->vha->hw;
56
57 WARN_ON_ONCE(irqs_disabled());
58 spin_lock_irqsave(&ha->hardware_lock, flags);
59 req = sp->qpair->req;
60 req->outstanding_cmds[sp->handle] = NULL;
61 iocb = &sp->u.iocb_cmd;
62 spin_unlock_irqrestore(&ha->hardware_lock, flags);
63 iocb->timeout(sp);
64}
65
66void
67qla2x00_sp_free(void *ptr)
68{
69 srb_t *sp = ptr;
70 struct srb_iocb *iocb = &sp->u.iocb_cmd;
71
72 del_timer(&iocb->timer);
73 qla2x00_rel_sp(sp);
74}
75
76
77
78unsigned long
79qla2x00_get_async_timeout(struct scsi_qla_host *vha)
80{
81 unsigned long tmo;
82 struct qla_hw_data *ha = vha->hw;
83
84
85 tmo = ha->r_a_tov / 10 * 2;
86 if (IS_QLAFX00(ha)) {
87 tmo = FX00_DEF_RATOV * 2;
88 } else if (!IS_FWI2_CAPABLE(ha)) {
89
90
91
92
93 tmo = ha->login_timeout;
94 }
95 return tmo;
96}
97
98void
99qla2x00_async_iocb_timeout(void *data)
100{
101 srb_t *sp = data;
102 fc_port_t *fcport = sp->fcport;
103 struct srb_iocb *lio = &sp->u.iocb_cmd;
104 int rc, h;
105 unsigned long flags;
106
107 if (fcport) {
108 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
109 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
110 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
111
112 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
113 } else {
114 pr_info("Async-%s timeout - hdl=%x.\n",
115 sp->name, sp->handle);
116 }
117
118 switch (sp->type) {
119 case SRB_LOGIN_CMD:
120 rc = qla24xx_async_abort_cmd(sp, false);
121 if (rc) {
122
123 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
124 lio->u.logio.data[1] =
125 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
126 QLA_LOGIO_LOGIN_RETRIED : 0;
127 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
128 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
129 h++) {
130 if (sp->qpair->req->outstanding_cmds[h] ==
131 sp) {
132 sp->qpair->req->outstanding_cmds[h] =
133 NULL;
134 break;
135 }
136 }
137 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
138 sp->done(sp, QLA_FUNCTION_TIMEOUT);
139 }
140 break;
141 case SRB_LOGOUT_CMD:
142 case SRB_CT_PTHRU_CMD:
143 case SRB_MB_IOCB:
144 case SRB_NACK_PLOGI:
145 case SRB_NACK_PRLI:
146 case SRB_NACK_LOGO:
147 case SRB_CTRL_VP:
148 rc = qla24xx_async_abort_cmd(sp, false);
149 if (rc) {
150 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
151 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
152 h++) {
153 if (sp->qpair->req->outstanding_cmds[h] ==
154 sp) {
155 sp->qpair->req->outstanding_cmds[h] =
156 NULL;
157 break;
158 }
159 }
160 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
161 sp->done(sp, QLA_FUNCTION_TIMEOUT);
162 }
163 break;
164 }
165}
166
167static void
168qla2x00_async_login_sp_done(void *ptr, int res)
169{
170 srb_t *sp = ptr;
171 struct scsi_qla_host *vha = sp->vha;
172 struct srb_iocb *lio = &sp->u.iocb_cmd;
173 struct event_arg ea;
174
175 ql_dbg(ql_dbg_disc, vha, 0x20dd,
176 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
177
178 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
179
180 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
181 memset(&ea, 0, sizeof(ea));
182 ea.event = FCME_PLOGI_DONE;
183 ea.fcport = sp->fcport;
184 ea.data[0] = lio->u.logio.data[0];
185 ea.data[1] = lio->u.logio.data[1];
186 ea.iop[0] = lio->u.logio.iop[0];
187 ea.iop[1] = lio->u.logio.iop[1];
188 ea.sp = sp;
189 qla2x00_fcport_event_handler(vha, &ea);
190 }
191
192 sp->free(sp);
193}
194
195static inline bool
196fcport_is_smaller(fc_port_t *fcport)
197{
198 if (wwn_to_u64(fcport->port_name) <
199 wwn_to_u64(fcport->vha->port_name))
200 return true;
201 else
202 return false;
203}
204
205static inline bool
206fcport_is_bigger(fc_port_t *fcport)
207{
208 return !fcport_is_smaller(fcport);
209}
210
211int
212qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
213 uint16_t *data)
214{
215 srb_t *sp;
216 struct srb_iocb *lio;
217 int rval = QLA_FUNCTION_FAILED;
218
219 if (!vha->flags.online)
220 goto done;
221
222 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
223 if (!sp)
224 goto done;
225
226 fcport->flags |= FCF_ASYNC_SENT;
227 fcport->logout_completed = 0;
228
229 fcport->disc_state = DSC_LOGIN_PEND;
230 sp->type = SRB_LOGIN_CMD;
231 sp->name = "login";
232 sp->gen1 = fcport->rscn_gen;
233 sp->gen2 = fcport->login_gen;
234
235 lio = &sp->u.iocb_cmd;
236 lio->timeout = qla2x00_async_iocb_timeout;
237 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
238
239 sp->done = qla2x00_async_login_sp_done;
240 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport))
241 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
242 else
243 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
244
245 if (fcport->fc4f_nvme)
246 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
247
248 ql_dbg(ql_dbg_disc, vha, 0x2072,
249 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
250 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
251 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
252 fcport->login_retry);
253
254 rval = qla2x00_start_sp(sp);
255 if (rval != QLA_SUCCESS) {
256 fcport->flags |= FCF_LOGIN_NEEDED;
257 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
258 goto done_free_sp;
259 }
260
261 return rval;
262
263done_free_sp:
264 sp->free(sp);
265 fcport->flags &= ~FCF_ASYNC_SENT;
266done:
267 fcport->flags &= ~FCF_ASYNC_ACTIVE;
268 return rval;
269}
270
271static void
272qla2x00_async_logout_sp_done(void *ptr, int res)
273{
274 srb_t *sp = ptr;
275
276 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
277 sp->fcport->login_gen++;
278 qlt_logo_completion_handler(sp->fcport, res);
279 sp->free(sp);
280}
281
282int
283qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
284{
285 srb_t *sp;
286 struct srb_iocb *lio;
287 int rval = QLA_FUNCTION_FAILED;
288
289 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
290 return rval;
291
292 fcport->flags |= FCF_ASYNC_SENT;
293 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
294 if (!sp)
295 goto done;
296
297 sp->type = SRB_LOGOUT_CMD;
298 sp->name = "logout";
299
300 lio = &sp->u.iocb_cmd;
301 lio->timeout = qla2x00_async_iocb_timeout;
302 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
303
304 sp->done = qla2x00_async_logout_sp_done;
305
306 ql_dbg(ql_dbg_disc, vha, 0x2070,
307 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
308 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
309 fcport->d_id.b.area, fcport->d_id.b.al_pa,
310 fcport->port_name);
311
312 rval = qla2x00_start_sp(sp);
313 if (rval != QLA_SUCCESS)
314 goto done_free_sp;
315 return rval;
316
317done_free_sp:
318 sp->free(sp);
319done:
320 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
321 return rval;
322}
323
324void
325qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
326 uint16_t *data)
327{
328 fcport->flags &= ~FCF_ASYNC_ACTIVE;
329
330 if (!fcport->tgt_session)
331 qla2x00_mark_device_lost(vha, fcport, 1, 0);
332 qlt_logo_completion_handler(fcport, data[0]);
333}
334
335static void
336qla2x00_async_prlo_sp_done(void *s, int res)
337{
338 srb_t *sp = (srb_t *)s;
339 struct srb_iocb *lio = &sp->u.iocb_cmd;
340 struct scsi_qla_host *vha = sp->vha;
341
342 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
343 if (!test_bit(UNLOADING, &vha->dpc_flags))
344 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
345 lio->u.logio.data);
346 sp->free(sp);
347}
348
349int
350qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
351{
352 srb_t *sp;
353 struct srb_iocb *lio;
354 int rval;
355
356 rval = QLA_FUNCTION_FAILED;
357 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
358 if (!sp)
359 goto done;
360
361 sp->type = SRB_PRLO_CMD;
362 sp->name = "prlo";
363
364 lio = &sp->u.iocb_cmd;
365 lio->timeout = qla2x00_async_iocb_timeout;
366 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
367
368 sp->done = qla2x00_async_prlo_sp_done;
369 rval = qla2x00_start_sp(sp);
370 if (rval != QLA_SUCCESS)
371 goto done_free_sp;
372
373 ql_dbg(ql_dbg_disc, vha, 0x2070,
374 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
375 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
376 fcport->d_id.b.area, fcport->d_id.b.al_pa);
377 return rval;
378
379done_free_sp:
380 sp->free(sp);
381done:
382 fcport->flags &= ~FCF_ASYNC_ACTIVE;
383 return rval;
384}
385
386static
387void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
388{
389 struct fc_port *fcport = ea->fcport;
390
391 ql_dbg(ql_dbg_disc, vha, 0x20d2,
392 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
393 __func__, fcport->port_name, fcport->disc_state,
394 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
395 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
396
397 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
398 ql_dbg(ql_dbg_disc, vha, 0x2066,
399 "%s %8phC: adisc fail: post delete\n",
400 __func__, ea->fcport->port_name);
401
402 fcport->deleted = 0;
403 fcport->logout_on_delete = 1;
404 qlt_schedule_sess_for_deletion(ea->fcport);
405 return;
406 }
407
408 if (ea->fcport->disc_state == DSC_DELETE_PEND)
409 return;
410
411 if (ea->sp->gen2 != ea->fcport->login_gen) {
412
413 ql_dbg(ql_dbg_disc, vha, 0x20d3,
414 "%s %8phC generation changed\n",
415 __func__, ea->fcport->port_name);
416 return;
417 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
418 qla_rscn_replay(fcport);
419 qlt_schedule_sess_for_deletion(fcport);
420 return;
421 }
422
423 __qla24xx_handle_gpdb_event(vha, ea);
424}
425
426static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
427{
428 struct qla_work_evt *e;
429
430 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
431 if (!e)
432 return QLA_FUNCTION_FAILED;
433
434 e->u.fcport.fcport = fcport;
435 fcport->flags |= FCF_ASYNC_ACTIVE;
436 return qla2x00_post_work(vha, e);
437}
438
439static void
440qla2x00_async_adisc_sp_done(void *ptr, int res)
441{
442 srb_t *sp = ptr;
443 struct scsi_qla_host *vha = sp->vha;
444 struct event_arg ea;
445 struct srb_iocb *lio = &sp->u.iocb_cmd;
446
447 ql_dbg(ql_dbg_disc, vha, 0x2066,
448 "Async done-%s res %x %8phC\n",
449 sp->name, res, sp->fcport->port_name);
450
451 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
452
453 memset(&ea, 0, sizeof(ea));
454 ea.event = FCME_ADISC_DONE;
455 ea.rc = res;
456 ea.data[0] = lio->u.logio.data[0];
457 ea.data[1] = lio->u.logio.data[1];
458 ea.iop[0] = lio->u.logio.iop[0];
459 ea.iop[1] = lio->u.logio.iop[1];
460 ea.fcport = sp->fcport;
461 ea.sp = sp;
462
463 qla2x00_fcport_event_handler(vha, &ea);
464
465 sp->free(sp);
466}
467
468int
469qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
470 uint16_t *data)
471{
472 srb_t *sp;
473 struct srb_iocb *lio;
474 int rval;
475
476 rval = QLA_FUNCTION_FAILED;
477 fcport->flags |= FCF_ASYNC_SENT;
478 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
479 if (!sp)
480 goto done;
481
482 sp->type = SRB_ADISC_CMD;
483 sp->name = "adisc";
484
485 lio = &sp->u.iocb_cmd;
486 lio->timeout = qla2x00_async_iocb_timeout;
487 sp->gen1 = fcport->rscn_gen;
488 sp->gen2 = fcport->login_gen;
489 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
490
491 sp->done = qla2x00_async_adisc_sp_done;
492 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
493 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
494
495 ql_dbg(ql_dbg_disc, vha, 0x206f,
496 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
497 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
498
499 rval = qla2x00_start_sp(sp);
500 if (rval != QLA_SUCCESS)
501 goto done_free_sp;
502
503 return rval;
504
505done_free_sp:
506 sp->free(sp);
507done:
508 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
509 qla2x00_post_async_adisc_work(vha, fcport, data);
510 return rval;
511}
512
513static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
514 struct event_arg *ea)
515{
516 fc_port_t *fcport, *conflict_fcport;
517 struct get_name_list_extended *e;
518 u16 i, n, found = 0, loop_id;
519 port_id_t id;
520 u64 wwn;
521 u16 data[2];
522 u8 current_login_state;
523
524 fcport = ea->fcport;
525 ql_dbg(ql_dbg_disc, vha, 0xffff,
526 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
527 __func__, fcport->port_name, fcport->disc_state,
528 fcport->fw_login_state, ea->rc,
529 fcport->login_gen, fcport->last_login_gen,
530 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
531
532 if (fcport->disc_state == DSC_DELETE_PEND)
533 return;
534
535 if (ea->rc) {
536 if (fcport->login_retry == 0) {
537 ql_dbg(ql_dbg_disc, vha, 0x20de,
538 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
539 fcport->port_name, fcport->login_retry);
540 }
541 return;
542 }
543
544 if (fcport->last_rscn_gen != fcport->rscn_gen) {
545 qla_rscn_replay(fcport);
546 qlt_schedule_sess_for_deletion(fcport);
547 return;
548 } else if (fcport->last_login_gen != fcport->login_gen) {
549 ql_dbg(ql_dbg_disc, vha, 0x20e0,
550 "%s %8phC login gen changed\n",
551 __func__, fcport->port_name);
552 return;
553 }
554
555 n = ea->data[0] / sizeof(struct get_name_list_extended);
556
557 ql_dbg(ql_dbg_disc, vha, 0x20e1,
558 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
559 __func__, __LINE__, fcport->port_name, n,
560 fcport->d_id.b.domain, fcport->d_id.b.area,
561 fcport->d_id.b.al_pa, fcport->loop_id);
562
563 for (i = 0; i < n; i++) {
564 e = &vha->gnl.l[i];
565 wwn = wwn_to_u64(e->port_name);
566 id.b.domain = e->port_id[2];
567 id.b.area = e->port_id[1];
568 id.b.al_pa = e->port_id[0];
569 id.b.rsvd_1 = 0;
570
571 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
572 continue;
573
574 if (IS_SW_RESV_ADDR(id))
575 continue;
576
577 found = 1;
578
579 loop_id = le16_to_cpu(e->nport_handle);
580 loop_id = (loop_id & 0x7fff);
581 if (fcport->fc4f_nvme)
582 current_login_state = e->current_login_state >> 4;
583 else
584 current_login_state = e->current_login_state & 0xf;
585
586
587 ql_dbg(ql_dbg_disc, vha, 0x20e2,
588 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n",
589 __func__, fcport->port_name,
590 e->current_login_state, fcport->fw_login_state,
591 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa,
592 fcport->d_id.b.domain, fcport->d_id.b.area,
593 fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
594
595 switch (fcport->disc_state) {
596 case DSC_DELETE_PEND:
597 case DSC_DELETED:
598 break;
599 default:
600 if ((id.b24 != fcport->d_id.b24 &&
601 fcport->d_id.b24) ||
602 (fcport->loop_id != FC_NO_LOOP_ID &&
603 fcport->loop_id != loop_id)) {
604 ql_dbg(ql_dbg_disc, vha, 0x20e3,
605 "%s %d %8phC post del sess\n",
606 __func__, __LINE__, fcport->port_name);
607 qlt_schedule_sess_for_deletion(fcport);
608 return;
609 }
610 break;
611 }
612
613 fcport->loop_id = loop_id;
614
615 wwn = wwn_to_u64(fcport->port_name);
616 qlt_find_sess_invalidate_other(vha, wwn,
617 id, loop_id, &conflict_fcport);
618
619 if (conflict_fcport) {
620
621
622
623
624
625 conflict_fcport->conflict = fcport;
626 fcport->login_pause = 1;
627 }
628
629 switch (vha->hw->current_topology) {
630 default:
631 switch (current_login_state) {
632 case DSC_LS_PRLI_COMP:
633 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
634 vha, 0x20e4, "%s %d %8phC post gpdb\n",
635 __func__, __LINE__, fcport->port_name);
636
637 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
638 fcport->port_type = FCT_INITIATOR;
639 else
640 fcport->port_type = FCT_TARGET;
641 data[0] = data[1] = 0;
642 qla2x00_post_async_adisc_work(vha, fcport,
643 data);
644 break;
645 case DSC_LS_PORT_UNAVAIL:
646 default:
647 if (fcport->loop_id != FC_NO_LOOP_ID)
648 qla2x00_clear_loop_id(fcport);
649
650 fcport->loop_id = loop_id;
651 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
652 qla24xx_fcport_handle_login(vha, fcport);
653 break;
654 }
655 break;
656 case ISP_CFG_N:
657 fcport->fw_login_state = current_login_state;
658 fcport->d_id = id;
659 switch (current_login_state) {
660 case DSC_LS_PRLI_COMP:
661 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
662 fcport->port_type = FCT_INITIATOR;
663 else
664 fcport->port_type = FCT_TARGET;
665
666 data[0] = data[1] = 0;
667 qla2x00_post_async_adisc_work(vha, fcport,
668 data);
669 break;
670 case DSC_LS_PLOGI_COMP:
671 if (fcport_is_bigger(fcport)) {
672
673 if (fcport->loop_id != FC_NO_LOOP_ID)
674 qla2x00_clear_loop_id(fcport);
675
676 fcport->loop_id = loop_id;
677 qla24xx_fcport_handle_login(vha,
678 fcport);
679 break;
680 }
681
682 default:
683 if (fcport_is_smaller(fcport)) {
684
685 if (fcport->loop_id != FC_NO_LOOP_ID)
686 qla2x00_clear_loop_id(fcport);
687
688 fcport->loop_id = loop_id;
689 qla24xx_fcport_handle_login(vha,
690 fcport);
691 }
692 break;
693 }
694 break;
695 }
696 }
697
698 if (!found) {
699 switch (vha->hw->current_topology) {
700 case ISP_CFG_F:
701 case ISP_CFG_FL:
702 for (i = 0; i < n; i++) {
703 e = &vha->gnl.l[i];
704 id.b.domain = e->port_id[0];
705 id.b.area = e->port_id[1];
706 id.b.al_pa = e->port_id[2];
707 id.b.rsvd_1 = 0;
708 loop_id = le16_to_cpu(e->nport_handle);
709
710 if (fcport->d_id.b24 == id.b24) {
711 conflict_fcport =
712 qla2x00_find_fcport_by_wwpn(vha,
713 e->port_name, 0);
714 if (conflict_fcport) {
715 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
716 vha, 0x20e5,
717 "%s %d %8phC post del sess\n",
718 __func__, __LINE__,
719 conflict_fcport->port_name);
720 qlt_schedule_sess_for_deletion
721 (conflict_fcport);
722 }
723 }
724
725
726
727
728 if (fcport->loop_id == loop_id)
729 fcport->loop_id = FC_NO_LOOP_ID;
730 }
731 qla24xx_fcport_handle_login(vha, fcport);
732 break;
733 case ISP_CFG_N:
734 fcport->disc_state = DSC_DELETED;
735 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
736 if (fcport->n2n_link_reset_cnt < 2) {
737 fcport->n2n_link_reset_cnt++;
738
739
740
741
742
743 set_bit(N2N_LINK_RESET,
744 &vha->dpc_flags);
745 } else {
746 if (fcport->n2n_chip_reset < 1) {
747 ql_log(ql_log_info, vha, 0x705d,
748 "Chip reset to bring laser down");
749 set_bit(ISP_ABORT_NEEDED,
750 &vha->dpc_flags);
751 fcport->n2n_chip_reset++;
752 } else {
753 ql_log(ql_log_info, vha, 0x705d,
754 "Remote port %8ph is not coming back\n",
755 fcport->port_name);
756 fcport->scan_state = 0;
757 }
758 }
759 qla2xxx_wake_dpc(vha);
760 } else {
761
762
763
764
765 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
766 }
767 break;
768 default:
769 break;
770 }
771 }
772}
773
774static void
775qla24xx_async_gnl_sp_done(void *s, int res)
776{
777 struct srb *sp = s;
778 struct scsi_qla_host *vha = sp->vha;
779 unsigned long flags;
780 struct fc_port *fcport = NULL, *tf;
781 u16 i, n = 0, loop_id;
782 struct event_arg ea;
783 struct get_name_list_extended *e;
784 u64 wwn;
785 struct list_head h;
786 bool found = false;
787
788 ql_dbg(ql_dbg_disc, vha, 0x20e7,
789 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
790 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
791 sp->u.iocb_cmd.u.mbx.in_mb[2]);
792
793 if (res == QLA_FUNCTION_TIMEOUT)
794 return;
795
796 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
797 memset(&ea, 0, sizeof(ea));
798 ea.sp = sp;
799 ea.rc = res;
800 ea.event = FCME_GNL_DONE;
801
802 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
803 sizeof(struct get_name_list_extended)) {
804 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
805 sizeof(struct get_name_list_extended);
806 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1];
807 }
808
809 for (i = 0; i < n; i++) {
810 e = &vha->gnl.l[i];
811 loop_id = le16_to_cpu(e->nport_handle);
812
813 loop_id = (loop_id & 0x7fff);
814 set_bit(loop_id, vha->hw->loop_id_map);
815 wwn = wwn_to_u64(e->port_name);
816
817 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8,
818 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n",
819 __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
820 e->port_id[0], e->current_login_state, e->last_login_state,
821 (loop_id & 0x7fff));
822 }
823
824 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
825
826 INIT_LIST_HEAD(&h);
827 fcport = tf = NULL;
828 if (!list_empty(&vha->gnl.fcports))
829 list_splice_init(&vha->gnl.fcports, &h);
830 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
831
832 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
833 list_del_init(&fcport->gnl_entry);
834 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
835 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
836 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
837 ea.fcport = fcport;
838
839 qla2x00_fcport_event_handler(vha, &ea);
840 }
841
842
843 for (i = 0; i < n; i++) {
844 port_id_t id;
845 u64 wwnn;
846
847 e = &vha->gnl.l[i];
848 wwn = wwn_to_u64(e->port_name);
849
850 found = false;
851 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
852 if (!memcmp((u8 *)&wwn, fcport->port_name,
853 WWN_SIZE)) {
854 found = true;
855 break;
856 }
857 }
858
859 id.b.domain = e->port_id[2];
860 id.b.area = e->port_id[1];
861 id.b.al_pa = e->port_id[0];
862 id.b.rsvd_1 = 0;
863
864 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
865 ql_dbg(ql_dbg_disc, vha, 0x2065,
866 "%s %d %8phC %06x post new sess\n",
867 __func__, __LINE__, (u8 *)&wwn, id.b24);
868 wwnn = wwn_to_u64(e->node_name);
869 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
870 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN);
871 }
872 }
873
874 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
875 vha->gnl.sent = 0;
876 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
877
878 sp->free(sp);
879}
880
881int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
882{
883 srb_t *sp;
884 struct srb_iocb *mbx;
885 int rval = QLA_FUNCTION_FAILED;
886 unsigned long flags;
887 u16 *mb;
888
889 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
890 return rval;
891
892 ql_dbg(ql_dbg_disc, vha, 0x20d9,
893 "Async-gnlist WWPN %8phC \n", fcport->port_name);
894
895 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
896 fcport->flags |= FCF_ASYNC_SENT;
897 fcport->disc_state = DSC_GNL;
898 fcport->last_rscn_gen = fcport->rscn_gen;
899 fcport->last_login_gen = fcport->login_gen;
900
901 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
902 if (vha->gnl.sent) {
903 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
904 return QLA_SUCCESS;
905 }
906 vha->gnl.sent = 1;
907 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
908
909 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
910 if (!sp)
911 goto done;
912
913 sp->type = SRB_MB_IOCB;
914 sp->name = "gnlist";
915 sp->gen1 = fcport->rscn_gen;
916 sp->gen2 = fcport->login_gen;
917
918 mbx = &sp->u.iocb_cmd;
919 mbx->timeout = qla2x00_async_iocb_timeout;
920 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
921
922 mb = sp->u.iocb_cmd.u.mbx.out_mb;
923 mb[0] = MBC_PORT_NODE_NAME_LIST;
924 mb[1] = BIT_2 | BIT_3;
925 mb[2] = MSW(vha->gnl.ldma);
926 mb[3] = LSW(vha->gnl.ldma);
927 mb[6] = MSW(MSD(vha->gnl.ldma));
928 mb[7] = LSW(MSD(vha->gnl.ldma));
929 mb[8] = vha->gnl.size;
930 mb[9] = vha->vp_idx;
931
932 sp->done = qla24xx_async_gnl_sp_done;
933
934 rval = qla2x00_start_sp(sp);
935 if (rval != QLA_SUCCESS)
936 goto done_free_sp;
937
938 ql_dbg(ql_dbg_disc, vha, 0x20da,
939 "Async-%s - OUT WWPN %8phC hndl %x\n",
940 sp->name, fcport->port_name, sp->handle);
941
942 return rval;
943
944done_free_sp:
945 sp->free(sp);
946 fcport->flags &= ~FCF_ASYNC_SENT;
947done:
948 return rval;
949}
950
951int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
952{
953 struct qla_work_evt *e;
954
955 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
956 if (!e)
957 return QLA_FUNCTION_FAILED;
958
959 e->u.fcport.fcport = fcport;
960 fcport->flags |= FCF_ASYNC_ACTIVE;
961 return qla2x00_post_work(vha, e);
962}
963
964static
965void qla24xx_async_gpdb_sp_done(void *s, int res)
966{
967 struct srb *sp = s;
968 struct scsi_qla_host *vha = sp->vha;
969 struct qla_hw_data *ha = vha->hw;
970 fc_port_t *fcport = sp->fcport;
971 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
972 struct event_arg ea;
973
974 ql_dbg(ql_dbg_disc, vha, 0x20db,
975 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
976 sp->name, res, fcport->port_name, mb[1], mb[2]);
977
978 if (res == QLA_FUNCTION_TIMEOUT) {
979 dma_pool_free(sp->vha->hw->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
980 sp->u.iocb_cmd.u.mbx.in_dma);
981 return;
982 }
983
984 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
985 memset(&ea, 0, sizeof(ea));
986 ea.event = FCME_GPDB_DONE;
987 ea.fcport = fcport;
988 ea.sp = sp;
989
990 qla2x00_fcport_event_handler(vha, &ea);
991
992 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
993 sp->u.iocb_cmd.u.mbx.in_dma);
994
995 sp->free(sp);
996}
997
998static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
999{
1000 struct qla_work_evt *e;
1001
1002 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1003 if (!e)
1004 return QLA_FUNCTION_FAILED;
1005
1006 e->u.fcport.fcport = fcport;
1007
1008 return qla2x00_post_work(vha, e);
1009}
1010
1011static void
1012qla2x00_async_prli_sp_done(void *ptr, int res)
1013{
1014 srb_t *sp = ptr;
1015 struct scsi_qla_host *vha = sp->vha;
1016 struct srb_iocb *lio = &sp->u.iocb_cmd;
1017 struct event_arg ea;
1018
1019 ql_dbg(ql_dbg_disc, vha, 0x2129,
1020 "%s %8phC res %d \n", __func__,
1021 sp->fcport->port_name, res);
1022
1023 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1024
1025 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1026 memset(&ea, 0, sizeof(ea));
1027 ea.event = FCME_PRLI_DONE;
1028 ea.fcport = sp->fcport;
1029 ea.data[0] = lio->u.logio.data[0];
1030 ea.data[1] = lio->u.logio.data[1];
1031 ea.iop[0] = lio->u.logio.iop[0];
1032 ea.iop[1] = lio->u.logio.iop[1];
1033 ea.sp = sp;
1034
1035 qla2x00_fcport_event_handler(vha, &ea);
1036 }
1037
1038 sp->free(sp);
1039}
1040
1041int
1042qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1043{
1044 srb_t *sp;
1045 struct srb_iocb *lio;
1046 int rval = QLA_FUNCTION_FAILED;
1047
1048 if (!vha->flags.online)
1049 return rval;
1050
1051 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1052 fcport->fw_login_state == DSC_LS_PRLI_PEND)
1053 return rval;
1054
1055 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1056 if (!sp)
1057 return rval;
1058
1059 fcport->flags |= FCF_ASYNC_SENT;
1060 fcport->logout_completed = 0;
1061
1062 sp->type = SRB_PRLI_CMD;
1063 sp->name = "prli";
1064
1065 lio = &sp->u.iocb_cmd;
1066 lio->timeout = qla2x00_async_iocb_timeout;
1067 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1068
1069 sp->done = qla2x00_async_prli_sp_done;
1070 lio->u.logio.flags = 0;
1071
1072 if (fcport->fc4f_nvme)
1073 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1074
1075 rval = qla2x00_start_sp(sp);
1076 if (rval != QLA_SUCCESS) {
1077 fcport->flags |= FCF_LOGIN_NEEDED;
1078 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1079 goto done_free_sp;
1080 }
1081
1082 ql_dbg(ql_dbg_disc, vha, 0x211b,
1083 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
1084 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1085 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc");
1086
1087 return rval;
1088
1089done_free_sp:
1090 sp->free(sp);
1091 fcport->flags &= ~FCF_ASYNC_SENT;
1092 return rval;
1093}
1094
1095int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1096{
1097 struct qla_work_evt *e;
1098
1099 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1100 if (!e)
1101 return QLA_FUNCTION_FAILED;
1102
1103 e->u.fcport.fcport = fcport;
1104 e->u.fcport.opt = opt;
1105 fcport->flags |= FCF_ASYNC_ACTIVE;
1106 return qla2x00_post_work(vha, e);
1107}
1108
1109int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1110{
1111 srb_t *sp;
1112 struct srb_iocb *mbx;
1113 int rval = QLA_FUNCTION_FAILED;
1114 u16 *mb;
1115 dma_addr_t pd_dma;
1116 struct port_database_24xx *pd;
1117 struct qla_hw_data *ha = vha->hw;
1118
1119 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1120 return rval;
1121
1122 fcport->disc_state = DSC_GPDB;
1123
1124 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1125 if (!sp)
1126 goto done;
1127
1128 fcport->flags |= FCF_ASYNC_SENT;
1129 sp->type = SRB_MB_IOCB;
1130 sp->name = "gpdb";
1131 sp->gen1 = fcport->rscn_gen;
1132 sp->gen2 = fcport->login_gen;
1133
1134 mbx = &sp->u.iocb_cmd;
1135 mbx->timeout = qla2x00_async_iocb_timeout;
1136 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1137
1138 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1139 if (pd == NULL) {
1140 ql_log(ql_log_warn, vha, 0xd043,
1141 "Failed to allocate port database structure.\n");
1142 goto done_free_sp;
1143 }
1144
1145 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1146 mb[0] = MBC_GET_PORT_DATABASE;
1147 mb[1] = fcport->loop_id;
1148 mb[2] = MSW(pd_dma);
1149 mb[3] = LSW(pd_dma);
1150 mb[6] = MSW(MSD(pd_dma));
1151 mb[7] = LSW(MSD(pd_dma));
1152 mb[9] = vha->vp_idx;
1153 mb[10] = opt;
1154
1155 mbx->u.mbx.in = (void *)pd;
1156 mbx->u.mbx.in_dma = pd_dma;
1157
1158 sp->done = qla24xx_async_gpdb_sp_done;
1159
1160 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1161 "Async-%s %8phC hndl %x opt %x\n",
1162 sp->name, fcport->port_name, sp->handle, opt);
1163
1164 rval = qla2x00_start_sp(sp);
1165 if (rval != QLA_SUCCESS)
1166 goto done_free_sp;
1167 return rval;
1168
1169done_free_sp:
1170 if (pd)
1171 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1172
1173 sp->free(sp);
1174 fcport->flags &= ~FCF_ASYNC_SENT;
1175done:
1176 qla24xx_post_gpdb_work(vha, fcport, opt);
1177 return rval;
1178}
1179
1180static
1181void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1182{
1183 unsigned long flags;
1184
1185 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1186 ea->fcport->login_gen++;
1187 ea->fcport->deleted = 0;
1188 ea->fcport->logout_on_delete = 1;
1189
1190 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1191 vha->fcport_count++;
1192 ea->fcport->login_succ = 1;
1193
1194 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1195 qla24xx_sched_upd_fcport(ea->fcport);
1196 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1197 } else if (ea->fcport->login_succ) {
1198
1199
1200
1201
1202
1203 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1204 "%s %d %8phC session revalidate success\n",
1205 __func__, __LINE__, ea->fcport->port_name);
1206 ea->fcport->disc_state = DSC_LOGIN_COMPLETE;
1207 }
1208 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1209}
1210
1211static
1212void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1213{
1214 fc_port_t *fcport = ea->fcport;
1215 struct port_database_24xx *pd;
1216 struct srb *sp = ea->sp;
1217 uint8_t ls;
1218
1219 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1220
1221 fcport->flags &= ~FCF_ASYNC_SENT;
1222
1223 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1224 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name,
1225 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme,
1226 ea->rc);
1227
1228 if (fcport->disc_state == DSC_DELETE_PEND)
1229 return;
1230
1231 if (fcport->fc4f_nvme)
1232 ls = pd->current_login_state >> 4;
1233 else
1234 ls = pd->current_login_state & 0xf;
1235
1236 if (ea->sp->gen2 != fcport->login_gen) {
1237
1238
1239 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1240 "%s %8phC generation changed\n",
1241 __func__, fcport->port_name);
1242 return;
1243 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1244 qla_rscn_replay(fcport);
1245 qlt_schedule_sess_for_deletion(fcport);
1246 return;
1247 }
1248
1249 switch (ls) {
1250 case PDS_PRLI_COMPLETE:
1251 __qla24xx_parse_gpdb(vha, fcport, pd);
1252 break;
1253 case PDS_PLOGI_PENDING:
1254 case PDS_PLOGI_COMPLETE:
1255 case PDS_PRLI_PENDING:
1256 case PDS_PRLI2_PENDING:
1257
1258 if (qla_dual_mode_enabled(vha) ||
1259 qla_ini_mode_enabled(vha)) {
1260 fcport->disc_state = DSC_GNL;
1261 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1262 }
1263 return;
1264 case PDS_LOGO_PENDING:
1265 case PDS_PORT_UNAVAILABLE:
1266 default:
1267 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1268 __func__, __LINE__, fcport->port_name);
1269 qlt_schedule_sess_for_deletion(fcport);
1270 return;
1271 }
1272 __qla24xx_handle_gpdb_event(vha, ea);
1273}
1274
1275static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1276{
1277 u8 login = 0;
1278 int rc;
1279
1280 if (qla_tgt_mode_enabled(vha))
1281 return;
1282
1283 if (qla_dual_mode_enabled(vha)) {
1284 if (N2N_TOPO(vha->hw)) {
1285 u64 mywwn, wwn;
1286
1287 mywwn = wwn_to_u64(vha->port_name);
1288 wwn = wwn_to_u64(fcport->port_name);
1289 if (mywwn > wwn)
1290 login = 1;
1291 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1292 && time_after_eq(jiffies,
1293 fcport->plogi_nack_done_deadline))
1294 login = 1;
1295 } else {
1296 login = 1;
1297 }
1298 } else {
1299
1300 login = 1;
1301 }
1302
1303 if (login && fcport->login_retry) {
1304 fcport->login_retry--;
1305 if (fcport->loop_id == FC_NO_LOOP_ID) {
1306 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1307 rc = qla2x00_find_new_loop_id(vha, fcport);
1308 if (rc) {
1309 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1310 "%s %d %8phC post del sess - out of loopid\n",
1311 __func__, __LINE__, fcport->port_name);
1312 fcport->scan_state = 0;
1313 qlt_schedule_sess_for_deletion(fcport);
1314 return;
1315 }
1316 }
1317 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1318 "%s %d %8phC post login\n",
1319 __func__, __LINE__, fcport->port_name);
1320 qla2x00_post_async_login_work(vha, fcport, NULL);
1321 }
1322}
1323
1324int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1325{
1326 u16 data[2];
1327 u64 wwn;
1328 u16 sec;
1329
1330 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20d8,
1331 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n",
1332 __func__, fcport->port_name, fcport->disc_state,
1333 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1334 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1335 fcport->login_gen, fcport->loop_id, fcport->scan_state);
1336
1337 if (fcport->scan_state != QLA_FCPORT_FOUND)
1338 return 0;
1339
1340 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1341 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1342 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1343 return 0;
1344
1345 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1346 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1347 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1348 return 0;
1349 }
1350 }
1351
1352
1353 if (vha->host->active_mode == MODE_TARGET)
1354 return 0;
1355
1356 if (fcport->flags & FCF_ASYNC_SENT) {
1357 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1358 return 0;
1359 }
1360
1361 switch (fcport->disc_state) {
1362 case DSC_DELETED:
1363 wwn = wwn_to_u64(fcport->node_name);
1364 switch (vha->hw->current_topology) {
1365 case ISP_CFG_N:
1366 if (fcport_is_smaller(fcport)) {
1367
1368 if (fcport->login_retry) {
1369 if (fcport->loop_id == FC_NO_LOOP_ID) {
1370 qla2x00_find_new_loop_id(vha,
1371 fcport);
1372 fcport->fw_login_state =
1373 DSC_LS_PORT_UNAVAIL;
1374 }
1375 fcport->login_retry--;
1376 qla_post_els_plogi_work(vha, fcport);
1377 } else {
1378 ql_log(ql_log_info, vha, 0x705d,
1379 "Unable to reach remote port %8phC",
1380 fcport->port_name);
1381 }
1382 } else {
1383 qla24xx_post_gnl_work(vha, fcport);
1384 }
1385 break;
1386 default:
1387 if (wwn == 0) {
1388 ql_dbg(ql_dbg_disc, vha, 0xffff,
1389 "%s %d %8phC post GNNID\n",
1390 __func__, __LINE__, fcport->port_name);
1391 qla24xx_post_gnnid_work(vha, fcport);
1392 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1393 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1394 "%s %d %8phC post gnl\n",
1395 __func__, __LINE__, fcport->port_name);
1396 qla24xx_post_gnl_work(vha, fcport);
1397 } else {
1398 qla_chk_n2n_b4_login(vha, fcport);
1399 }
1400 break;
1401 }
1402 break;
1403
1404 case DSC_GNL:
1405 switch (vha->hw->current_topology) {
1406 case ISP_CFG_N:
1407 if ((fcport->current_login_state & 0xf) == 0x6) {
1408 ql_dbg(ql_dbg_disc, vha, 0x2118,
1409 "%s %d %8phC post GPDB work\n",
1410 __func__, __LINE__, fcport->port_name);
1411 fcport->chip_reset =
1412 vha->hw->base_qpair->chip_reset;
1413 qla24xx_post_gpdb_work(vha, fcport, 0);
1414 } else {
1415 ql_dbg(ql_dbg_disc, vha, 0x2118,
1416 "%s %d %8phC post NVMe PRLI\n",
1417 __func__, __LINE__, fcport->port_name);
1418 qla24xx_post_prli_work(vha, fcport);
1419 }
1420 break;
1421 default:
1422 if (fcport->login_pause) {
1423 fcport->last_rscn_gen = fcport->rscn_gen;
1424 fcport->last_login_gen = fcport->login_gen;
1425 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1426 break;
1427 }
1428 qla_chk_n2n_b4_login(vha, fcport);
1429 break;
1430 }
1431 break;
1432
1433 case DSC_LOGIN_FAILED:
1434 if (N2N_TOPO(vha->hw))
1435 qla_chk_n2n_b4_login(vha, fcport);
1436 else
1437 qlt_schedule_sess_for_deletion(fcport);
1438 break;
1439
1440 case DSC_LOGIN_COMPLETE:
1441
1442 data[0] = data[1] = 0;
1443 qla2x00_post_async_adisc_work(vha, fcport, data);
1444 break;
1445
1446 case DSC_LOGIN_PEND:
1447 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1448 qla24xx_post_prli_work(vha, fcport);
1449 break;
1450
1451 case DSC_UPD_FCPORT:
1452 sec = jiffies_to_msecs(jiffies -
1453 fcport->jiffies_at_registration)/1000;
1454 if (fcport->sec_since_registration < sec && sec &&
1455 !(sec % 60)) {
1456 fcport->sec_since_registration = sec;
1457 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1458 "%s %8phC - Slow Rport registration(%d Sec)\n",
1459 __func__, fcport->port_name, sec);
1460 }
1461
1462 if (fcport->next_disc_state != DSC_DELETE_PEND)
1463 fcport->next_disc_state = DSC_ADISC;
1464 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1465 break;
1466
1467 default:
1468 break;
1469 }
1470
1471 return 0;
1472}
1473
1474int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1475 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1476{
1477 struct qla_work_evt *e;
1478 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1479 if (!e)
1480 return QLA_FUNCTION_FAILED;
1481
1482 e->u.new_sess.id = *id;
1483 e->u.new_sess.pla = pla;
1484 e->u.new_sess.fc4_type = fc4_type;
1485 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1486 if (node_name)
1487 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1488
1489 return qla2x00_post_work(vha, e);
1490}
1491
1492static
1493void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1494 struct event_arg *ea)
1495{
1496 fc_port_t *fcport = ea->fcport;
1497
1498 ql_dbg(ql_dbg_disc, vha, 0x2102,
1499 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1500 __func__, fcport->port_name, fcport->disc_state,
1501 fcport->fw_login_state, fcport->login_pause,
1502 fcport->deleted, fcport->conflict,
1503 fcport->last_rscn_gen, fcport->rscn_gen,
1504 fcport->last_login_gen, fcport->login_gen,
1505 fcport->flags);
1506
1507 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1508 (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1509 return;
1510
1511 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1512 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1513 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1514 return;
1515 }
1516 }
1517
1518 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1519 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n",
1520 __func__, __LINE__, fcport->port_name);
1521
1522 return;
1523 }
1524
1525 qla24xx_fcport_handle_login(vha, fcport);
1526}
1527
1528
1529static void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1530 struct event_arg *ea)
1531{
1532 ql_dbg(ql_dbg_disc, vha, 0x2118,
1533 "%s %d %8phC post PRLI\n",
1534 __func__, __LINE__, ea->fcport->port_name);
1535 qla24xx_post_prli_work(vha, ea->fcport);
1536}
1537
1538void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea)
1539{
1540 fc_port_t *fcport;
1541
1542 switch (ea->event) {
1543 case FCME_RELOGIN:
1544 if (test_bit(UNLOADING, &vha->dpc_flags))
1545 return;
1546
1547 qla24xx_handle_relogin_event(vha, ea);
1548 break;
1549 case FCME_RSCN:
1550 if (test_bit(UNLOADING, &vha->dpc_flags))
1551 return;
1552 {
1553 unsigned long flags;
1554 fcport = qla2x00_find_fcport_by_nportid
1555 (vha, &ea->id, 1);
1556 if (fcport) {
1557 fcport->scan_needed = 1;
1558 fcport->rscn_gen++;
1559 }
1560
1561 spin_lock_irqsave(&vha->work_lock, flags);
1562 if (vha->scan.scan_flags == 0) {
1563 ql_dbg(ql_dbg_disc, vha, 0xffff,
1564 "%s: schedule\n", __func__);
1565 vha->scan.scan_flags |= SF_QUEUED;
1566 schedule_delayed_work(&vha->scan.scan_work, 5);
1567 }
1568 spin_unlock_irqrestore(&vha->work_lock, flags);
1569 }
1570 break;
1571 case FCME_GNL_DONE:
1572 qla24xx_handle_gnl_done_event(vha, ea);
1573 break;
1574 case FCME_GPSC_DONE:
1575 qla24xx_handle_gpsc_event(vha, ea);
1576 break;
1577 case FCME_PLOGI_DONE:
1578 qla24xx_handle_plogi_done_event(vha, ea);
1579 break;
1580 case FCME_PRLI_DONE:
1581 qla24xx_handle_prli_done_event(vha, ea);
1582 break;
1583 case FCME_GPDB_DONE:
1584 qla24xx_handle_gpdb_event(vha, ea);
1585 break;
1586 case FCME_GPNID_DONE:
1587 qla24xx_handle_gpnid_event(vha, ea);
1588 break;
1589 case FCME_GFFID_DONE:
1590 qla24xx_handle_gffid_event(vha, ea);
1591 break;
1592 case FCME_ADISC_DONE:
1593 qla24xx_handle_adisc_event(vha, ea);
1594 break;
1595 case FCME_GNNID_DONE:
1596 qla24xx_handle_gnnid_event(vha, ea);
1597 break;
1598 case FCME_GFPNID_DONE:
1599 qla24xx_handle_gfpnid_event(vha, ea);
1600 break;
1601 case FCME_ELS_PLOGI_DONE:
1602 qla_handle_els_plogi_done(vha, ea);
1603 break;
1604 default:
1605 BUG_ON(1);
1606 break;
1607 }
1608}
1609
1610
1611
1612
1613
1614void qla_rscn_replay(fc_port_t *fcport)
1615{
1616 struct event_arg ea;
1617
1618 switch (fcport->disc_state) {
1619 case DSC_DELETE_PEND:
1620 return;
1621 default:
1622 break;
1623 }
1624
1625 if (fcport->scan_needed) {
1626 memset(&ea, 0, sizeof(ea));
1627 ea.event = FCME_RSCN;
1628 ea.id = fcport->d_id;
1629 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1630 qla2x00_fcport_event_handler(fcport->vha, &ea);
1631 }
1632}
1633
1634static void
1635qla2x00_tmf_iocb_timeout(void *data)
1636{
1637 srb_t *sp = data;
1638 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1639
1640 tmf->u.tmf.comp_status = CS_TIMEOUT;
1641 complete(&tmf->u.tmf.comp);
1642}
1643
1644static void
1645qla2x00_tmf_sp_done(void *ptr, int res)
1646{
1647 srb_t *sp = ptr;
1648 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1649
1650 complete(&tmf->u.tmf.comp);
1651}
1652
1653int
1654qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1655 uint32_t tag)
1656{
1657 struct scsi_qla_host *vha = fcport->vha;
1658 struct srb_iocb *tm_iocb;
1659 srb_t *sp;
1660 int rval = QLA_FUNCTION_FAILED;
1661
1662 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1663 if (!sp)
1664 goto done;
1665
1666 tm_iocb = &sp->u.iocb_cmd;
1667 sp->type = SRB_TM_CMD;
1668 sp->name = "tmf";
1669
1670 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1671 init_completion(&tm_iocb->u.tmf.comp);
1672 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1673
1674 tm_iocb->u.tmf.flags = flags;
1675 tm_iocb->u.tmf.lun = lun;
1676 tm_iocb->u.tmf.data = tag;
1677 sp->done = qla2x00_tmf_sp_done;
1678
1679 ql_dbg(ql_dbg_taskm, vha, 0x802f,
1680 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1681 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1682 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1683
1684 rval = qla2x00_start_sp(sp);
1685 if (rval != QLA_SUCCESS)
1686 goto done_free_sp;
1687 wait_for_completion(&tm_iocb->u.tmf.comp);
1688
1689 rval = tm_iocb->u.tmf.data;
1690
1691 if (rval != QLA_SUCCESS) {
1692 ql_log(ql_log_warn, vha, 0x8030,
1693 "TM IOCB failed (%x).\n", rval);
1694 }
1695
1696 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1697 flags = tm_iocb->u.tmf.flags;
1698 lun = (uint16_t)tm_iocb->u.tmf.lun;
1699
1700
1701 qla2x00_marker(vha, vha->hw->req_q_map[0],
1702 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
1703 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1704 }
1705
1706done_free_sp:
1707 sp->free(sp);
1708 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1709done:
1710 return rval;
1711}
1712
1713static void
1714qla24xx_abort_iocb_timeout(void *data)
1715{
1716 srb_t *sp = data;
1717 struct srb_iocb *abt = &sp->u.iocb_cmd;
1718
1719 abt->u.abt.comp_status = CS_TIMEOUT;
1720 sp->done(sp, QLA_FUNCTION_TIMEOUT);
1721}
1722
1723static void
1724qla24xx_abort_sp_done(void *ptr, int res)
1725{
1726 srb_t *sp = ptr;
1727 struct srb_iocb *abt = &sp->u.iocb_cmd;
1728
1729 if (del_timer(&sp->u.iocb_cmd.timer)) {
1730 if (sp->flags & SRB_WAKEUP_ON_COMP)
1731 complete(&abt->u.abt.comp);
1732 else
1733 sp->free(sp);
1734 }
1735}
1736
1737int
1738qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
1739{
1740 scsi_qla_host_t *vha = cmd_sp->vha;
1741 struct srb_iocb *abt_iocb;
1742 srb_t *sp;
1743 int rval = QLA_FUNCTION_FAILED;
1744
1745 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
1746 GFP_KERNEL);
1747 if (!sp)
1748 goto done;
1749
1750 abt_iocb = &sp->u.iocb_cmd;
1751 sp->type = SRB_ABT_CMD;
1752 sp->name = "abort";
1753 sp->qpair = cmd_sp->qpair;
1754 if (wait)
1755 sp->flags = SRB_WAKEUP_ON_COMP;
1756
1757 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
1758 init_completion(&abt_iocb->u.abt.comp);
1759
1760 qla2x00_init_timer(sp, 42);
1761
1762 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
1763 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
1764
1765 sp->done = qla24xx_abort_sp_done;
1766
1767 ql_dbg(ql_dbg_async, vha, 0x507c,
1768 "Abort command issued - hdl=%x, type=%x\n",
1769 cmd_sp->handle, cmd_sp->type);
1770
1771 rval = qla2x00_start_sp(sp);
1772 if (rval != QLA_SUCCESS)
1773 goto done_free_sp;
1774
1775 if (wait) {
1776 wait_for_completion(&abt_iocb->u.abt.comp);
1777 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
1778 QLA_SUCCESS : QLA_FUNCTION_FAILED;
1779 } else {
1780 goto done;
1781 }
1782
1783done_free_sp:
1784 sp->free(sp);
1785done:
1786 return rval;
1787}
1788
1789int
1790qla24xx_async_abort_command(srb_t *sp)
1791{
1792 unsigned long flags = 0;
1793
1794 uint32_t handle;
1795 fc_port_t *fcport = sp->fcport;
1796 struct qla_qpair *qpair = sp->qpair;
1797 struct scsi_qla_host *vha = fcport->vha;
1798 struct req_que *req = qpair->req;
1799
1800 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1801 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1802 if (req->outstanding_cmds[handle] == sp)
1803 break;
1804 }
1805 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1806
1807 if (handle == req->num_outstanding_cmds) {
1808
1809 return QLA_FUNCTION_FAILED;
1810 }
1811 if (sp->type == SRB_FXIOCB_DCMD)
1812 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1813 FXDISC_ABORT_IOCTL);
1814
1815 return qla24xx_async_abort_cmd(sp, true);
1816}
1817
1818static void
1819qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1820{
1821 switch (ea->data[0]) {
1822 case MBS_COMMAND_COMPLETE:
1823 ql_dbg(ql_dbg_disc, vha, 0x2118,
1824 "%s %d %8phC post gpdb\n",
1825 __func__, __LINE__, ea->fcport->port_name);
1826
1827 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1828 ea->fcport->logout_on_delete = 1;
1829 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1830 break;
1831 default:
1832 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
1833 (ea->iop[1] == 0x50000)) {
1834 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1835 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
1836 break;
1837 }
1838
1839 if (ea->fcport->n2n_flag) {
1840 ql_dbg(ql_dbg_disc, vha, 0x2118,
1841 "%s %d %8phC post fc4 prli\n",
1842 __func__, __LINE__, ea->fcport->port_name);
1843 ea->fcport->fc4f_nvme = 0;
1844 ea->fcport->n2n_flag = 0;
1845 qla24xx_post_prli_work(vha, ea->fcport);
1846 }
1847 ql_dbg(ql_dbg_disc, vha, 0x2119,
1848 "%s %d %8phC unhandle event of %x\n",
1849 __func__, __LINE__, ea->fcport->port_name, ea->data[0]);
1850 break;
1851 }
1852}
1853
1854static void
1855qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1856{
1857 port_id_t cid;
1858 u16 lid;
1859 struct fc_port *conflict_fcport;
1860 unsigned long flags;
1861 struct fc_port *fcport = ea->fcport;
1862
1863 ql_dbg(ql_dbg_disc, vha, 0xffff,
1864 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1865 __func__, fcport->port_name, fcport->disc_state,
1866 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1867 ea->sp->gen1, fcport->rscn_gen,
1868 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1869
1870 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1871 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1872 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1873 "%s %d %8phC Remote is trying to login\n",
1874 __func__, __LINE__, fcport->port_name);
1875 return;
1876 }
1877
1878 if (fcport->disc_state == DSC_DELETE_PEND)
1879 return;
1880
1881 if (ea->sp->gen2 != fcport->login_gen) {
1882
1883 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1884 "%s %8phC generation changed\n",
1885 __func__, fcport->port_name);
1886 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1887 return;
1888 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1889 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1890 "%s %8phC RSCN generation changed\n",
1891 __func__, fcport->port_name);
1892 qla_rscn_replay(fcport);
1893 qlt_schedule_sess_for_deletion(fcport);
1894 return;
1895 }
1896
1897 switch (ea->data[0]) {
1898 case MBS_COMMAND_COMPLETE:
1899
1900
1901
1902
1903
1904 if (ea->fcport->fc4f_nvme) {
1905 ql_dbg(ql_dbg_disc, vha, 0x2117,
1906 "%s %d %8phC post prli\n",
1907 __func__, __LINE__, ea->fcport->port_name);
1908 qla24xx_post_prli_work(vha, ea->fcport);
1909 } else {
1910 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1911 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n",
1912 __func__, __LINE__, ea->fcport->port_name,
1913 ea->fcport->loop_id, ea->fcport->d_id.b24);
1914
1915 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1916 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1917 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1918 ea->fcport->logout_on_delete = 1;
1919 ea->fcport->send_els_logo = 0;
1920 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
1921 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1922
1923 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1924 }
1925 break;
1926 case MBS_COMMAND_ERROR:
1927 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
1928 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
1929
1930 ea->fcport->flags &= ~FCF_ASYNC_SENT;
1931 ea->fcport->disc_state = DSC_LOGIN_FAILED;
1932 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
1933 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1934 else
1935 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
1936 break;
1937 case MBS_LOOP_ID_USED:
1938
1939 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
1940 cid.b.area = (ea->iop[1] >> 8) & 0xff;
1941 cid.b.al_pa = ea->iop[1] & 0xff;
1942 cid.b.rsvd_1 = 0;
1943
1944 ql_dbg(ql_dbg_disc, vha, 0x20ec,
1945 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
1946 __func__, __LINE__, ea->fcport->port_name,
1947 ea->fcport->loop_id, cid.b24);
1948
1949 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1950 ea->fcport->loop_id = FC_NO_LOOP_ID;
1951 qla24xx_post_gnl_work(vha, ea->fcport);
1952 break;
1953 case MBS_PORT_ID_USED:
1954 lid = ea->iop[1] & 0xffff;
1955 qlt_find_sess_invalidate_other(vha,
1956 wwn_to_u64(ea->fcport->port_name),
1957 ea->fcport->d_id, lid, &conflict_fcport);
1958
1959 if (conflict_fcport) {
1960
1961
1962
1963
1964
1965 conflict_fcport->conflict = ea->fcport;
1966 ea->fcport->login_pause = 1;
1967
1968 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1969 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
1970 __func__, __LINE__, ea->fcport->port_name,
1971 ea->fcport->d_id.b24, lid);
1972 } else {
1973 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1974 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
1975 __func__, __LINE__, ea->fcport->port_name,
1976 ea->fcport->d_id.b24, lid);
1977
1978 qla2x00_clear_loop_id(ea->fcport);
1979 set_bit(lid, vha->hw->loop_id_map);
1980 ea->fcport->loop_id = lid;
1981 ea->fcport->keep_nport_handle = 0;
1982 qlt_schedule_sess_for_deletion(ea->fcport);
1983 }
1984 break;
1985 }
1986 return;
1987}
1988
1989void
1990qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
1991 uint16_t *data)
1992{
1993 qlt_logo_completion_handler(fcport, data[0]);
1994 fcport->login_gen++;
1995 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1996 return;
1997}
1998
1999
2000
2001
2002
2003static int
2004qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2005{
2006 int rval = QLA_SUCCESS;
2007 struct qla_hw_data *ha = vha->hw;
2008 uint32_t idc_major_ver, idc_minor_ver;
2009 uint16_t config[4];
2010
2011 qla83xx_idc_lock(vha, 0);
2012
2013
2014
2015
2016 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2017 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2018
2019
2020 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2021 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2022 "Error while setting DRV-Presence.\n");
2023 rval = QLA_FUNCTION_FAILED;
2024 goto exit;
2025 }
2026
2027
2028 qla83xx_reset_ownership(vha);
2029
2030
2031
2032
2033
2034
2035
2036 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2037 if (ha->flags.nic_core_reset_owner) {
2038
2039 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2040 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2041
2042
2043 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2044 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2045
2046
2047
2048
2049 ql_log(ql_log_warn, vha, 0xb07d,
2050 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2051 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2052 __qla83xx_clear_drv_presence(vha);
2053 rval = QLA_FUNCTION_FAILED;
2054 goto exit;
2055 }
2056
2057 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2058 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2059 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2060
2061 if (ha->flags.nic_core_reset_owner) {
2062 memset(config, 0, sizeof(config));
2063 if (!qla81xx_get_port_config(vha, config))
2064 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2065 QLA8XXX_DEV_READY);
2066 }
2067
2068 rval = qla83xx_idc_state_handler(vha);
2069
2070exit:
2071 qla83xx_idc_unlock(vha, 0);
2072
2073 return rval;
2074}
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086int
2087qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2088{
2089 int rval;
2090 struct qla_hw_data *ha = vha->hw;
2091 struct req_que *req = ha->req_q_map[0];
2092
2093 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2094 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2095
2096
2097 vha->flags.online = 0;
2098 ha->flags.chip_reset_done = 0;
2099 vha->flags.reset_active = 0;
2100 ha->flags.pci_channel_io_perm_failure = 0;
2101 ha->flags.eeh_busy = 0;
2102 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2103 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2104 atomic_set(&vha->loop_state, LOOP_DOWN);
2105 vha->device_flags = DFLG_NO_CABLE;
2106 vha->dpc_flags = 0;
2107 vha->flags.management_server_logged_in = 0;
2108 vha->marker_needed = 0;
2109 ha->isp_abort_cnt = 0;
2110 ha->beacon_blink_led = 0;
2111
2112 set_bit(0, ha->req_qid_map);
2113 set_bit(0, ha->rsp_qid_map);
2114
2115 ql_dbg(ql_dbg_init, vha, 0x0040,
2116 "Configuring PCI space...\n");
2117 rval = ha->isp_ops->pci_config(vha);
2118 if (rval) {
2119 ql_log(ql_log_warn, vha, 0x0044,
2120 "Unable to configure PCI space.\n");
2121 return (rval);
2122 }
2123
2124 ha->isp_ops->reset_chip(vha);
2125
2126 rval = qla2xxx_get_flash_info(vha);
2127 if (rval) {
2128 ql_log(ql_log_fatal, vha, 0x004f,
2129 "Unable to validate FLASH data.\n");
2130 return rval;
2131 }
2132
2133 if (IS_QLA8044(ha)) {
2134 qla8044_read_reset_template(vha);
2135
2136
2137
2138
2139
2140 if (ql2xdontresethba == 1)
2141 qla8044_set_idc_dontreset(vha);
2142 }
2143
2144 ha->isp_ops->get_flash_version(vha, req->ring);
2145 ql_dbg(ql_dbg_init, vha, 0x0061,
2146 "Configure NVRAM parameters...\n");
2147
2148 ha->isp_ops->nvram_config(vha);
2149
2150 if (ha->flags.disable_serdes) {
2151
2152 ql_log(ql_log_info, vha, 0x0077,
2153 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2154 return QLA_FUNCTION_FAILED;
2155 }
2156
2157 ql_dbg(ql_dbg_init, vha, 0x0078,
2158 "Verifying loaded RISC code...\n");
2159
2160 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2161 rval = ha->isp_ops->chip_diag(vha);
2162 if (rval)
2163 return (rval);
2164 rval = qla2x00_setup_chip(vha);
2165 if (rval)
2166 return (rval);
2167 }
2168
2169 if (IS_QLA84XX(ha)) {
2170 ha->cs84xx = qla84xx_get_chip(vha);
2171 if (!ha->cs84xx) {
2172 ql_log(ql_log_warn, vha, 0x00d0,
2173 "Unable to configure ISP84XX.\n");
2174 return QLA_FUNCTION_FAILED;
2175 }
2176 }
2177
2178 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2179 rval = qla2x00_init_rings(vha);
2180
2181 ha->flags.chip_reset_done = 1;
2182
2183 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2184
2185 rval = qla84xx_init_chip(vha);
2186 if (rval != QLA_SUCCESS) {
2187 ql_log(ql_log_warn, vha, 0x00d4,
2188 "Unable to initialize ISP84XX.\n");
2189 qla84xx_put_chip(vha);
2190 }
2191 }
2192
2193
2194 if (IS_QLA8031(ha)) {
2195 rval = qla83xx_nic_core_fw_load(vha);
2196 if (rval)
2197 ql_log(ql_log_warn, vha, 0x0124,
2198 "Error in initializing NIC Core f/w.\n");
2199 }
2200
2201 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2202 qla24xx_read_fcp_prio_cfg(vha);
2203
2204 if (IS_P3P_TYPE(ha))
2205 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2206 else
2207 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2208
2209 return (rval);
2210}
2211
2212
2213
2214
2215
2216
2217
2218int
2219qla2100_pci_config(scsi_qla_host_t *vha)
2220{
2221 uint16_t w;
2222 unsigned long flags;
2223 struct qla_hw_data *ha = vha->hw;
2224 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2225
2226 pci_set_master(ha->pdev);
2227 pci_try_set_mwi(ha->pdev);
2228
2229 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2230 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2231 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2232
2233 pci_disable_rom(ha->pdev);
2234
2235
2236 spin_lock_irqsave(&ha->hardware_lock, flags);
2237 ha->pci_attr = RD_REG_WORD(®->ctrl_status);
2238 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2239
2240 return QLA_SUCCESS;
2241}
2242
2243
2244
2245
2246
2247
2248
2249int
2250qla2300_pci_config(scsi_qla_host_t *vha)
2251{
2252 uint16_t w;
2253 unsigned long flags = 0;
2254 uint32_t cnt;
2255 struct qla_hw_data *ha = vha->hw;
2256 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2257
2258 pci_set_master(ha->pdev);
2259 pci_try_set_mwi(ha->pdev);
2260
2261 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2262 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2263
2264 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2265 w &= ~PCI_COMMAND_INTX_DISABLE;
2266 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2267
2268
2269
2270
2271
2272
2273
2274
2275 if (IS_QLA2300(ha)) {
2276 spin_lock_irqsave(&ha->hardware_lock, flags);
2277
2278
2279 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
2280 for (cnt = 0; cnt < 30000; cnt++) {
2281 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0)
2282 break;
2283
2284 udelay(10);
2285 }
2286
2287
2288 WRT_REG_WORD(®->ctrl_status, 0x20);
2289 RD_REG_WORD(®->ctrl_status);
2290
2291
2292 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2293
2294 if (ha->fb_rev == FPM_2300)
2295 pci_clear_mwi(ha->pdev);
2296
2297
2298 WRT_REG_WORD(®->ctrl_status, 0x0);
2299 RD_REG_WORD(®->ctrl_status);
2300
2301
2302 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2303 for (cnt = 0; cnt < 30000; cnt++) {
2304 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0)
2305 break;
2306
2307 udelay(10);
2308 }
2309
2310 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2311 }
2312
2313 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2314
2315 pci_disable_rom(ha->pdev);
2316
2317
2318 spin_lock_irqsave(&ha->hardware_lock, flags);
2319 ha->pci_attr = RD_REG_WORD(®->ctrl_status);
2320 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2321
2322 return QLA_SUCCESS;
2323}
2324
2325
2326
2327
2328
2329
2330
2331int
2332qla24xx_pci_config(scsi_qla_host_t *vha)
2333{
2334 uint16_t w;
2335 unsigned long flags = 0;
2336 struct qla_hw_data *ha = vha->hw;
2337 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2338
2339 pci_set_master(ha->pdev);
2340 pci_try_set_mwi(ha->pdev);
2341
2342 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2343 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2344 w &= ~PCI_COMMAND_INTX_DISABLE;
2345 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2346
2347 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2348
2349
2350 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2351 pcix_set_mmrbc(ha->pdev, 2048);
2352
2353
2354 if (pci_is_pcie(ha->pdev))
2355 pcie_set_readrq(ha->pdev, 4096);
2356
2357 pci_disable_rom(ha->pdev);
2358
2359 ha->chip_revision = ha->pdev->revision;
2360
2361
2362 spin_lock_irqsave(&ha->hardware_lock, flags);
2363 ha->pci_attr = RD_REG_DWORD(®->ctrl_status);
2364 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2365
2366 return QLA_SUCCESS;
2367}
2368
2369
2370
2371
2372
2373
2374
2375int
2376qla25xx_pci_config(scsi_qla_host_t *vha)
2377{
2378 uint16_t w;
2379 struct qla_hw_data *ha = vha->hw;
2380
2381 pci_set_master(ha->pdev);
2382 pci_try_set_mwi(ha->pdev);
2383
2384 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2385 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2386 w &= ~PCI_COMMAND_INTX_DISABLE;
2387 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2388
2389
2390 if (pci_is_pcie(ha->pdev))
2391 pcie_set_readrq(ha->pdev, 4096);
2392
2393 pci_disable_rom(ha->pdev);
2394
2395 ha->chip_revision = ha->pdev->revision;
2396
2397 return QLA_SUCCESS;
2398}
2399
2400
2401
2402
2403
2404
2405
2406static int
2407qla2x00_isp_firmware(scsi_qla_host_t *vha)
2408{
2409 int rval;
2410 uint16_t loop_id, topo, sw_cap;
2411 uint8_t domain, area, al_pa;
2412 struct qla_hw_data *ha = vha->hw;
2413
2414
2415 rval = QLA_FUNCTION_FAILED;
2416
2417 if (ha->flags.disable_risc_code_load) {
2418 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2419
2420
2421 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2422 if (rval == QLA_SUCCESS) {
2423
2424 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2425 &area, &domain, &topo, &sw_cap);
2426 }
2427 }
2428
2429 if (rval)
2430 ql_dbg(ql_dbg_init, vha, 0x007a,
2431 "**** Load RISC code ****.\n");
2432
2433 return (rval);
2434}
2435
2436
2437
2438
2439
2440
2441
2442void
2443qla2x00_reset_chip(scsi_qla_host_t *vha)
2444{
2445 unsigned long flags = 0;
2446 struct qla_hw_data *ha = vha->hw;
2447 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2448 uint32_t cnt;
2449 uint16_t cmd;
2450
2451 if (unlikely(pci_channel_offline(ha->pdev)))
2452 return;
2453
2454 ha->isp_ops->disable_intrs(ha);
2455
2456 spin_lock_irqsave(&ha->hardware_lock, flags);
2457
2458
2459 cmd = 0;
2460 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2461 cmd &= ~PCI_COMMAND_MASTER;
2462 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2463
2464 if (!IS_QLA2100(ha)) {
2465
2466 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
2467 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2468 for (cnt = 0; cnt < 30000; cnt++) {
2469 if ((RD_REG_WORD(®->hccr) &
2470 HCCR_RISC_PAUSE) != 0)
2471 break;
2472 udelay(100);
2473 }
2474 } else {
2475 RD_REG_WORD(®->hccr);
2476 udelay(10);
2477 }
2478
2479
2480 WRT_REG_WORD(®->ctrl_status, 0x20);
2481 RD_REG_WORD(®->ctrl_status);
2482
2483
2484 WRT_REG_WORD(®->fpm_diag_config, 0x100);
2485 RD_REG_WORD(®->fpm_diag_config);
2486
2487
2488 if (!IS_QLA2200(ha)) {
2489 WRT_REG_WORD(®->fpm_diag_config, 0x0);
2490 RD_REG_WORD(®->fpm_diag_config);
2491 }
2492
2493
2494 WRT_REG_WORD(®->ctrl_status, 0x10);
2495 RD_REG_WORD(®->ctrl_status);
2496
2497
2498 if (IS_QLA2200(ha)) {
2499 WRT_FB_CMD_REG(ha, reg, 0xa000);
2500 RD_FB_CMD_REG(ha, reg);
2501 } else {
2502 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2503
2504
2505 for (cnt = 0; cnt < 3000; cnt++) {
2506 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2507 break;
2508 udelay(100);
2509 }
2510 }
2511
2512
2513 WRT_REG_WORD(®->ctrl_status, 0);
2514 RD_REG_WORD(®->ctrl_status);
2515
2516
2517 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
2518 RD_REG_WORD(®->hccr);
2519
2520
2521 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2522 RD_REG_WORD(®->hccr);
2523 }
2524
2525 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT);
2526 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT);
2527
2528
2529 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET);
2530
2531
2532 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2533
2534
2535
2536
2537
2538 udelay(20);
2539 for (cnt = 30000; cnt; cnt--) {
2540 if ((RD_REG_WORD(®->ctrl_status) &
2541 CSR_ISP_SOFT_RESET) == 0)
2542 break;
2543 udelay(100);
2544 }
2545 } else
2546 udelay(10);
2547
2548
2549 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
2550
2551 WRT_REG_WORD(®->semaphore, 0);
2552
2553
2554 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2555 RD_REG_WORD(®->hccr);
2556
2557 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2558 for (cnt = 0; cnt < 30000; cnt++) {
2559 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2560 break;
2561
2562 udelay(100);
2563 }
2564 } else
2565 udelay(100);
2566
2567
2568 cmd |= PCI_COMMAND_MASTER;
2569 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2570
2571
2572 if (!IS_QLA2100(ha)) {
2573 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE);
2574 RD_REG_WORD(®->hccr);
2575 }
2576
2577 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2578}
2579
2580
2581
2582
2583
2584
2585
2586static int
2587qla81xx_reset_mpi(scsi_qla_host_t *vha)
2588{
2589 uint16_t mb[4] = {0x1010, 0, 1, 0};
2590
2591 if (!IS_QLA81XX(vha->hw))
2592 return QLA_SUCCESS;
2593
2594 return qla81xx_write_mpi_register(vha, mb);
2595}
2596
2597
2598
2599
2600
2601
2602
2603static inline int
2604qla24xx_reset_risc(scsi_qla_host_t *vha)
2605{
2606 unsigned long flags = 0;
2607 struct qla_hw_data *ha = vha->hw;
2608 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2609 uint32_t cnt;
2610 uint16_t wd;
2611 static int abts_cnt;
2612 int rval = QLA_SUCCESS;
2613
2614 spin_lock_irqsave(&ha->hardware_lock, flags);
2615
2616
2617 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2618 for (cnt = 0; cnt < 30000; cnt++) {
2619 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2620 break;
2621
2622 udelay(10);
2623 }
2624
2625 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE))
2626 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2627
2628 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2629 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2630 RD_REG_DWORD(®->hccr),
2631 RD_REG_DWORD(®->ctrl_status),
2632 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE));
2633
2634 WRT_REG_DWORD(®->ctrl_status,
2635 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2636 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2637
2638 udelay(100);
2639
2640
2641 RD_REG_WORD(®->mailbox0);
2642 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 &&
2643 rval == QLA_SUCCESS; cnt--) {
2644 barrier();
2645 if (cnt)
2646 udelay(5);
2647 else
2648 rval = QLA_FUNCTION_TIMEOUT;
2649 }
2650
2651 if (rval == QLA_SUCCESS)
2652 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2653
2654 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2655 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2656 RD_REG_DWORD(®->hccr),
2657 RD_REG_DWORD(®->mailbox0));
2658
2659
2660 RD_REG_DWORD(®->ctrl_status);
2661 for (cnt = 0; cnt < 60; cnt++) {
2662 barrier();
2663 if ((RD_REG_DWORD(®->ctrl_status) &
2664 CSRX_ISP_SOFT_RESET) == 0)
2665 break;
2666
2667 udelay(5);
2668 }
2669 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET))
2670 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2671
2672 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2673 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2674 RD_REG_DWORD(®->hccr),
2675 RD_REG_DWORD(®->ctrl_status));
2676
2677
2678 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2679 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2680 if (++abts_cnt < 5) {
2681 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2682 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2683 } else {
2684
2685
2686
2687
2688 abts_cnt = 0;
2689 vha->flags.online = 0;
2690 }
2691 }
2692 }
2693
2694 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET);
2695 RD_REG_DWORD(®->hccr);
2696
2697 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
2698 RD_REG_DWORD(®->hccr);
2699
2700 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET);
2701 RD_REG_DWORD(®->hccr);
2702
2703 RD_REG_WORD(®->mailbox0);
2704 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 &&
2705 rval == QLA_SUCCESS; cnt--) {
2706 barrier();
2707 if (cnt)
2708 udelay(5);
2709 else
2710 rval = QLA_FUNCTION_TIMEOUT;
2711 }
2712 if (rval == QLA_SUCCESS)
2713 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2714
2715 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2716 "Host Risc 0x%x, mailbox0 0x%x\n",
2717 RD_REG_DWORD(®->hccr),
2718 RD_REG_WORD(®->mailbox0));
2719
2720 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2721
2722 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2723 "Driver in %s mode\n",
2724 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2725
2726 if (IS_NOPOLLING_TYPE(ha))
2727 ha->isp_ops->enable_intrs(ha);
2728
2729 return rval;
2730}
2731
2732static void
2733qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2734{
2735 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2736
2737 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2738 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2739
2740}
2741
2742static void
2743qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2744{
2745 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2746
2747 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2748 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2749}
2750
2751static void
2752qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2753{
2754 uint32_t wd32 = 0;
2755 uint delta_msec = 100;
2756 uint elapsed_msec = 0;
2757 uint timeout_msec;
2758 ulong n;
2759
2760 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2761 vha->hw->pdev->subsystem_device != 0x0240)
2762 return;
2763
2764 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2765 udelay(100);
2766
2767attempt:
2768 timeout_msec = TIMEOUT_SEMAPHORE;
2769 n = timeout_msec / delta_msec;
2770 while (n--) {
2771 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2772 qla25xx_read_risc_sema_reg(vha, &wd32);
2773 if (wd32 & RISC_SEMAPHORE)
2774 break;
2775 msleep(delta_msec);
2776 elapsed_msec += delta_msec;
2777 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2778 goto force;
2779 }
2780
2781 if (!(wd32 & RISC_SEMAPHORE))
2782 goto force;
2783
2784 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2785 goto acquired;
2786
2787 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2788 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2789 n = timeout_msec / delta_msec;
2790 while (n--) {
2791 qla25xx_read_risc_sema_reg(vha, &wd32);
2792 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2793 break;
2794 msleep(delta_msec);
2795 elapsed_msec += delta_msec;
2796 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2797 goto force;
2798 }
2799
2800 if (wd32 & RISC_SEMAPHORE_FORCE)
2801 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2802
2803 goto attempt;
2804
2805force:
2806 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2807
2808acquired:
2809 return;
2810}
2811
2812
2813
2814
2815
2816
2817
2818void
2819qla24xx_reset_chip(scsi_qla_host_t *vha)
2820{
2821 struct qla_hw_data *ha = vha->hw;
2822
2823 if (pci_channel_offline(ha->pdev) &&
2824 ha->flags.pci_channel_io_perm_failure) {
2825 return;
2826 }
2827
2828 ha->isp_ops->disable_intrs(ha);
2829
2830 qla25xx_manipulate_risc_semaphore(vha);
2831
2832
2833 qla24xx_reset_risc(vha);
2834}
2835
2836
2837
2838
2839
2840
2841
2842int
2843qla2x00_chip_diag(scsi_qla_host_t *vha)
2844{
2845 int rval;
2846 struct qla_hw_data *ha = vha->hw;
2847 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2848 unsigned long flags = 0;
2849 uint16_t data;
2850 uint32_t cnt;
2851 uint16_t mb[5];
2852 struct req_que *req = ha->req_q_map[0];
2853
2854
2855 rval = QLA_FUNCTION_FAILED;
2856
2857 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
2858 ®->flash_address);
2859
2860 spin_lock_irqsave(&ha->hardware_lock, flags);
2861
2862
2863 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET);
2864
2865
2866
2867
2868
2869 udelay(20);
2870 data = qla2x00_debounce_register(®->ctrl_status);
2871 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2872 udelay(5);
2873 data = RD_REG_WORD(®->ctrl_status);
2874 barrier();
2875 }
2876
2877 if (!cnt)
2878 goto chip_diag_failed;
2879
2880 ql_dbg(ql_dbg_init, vha, 0x007c,
2881 "Reset register cleared by chip reset.\n");
2882
2883
2884 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
2885 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2886
2887
2888 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2889 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
2890 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
2891 udelay(5);
2892 data = RD_MAILBOX_REG(ha, reg, 0);
2893 barrier();
2894 }
2895 } else
2896 udelay(10);
2897
2898 if (!cnt)
2899 goto chip_diag_failed;
2900
2901
2902 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
2903
2904 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
2905 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
2906 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
2907 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
2908 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
2909 mb[3] != PROD_ID_3) {
2910 ql_log(ql_log_warn, vha, 0x0062,
2911 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
2912 mb[1], mb[2], mb[3]);
2913
2914 goto chip_diag_failed;
2915 }
2916 ha->product_id[0] = mb[1];
2917 ha->product_id[1] = mb[2];
2918 ha->product_id[2] = mb[3];
2919 ha->product_id[3] = mb[4];
2920
2921
2922 if (req->length > 1024)
2923 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
2924 else
2925 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
2926 req->length;
2927
2928 if (IS_QLA2200(ha) &&
2929 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
2930
2931 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
2932
2933 ha->device_type |= DT_ISP2200A;
2934 ha->fw_transfer_size = 128;
2935 }
2936
2937
2938 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2939
2940 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
2941 rval = qla2x00_mbx_reg_test(vha);
2942 if (rval)
2943 ql_log(ql_log_warn, vha, 0x0080,
2944 "Failed mailbox send register test.\n");
2945 else
2946
2947 rval = QLA_SUCCESS;
2948 spin_lock_irqsave(&ha->hardware_lock, flags);
2949
2950chip_diag_failed:
2951 if (rval)
2952 ql_log(ql_log_info, vha, 0x0081,
2953 "Chip diagnostics **** FAILED ****.\n");
2954
2955 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2956
2957 return (rval);
2958}
2959
2960
2961
2962
2963
2964
2965
2966int
2967qla24xx_chip_diag(scsi_qla_host_t *vha)
2968{
2969 int rval;
2970 struct qla_hw_data *ha = vha->hw;
2971 struct req_que *req = ha->req_q_map[0];
2972
2973 if (IS_P3P_TYPE(ha))
2974 return QLA_SUCCESS;
2975
2976 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
2977
2978 rval = qla2x00_mbx_reg_test(vha);
2979 if (rval) {
2980 ql_log(ql_log_warn, vha, 0x0082,
2981 "Failed mailbox send register test.\n");
2982 } else {
2983
2984 rval = QLA_SUCCESS;
2985 }
2986
2987 return rval;
2988}
2989
2990static void
2991qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
2992{
2993 int rval;
2994 dma_addr_t tc_dma;
2995 void *tc;
2996 struct qla_hw_data *ha = vha->hw;
2997
2998 if (ha->eft) {
2999 ql_dbg(ql_dbg_init, vha, 0x00bd,
3000 "%s: Offload Mem is already allocated.\n",
3001 __func__);
3002 return;
3003 }
3004
3005 if (IS_FWI2_CAPABLE(ha)) {
3006
3007 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3008 !IS_QLA27XX(ha))
3009 goto try_eft;
3010
3011 if (ha->fce)
3012 dma_free_coherent(&ha->pdev->dev,
3013 FCE_SIZE, ha->fce, ha->fce_dma);
3014
3015
3016 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3017 GFP_KERNEL);
3018 if (!tc) {
3019 ql_log(ql_log_warn, vha, 0x00be,
3020 "Unable to allocate (%d KB) for FCE.\n",
3021 FCE_SIZE / 1024);
3022 goto try_eft;
3023 }
3024
3025 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3026 ha->fce_mb, &ha->fce_bufs);
3027 if (rval) {
3028 ql_log(ql_log_warn, vha, 0x00bf,
3029 "Unable to initialize FCE (%d).\n", rval);
3030 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
3031 tc_dma);
3032 ha->flags.fce_enabled = 0;
3033 goto try_eft;
3034 }
3035 ql_dbg(ql_dbg_init, vha, 0x00c0,
3036 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
3037
3038 ha->flags.fce_enabled = 1;
3039 ha->fce_dma = tc_dma;
3040 ha->fce = tc;
3041
3042try_eft:
3043 if (ha->eft)
3044 dma_free_coherent(&ha->pdev->dev,
3045 EFT_SIZE, ha->eft, ha->eft_dma);
3046
3047
3048 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3049 GFP_KERNEL);
3050 if (!tc) {
3051 ql_log(ql_log_warn, vha, 0x00c1,
3052 "Unable to allocate (%d KB) for EFT.\n",
3053 EFT_SIZE / 1024);
3054 goto eft_err;
3055 }
3056
3057 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3058 if (rval) {
3059 ql_log(ql_log_warn, vha, 0x00c2,
3060 "Unable to initialize EFT (%d).\n", rval);
3061 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
3062 tc_dma);
3063 goto eft_err;
3064 }
3065 ql_dbg(ql_dbg_init, vha, 0x00c3,
3066 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3067
3068 ha->eft_dma = tc_dma;
3069 ha->eft = tc;
3070 }
3071
3072eft_err:
3073 return;
3074}
3075
3076void
3077qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3078{
3079 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3080 eft_size, fce_size, mq_size;
3081 struct qla_hw_data *ha = vha->hw;
3082 struct req_que *req = ha->req_q_map[0];
3083 struct rsp_que *rsp = ha->rsp_q_map[0];
3084 struct qla2xxx_fw_dump *fw_dump;
3085
3086 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3087 req_q_size = rsp_q_size = 0;
3088
3089 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3090 fixed_size = sizeof(struct qla2100_fw_dump);
3091 } else if (IS_QLA23XX(ha)) {
3092 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3093 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3094 sizeof(uint16_t);
3095 } else if (IS_FWI2_CAPABLE(ha)) {
3096 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
3097 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3098 else if (IS_QLA81XX(ha))
3099 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3100 else if (IS_QLA25XX(ha))
3101 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3102 else
3103 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3104
3105 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3106 sizeof(uint32_t);
3107 if (ha->mqenable) {
3108 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
3109 mq_size = sizeof(struct qla2xxx_mq_chain);
3110
3111
3112
3113
3114 mq_size += ha->max_req_queues *
3115 (req->length * sizeof(request_t));
3116 mq_size += ha->max_rsp_queues *
3117 (rsp->length * sizeof(response_t));
3118 }
3119 if (ha->tgt.atio_ring)
3120 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3121
3122 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3123 !IS_QLA27XX(ha))
3124 goto try_eft;
3125
3126 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3127try_eft:
3128 ql_dbg(ql_dbg_init, vha, 0x00c3,
3129 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3130 eft_size = EFT_SIZE;
3131 }
3132
3133 if (IS_QLA27XX(ha)) {
3134 if (!ha->fw_dump_template) {
3135 ql_log(ql_log_warn, vha, 0x00ba,
3136 "Failed missing fwdump template\n");
3137 return;
3138 }
3139 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
3140 ql_dbg(ql_dbg_init, vha, 0x00fa,
3141 "-> allocating fwdump (%x bytes)...\n", dump_size);
3142 goto allocate;
3143 }
3144
3145 req_q_size = req->length * sizeof(request_t);
3146 rsp_q_size = rsp->length * sizeof(response_t);
3147 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3148 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
3149 ha->chain_offset = dump_size;
3150 dump_size += mq_size + fce_size;
3151
3152 if (ha->exchoffld_buf)
3153 dump_size += sizeof(struct qla2xxx_offld_chain) +
3154 ha->exchoffld_size;
3155 if (ha->exlogin_buf)
3156 dump_size += sizeof(struct qla2xxx_offld_chain) +
3157 ha->exlogin_size;
3158
3159allocate:
3160 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) {
3161 fw_dump = vmalloc(dump_size);
3162 if (!fw_dump) {
3163 ql_log(ql_log_warn, vha, 0x00c4,
3164 "Unable to allocate (%d KB) for firmware dump.\n",
3165 dump_size / 1024);
3166 } else {
3167 if (ha->fw_dump)
3168 vfree(ha->fw_dump);
3169 ha->fw_dump = fw_dump;
3170
3171 ha->fw_dump_len = dump_size;
3172 ql_dbg(ql_dbg_init, vha, 0x00c5,
3173 "Allocated (%d KB) for firmware dump.\n",
3174 dump_size / 1024);
3175
3176 if (IS_QLA27XX(ha))
3177 return;
3178
3179 ha->fw_dump->signature[0] = 'Q';
3180 ha->fw_dump->signature[1] = 'L';
3181 ha->fw_dump->signature[2] = 'G';
3182 ha->fw_dump->signature[3] = 'C';
3183 ha->fw_dump->version = htonl(1);
3184
3185 ha->fw_dump->fixed_size = htonl(fixed_size);
3186 ha->fw_dump->mem_size = htonl(mem_size);
3187 ha->fw_dump->req_q_size = htonl(req_q_size);
3188 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3189
3190 ha->fw_dump->eft_size = htonl(eft_size);
3191 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
3192 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
3193
3194 ha->fw_dump->header_size =
3195 htonl(offsetof(struct qla2xxx_fw_dump, isp));
3196 }
3197 }
3198}
3199
3200static int
3201qla81xx_mpi_sync(scsi_qla_host_t *vha)
3202{
3203#define MPS_MASK 0xe0
3204 int rval;
3205 uint16_t dc;
3206 uint32_t dw;
3207
3208 if (!IS_QLA81XX(vha->hw))
3209 return QLA_SUCCESS;
3210
3211 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3212 if (rval != QLA_SUCCESS) {
3213 ql_log(ql_log_warn, vha, 0x0105,
3214 "Unable to acquire semaphore.\n");
3215 goto done;
3216 }
3217
3218 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3219 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3220 if (rval != QLA_SUCCESS) {
3221 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3222 goto done_release;
3223 }
3224
3225 dc &= MPS_MASK;
3226 if (dc == (dw & MPS_MASK))
3227 goto done_release;
3228
3229 dw &= ~MPS_MASK;
3230 dw |= dc;
3231 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3232 if (rval != QLA_SUCCESS) {
3233 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3234 }
3235
3236done_release:
3237 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3238 if (rval != QLA_SUCCESS) {
3239 ql_log(ql_log_warn, vha, 0x006d,
3240 "Unable to release semaphore.\n");
3241 }
3242
3243done:
3244 return rval;
3245}
3246
3247int
3248qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3249{
3250
3251 if (req->outstanding_cmds)
3252 return QLA_SUCCESS;
3253
3254 if (!IS_FWI2_CAPABLE(ha))
3255 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3256 else {
3257 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3258 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3259 else
3260 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3261 }
3262
3263 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
3264 req->num_outstanding_cmds, GFP_KERNEL);
3265
3266 if (!req->outstanding_cmds) {
3267
3268
3269
3270
3271 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3272 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
3273 req->num_outstanding_cmds, GFP_KERNEL);
3274
3275 if (!req->outstanding_cmds) {
3276 ql_log(ql_log_fatal, NULL, 0x0126,
3277 "Failed to allocate memory for "
3278 "outstanding_cmds for req_que %p.\n", req);
3279 req->num_outstanding_cmds = 0;
3280 return QLA_FUNCTION_FAILED;
3281 }
3282 }
3283
3284 return QLA_SUCCESS;
3285}
3286
3287#define PRINT_FIELD(_field, _flag, _str) { \
3288 if (a0->_field & _flag) {\
3289 if (p) {\
3290 strcat(ptr, "|");\
3291 ptr++;\
3292 leftover--;\
3293 } \
3294 len = snprintf(ptr, leftover, "%s", _str); \
3295 p = 1;\
3296 leftover -= len;\
3297 ptr += len; \
3298 } \
3299}
3300
3301static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3302{
3303#define STR_LEN 64
3304 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3305 u8 str[STR_LEN], *ptr, p;
3306 int leftover, len;
3307
3308 memset(str, 0, STR_LEN);
3309 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3310 ql_dbg(ql_dbg_init, vha, 0x015a,
3311 "SFP MFG Name: %s\n", str);
3312
3313 memset(str, 0, STR_LEN);
3314 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3315 ql_dbg(ql_dbg_init, vha, 0x015c,
3316 "SFP Part Name: %s\n", str);
3317
3318
3319 memset(str, 0, STR_LEN);
3320 ptr = str;
3321 leftover = STR_LEN;
3322 p = len = 0;
3323 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3324 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3325 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3326 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3327 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3328 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3329 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3330 ql_dbg(ql_dbg_init, vha, 0x0160,
3331 "SFP Media: %s\n", str);
3332
3333
3334 memset(str, 0, STR_LEN);
3335 ptr = str;
3336 leftover = STR_LEN;
3337 p = len = 0;
3338 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3339 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3340 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3341 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3342 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3343 ql_dbg(ql_dbg_init, vha, 0x0196,
3344 "SFP Link Length: %s\n", str);
3345
3346 memset(str, 0, STR_LEN);
3347 ptr = str;
3348 leftover = STR_LEN;
3349 p = len = 0;
3350 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3351 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3352 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3353 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3354 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3355 ql_dbg(ql_dbg_init, vha, 0x016e,
3356 "SFP FC Link Tech: %s\n", str);
3357
3358 if (a0->length_km)
3359 ql_dbg(ql_dbg_init, vha, 0x016f,
3360 "SFP Distant: %d km\n", a0->length_km);
3361 if (a0->length_100m)
3362 ql_dbg(ql_dbg_init, vha, 0x0170,
3363 "SFP Distant: %d m\n", a0->length_100m*100);
3364 if (a0->length_50um_10m)
3365 ql_dbg(ql_dbg_init, vha, 0x0189,
3366 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3367 if (a0->length_62um_10m)
3368 ql_dbg(ql_dbg_init, vha, 0x018a,
3369 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3370 if (a0->length_om4_10m)
3371 ql_dbg(ql_dbg_init, vha, 0x0194,
3372 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3373 if (a0->length_om3_10m)
3374 ql_dbg(ql_dbg_init, vha, 0x0195,
3375 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3376}
3377
3378
3379
3380
3381
3382
3383
3384
3385int
3386qla24xx_detect_sfp(scsi_qla_host_t *vha)
3387{
3388 int rc = QLA_SUCCESS;
3389 struct sff_8247_a0 *a;
3390 struct qla_hw_data *ha = vha->hw;
3391
3392 if (!AUTO_DETECT_SFP_SUPPORT(vha))
3393 goto out;
3394
3395 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3396 if (rc)
3397 goto out;
3398
3399 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3400 qla2xxx_print_sfp_info(vha);
3401
3402 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) {
3403
3404 ha->flags.detected_lr_sfp = 1;
3405
3406 if (a->length_km > 5 || a->length_100m > 50)
3407 ha->long_range_distance = LR_DISTANCE_10K;
3408 else
3409 ha->long_range_distance = LR_DISTANCE_5K;
3410
3411 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3412 ql_dbg(ql_dbg_async, vha, 0x507b,
3413 "Detected Long Range SFP.\n");
3414 } else {
3415
3416 ha->flags.detected_lr_sfp = 0;
3417 if (ha->flags.using_lr_setting)
3418 ql_dbg(ql_dbg_async, vha, 0x5084,
3419 "Detected Short Range SFP.\n");
3420 }
3421
3422 if (!vha->flags.init_done)
3423 rc = QLA_SUCCESS;
3424out:
3425 return rc;
3426}
3427
3428
3429
3430
3431
3432
3433
3434static int
3435qla2x00_setup_chip(scsi_qla_host_t *vha)
3436{
3437 int rval;
3438 uint32_t srisc_address = 0;
3439 struct qla_hw_data *ha = vha->hw;
3440 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3441 unsigned long flags;
3442 uint16_t fw_major_version;
3443
3444 if (IS_P3P_TYPE(ha)) {
3445 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3446 if (rval == QLA_SUCCESS) {
3447 qla2x00_stop_firmware(vha);
3448 goto enable_82xx_npiv;
3449 } else
3450 goto failed;
3451 }
3452
3453 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3454
3455 spin_lock_irqsave(&ha->hardware_lock, flags);
3456 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
3457 RD_REG_WORD(®->hccr);
3458 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3459 }
3460
3461 qla81xx_mpi_sync(vha);
3462
3463
3464 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3465 if (rval == QLA_SUCCESS) {
3466 ql_dbg(ql_dbg_init, vha, 0x00c9,
3467 "Verifying Checksum of loaded RISC code.\n");
3468
3469 rval = qla2x00_verify_checksum(vha, srisc_address);
3470 if (rval == QLA_SUCCESS) {
3471
3472 ql_dbg(ql_dbg_init, vha, 0x00ca,
3473 "Starting firmware.\n");
3474
3475 if (ql2xexlogins)
3476 ha->flags.exlogins_enabled = 1;
3477
3478 if (qla_is_exch_offld_enabled(vha))
3479 ha->flags.exchoffld_enabled = 1;
3480
3481 rval = qla2x00_execute_fw(vha, srisc_address);
3482
3483 if (rval == QLA_SUCCESS) {
3484 qla24xx_detect_sfp(vha);
3485
3486 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) &&
3487 (ha->zio_mode == QLA_ZIO_MODE_6))
3488 qla27xx_set_zio_threshold(vha,
3489 ha->last_zio_threshold);
3490
3491 rval = qla2x00_set_exlogins_buffer(vha);
3492 if (rval != QLA_SUCCESS)
3493 goto failed;
3494
3495 rval = qla2x00_set_exchoffld_buffer(vha);
3496 if (rval != QLA_SUCCESS)
3497 goto failed;
3498
3499enable_82xx_npiv:
3500 fw_major_version = ha->fw_major_version;
3501 if (IS_P3P_TYPE(ha))
3502 qla82xx_check_md_needed(vha);
3503 else
3504 rval = qla2x00_get_fw_version(vha);
3505 if (rval != QLA_SUCCESS)
3506 goto failed;
3507 ha->flags.npiv_supported = 0;
3508 if (IS_QLA2XXX_MIDTYPE(ha) &&
3509 (ha->fw_attributes & BIT_2)) {
3510 ha->flags.npiv_supported = 1;
3511 if ((!ha->max_npiv_vports) ||
3512 ((ha->max_npiv_vports + 1) %
3513 MIN_MULTI_ID_FABRIC))
3514 ha->max_npiv_vports =
3515 MIN_MULTI_ID_FABRIC - 1;
3516 }
3517 qla2x00_get_resource_cnts(vha);
3518
3519
3520
3521
3522
3523 rval = qla2x00_alloc_outstanding_cmds(ha,
3524 vha->req);
3525 if (rval != QLA_SUCCESS)
3526 goto failed;
3527
3528 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3529 qla2x00_alloc_offload_mem(vha);
3530
3531 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3532 qla2x00_alloc_fw_dump(vha);
3533
3534 } else {
3535 goto failed;
3536 }
3537 } else {
3538 ql_log(ql_log_fatal, vha, 0x00cd,
3539 "ISP Firmware failed checksum.\n");
3540 goto failed;
3541 }
3542 } else
3543 goto failed;
3544
3545 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3546
3547 spin_lock_irqsave(&ha->hardware_lock, flags);
3548 if (IS_QLA2300(ha))
3549
3550 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1);
3551 else
3552
3553 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7);
3554 RD_REG_WORD(®->hccr);
3555 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3556 }
3557
3558 if (IS_QLA27XX(ha))
3559 ha->flags.fac_supported = 1;
3560 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3561 uint32_t size;
3562
3563 rval = qla81xx_fac_get_sector_size(vha, &size);
3564 if (rval == QLA_SUCCESS) {
3565 ha->flags.fac_supported = 1;
3566 ha->fdt_block_size = size << 2;
3567 } else {
3568 ql_log(ql_log_warn, vha, 0x00ce,
3569 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3570 ha->fw_major_version, ha->fw_minor_version,
3571 ha->fw_subminor_version);
3572
3573 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3574 ha->flags.fac_supported = 0;
3575 rval = QLA_SUCCESS;
3576 }
3577 }
3578 }
3579failed:
3580 if (rval) {
3581 ql_log(ql_log_fatal, vha, 0x00cf,
3582 "Setup chip ****FAILED****.\n");
3583 }
3584
3585 return (rval);
3586}
3587
3588
3589
3590
3591
3592
3593
3594
3595
3596
3597void
3598qla2x00_init_response_q_entries(struct rsp_que *rsp)
3599{
3600 uint16_t cnt;
3601 response_t *pkt;
3602
3603 rsp->ring_ptr = rsp->ring;
3604 rsp->ring_index = 0;
3605 rsp->status_srb = NULL;
3606 pkt = rsp->ring_ptr;
3607 for (cnt = 0; cnt < rsp->length; cnt++) {
3608 pkt->signature = RESPONSE_PROCESSED;
3609 pkt++;
3610 }
3611}
3612
3613
3614
3615
3616
3617
3618
3619void
3620qla2x00_update_fw_options(scsi_qla_host_t *vha)
3621{
3622 uint16_t swing, emphasis, tx_sens, rx_sens;
3623 struct qla_hw_data *ha = vha->hw;
3624
3625 memset(ha->fw_options, 0, sizeof(ha->fw_options));
3626 qla2x00_get_fw_options(vha, ha->fw_options);
3627
3628 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3629 return;
3630
3631
3632 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3633 "Serial link options.\n");
3634 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3635 (uint8_t *)&ha->fw_seriallink_options,
3636 sizeof(ha->fw_seriallink_options));
3637
3638 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3639 if (ha->fw_seriallink_options[3] & BIT_2) {
3640 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3641
3642
3643 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3644 emphasis = (ha->fw_seriallink_options[2] &
3645 (BIT_4 | BIT_3)) >> 3;
3646 tx_sens = ha->fw_seriallink_options[0] &
3647 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3648 rx_sens = (ha->fw_seriallink_options[0] &
3649 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3650 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3651 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3652 if (rx_sens == 0x0)
3653 rx_sens = 0x3;
3654 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3655 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3656 ha->fw_options[10] |= BIT_5 |
3657 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3658 (tx_sens & (BIT_1 | BIT_0));
3659
3660
3661 swing = (ha->fw_seriallink_options[2] &
3662 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3663 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3664 tx_sens = ha->fw_seriallink_options[1] &
3665 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3666 rx_sens = (ha->fw_seriallink_options[1] &
3667 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3668 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3669 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3670 if (rx_sens == 0x0)
3671 rx_sens = 0x3;
3672 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3673 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3674 ha->fw_options[11] |= BIT_5 |
3675 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3676 (tx_sens & (BIT_1 | BIT_0));
3677 }
3678
3679
3680
3681 ha->fw_options[3] |= BIT_13;
3682
3683
3684 if (ha->flags.enable_led_scheme)
3685 ha->fw_options[2] |= BIT_12;
3686
3687
3688 if (IS_QLA6312(ha))
3689 ha->fw_options[2] |= BIT_13;
3690
3691
3692 if (ha->operating_mode == P2P) {
3693 ha->fw_options[2] |= BIT_3;
3694 ql_dbg(ql_dbg_disc, vha, 0x2100,
3695 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3696 __func__, ha->fw_options[2]);
3697 }
3698
3699
3700 if (ha->operating_mode == P2P) {
3701 ha->fw_options[2] |= BIT_3;
3702 ql_dbg(ql_dbg_disc, vha, 0x2100,
3703 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3704 __func__, ha->fw_options[2]);
3705 }
3706
3707
3708 qla2x00_set_fw_options(vha, ha->fw_options);
3709}
3710
3711void
3712qla24xx_update_fw_options(scsi_qla_host_t *vha)
3713{
3714 int rval;
3715 struct qla_hw_data *ha = vha->hw;
3716
3717 if (IS_P3P_TYPE(ha))
3718 return;
3719
3720
3721 if (ql2xfwholdabts)
3722 ha->fw_options[3] |= BIT_12;
3723
3724
3725 if (ha->operating_mode == P2P) {
3726 ha->fw_options[2] |= BIT_3;
3727 ql_dbg(ql_dbg_disc, vha, 0x2102,
3728 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3729 __func__, ha->fw_options[2]);
3730 }
3731
3732
3733 if (ha->operating_mode == P2P) {
3734 ha->fw_options[2] |= BIT_3;
3735 ql_dbg(ql_dbg_disc, vha, 0x2101,
3736 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3737 __func__, ha->fw_options[2]);
3738 }
3739
3740
3741 if (ql2xmvasynctoatio &&
3742 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) {
3743 if (qla_tgt_mode_enabled(vha) ||
3744 qla_dual_mode_enabled(vha))
3745 ha->fw_options[2] |= BIT_11;
3746 else
3747 ha->fw_options[2] &= ~BIT_11;
3748 }
3749
3750 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3751
3752
3753
3754
3755 if (qla_tgt_mode_enabled(vha) ||
3756 qla_dual_mode_enabled(vha))
3757 ha->fw_options[2] |= BIT_4;
3758 else
3759 ha->fw_options[2] &= ~BIT_4;
3760
3761
3762 if (qla2xuseresexchforels)
3763 ha->fw_options[2] |= BIT_8;
3764 else
3765 ha->fw_options[2] &= ~BIT_8;
3766 }
3767
3768 ql_dbg(ql_dbg_init, vha, 0x00e8,
3769 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3770 __func__, ha->fw_options[1], ha->fw_options[2],
3771 ha->fw_options[3], vha->host->active_mode);
3772
3773 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3774 qla2x00_set_fw_options(vha, ha->fw_options);
3775
3776
3777 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
3778 return;
3779
3780 rval = qla2x00_set_serdes_params(vha,
3781 le16_to_cpu(ha->fw_seriallink_options24[1]),
3782 le16_to_cpu(ha->fw_seriallink_options24[2]),
3783 le16_to_cpu(ha->fw_seriallink_options24[3]));
3784 if (rval != QLA_SUCCESS) {
3785 ql_log(ql_log_warn, vha, 0x0104,
3786 "Unable to update Serial Link options (%x).\n", rval);
3787 }
3788}
3789
3790void
3791qla2x00_config_rings(struct scsi_qla_host *vha)
3792{
3793 struct qla_hw_data *ha = vha->hw;
3794 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3795 struct req_que *req = ha->req_q_map[0];
3796 struct rsp_que *rsp = ha->rsp_q_map[0];
3797
3798
3799 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3800 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
3801 ha->init_cb->request_q_length = cpu_to_le16(req->length);
3802 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3803 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3804 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3805 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3806 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
3807
3808 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3809 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3810 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3811 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3812 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg));
3813}
3814
3815void
3816qla24xx_config_rings(struct scsi_qla_host *vha)
3817{
3818 struct qla_hw_data *ha = vha->hw;
3819 device_reg_t *reg = ISP_QUE_REG(ha, 0);
3820 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3821 struct qla_msix_entry *msix;
3822 struct init_cb_24xx *icb;
3823 uint16_t rid = 0;
3824 struct req_que *req = ha->req_q_map[0];
3825 struct rsp_que *rsp = ha->rsp_q_map[0];
3826
3827
3828 icb = (struct init_cb_24xx *)ha->init_cb;
3829 icb->request_q_outpointer = cpu_to_le16(0);
3830 icb->response_q_inpointer = cpu_to_le16(0);
3831 icb->request_q_length = cpu_to_le16(req->length);
3832 icb->response_q_length = cpu_to_le16(rsp->length);
3833 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3834 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3835 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3836 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
3837
3838
3839 icb->atio_q_inpointer = cpu_to_le16(0);
3840 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3841 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
3842 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
3843
3844 if (IS_SHADOW_REG_CAPABLE(ha))
3845 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
3846
3847 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3848 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3849 icb->rid = cpu_to_le16(rid);
3850 if (ha->flags.msix_enabled) {
3851 msix = &ha->msix_entries[1];
3852 ql_dbg(ql_dbg_init, vha, 0x0019,
3853 "Registering vector 0x%x for base que.\n",
3854 msix->entry);
3855 icb->msix = cpu_to_le16(msix->entry);
3856 }
3857
3858 if (MSB(rid))
3859 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
3860
3861 if (LSB(rid))
3862 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
3863
3864
3865 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
3866 (ha->flags.msix_enabled)) {
3867 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
3868 ha->flags.disable_msix_handshake = 1;
3869 ql_dbg(ql_dbg_init, vha, 0x00fe,
3870 "MSIX Handshake Disable Mode turned on.\n");
3871 } else {
3872 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
3873 }
3874 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
3875
3876 WRT_REG_DWORD(®->isp25mq.req_q_in, 0);
3877 WRT_REG_DWORD(®->isp25mq.req_q_out, 0);
3878 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0);
3879 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0);
3880 } else {
3881 WRT_REG_DWORD(®->isp24.req_q_in, 0);
3882 WRT_REG_DWORD(®->isp24.req_q_out, 0);
3883 WRT_REG_DWORD(®->isp24.rsp_q_in, 0);
3884 WRT_REG_DWORD(®->isp24.rsp_q_out, 0);
3885 }
3886 qlt_24xx_config_rings(vha);
3887
3888
3889 RD_REG_DWORD(&ioreg->hccr);
3890}
3891
3892
3893
3894
3895
3896
3897
3898
3899
3900
3901int
3902qla2x00_init_rings(scsi_qla_host_t *vha)
3903{
3904 int rval;
3905 unsigned long flags = 0;
3906 int cnt, que;
3907 struct qla_hw_data *ha = vha->hw;
3908 struct req_que *req;
3909 struct rsp_que *rsp;
3910 struct mid_init_cb_24xx *mid_init_cb =
3911 (struct mid_init_cb_24xx *) ha->init_cb;
3912
3913 spin_lock_irqsave(&ha->hardware_lock, flags);
3914
3915
3916 for (que = 0; que < ha->max_req_queues; que++) {
3917 req = ha->req_q_map[que];
3918 if (!req || !test_bit(que, ha->req_qid_map))
3919 continue;
3920 req->out_ptr = (void *)(req->ring + req->length);
3921 *req->out_ptr = 0;
3922 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
3923 req->outstanding_cmds[cnt] = NULL;
3924
3925 req->current_outstanding_cmd = 1;
3926
3927
3928 req->ring_ptr = req->ring;
3929 req->ring_index = 0;
3930 req->cnt = req->length;
3931 }
3932
3933 for (que = 0; que < ha->max_rsp_queues; que++) {
3934 rsp = ha->rsp_q_map[que];
3935 if (!rsp || !test_bit(que, ha->rsp_qid_map))
3936 continue;
3937 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
3938 *rsp->in_ptr = 0;
3939
3940 if (IS_QLAFX00(ha))
3941 qlafx00_init_response_q_entries(rsp);
3942 else
3943 qla2x00_init_response_q_entries(rsp);
3944 }
3945
3946 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
3947 ha->tgt.atio_ring_index = 0;
3948
3949 qlt_init_atio_q_entries(vha);
3950
3951 ha->isp_ops->config_rings(vha);
3952
3953 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3954
3955 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
3956
3957 if (IS_QLAFX00(ha)) {
3958 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
3959 goto next_check;
3960 }
3961
3962
3963 ha->isp_ops->update_fw_options(vha);
3964
3965 if (ha->flags.npiv_supported) {
3966 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
3967 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
3968 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
3969 }
3970
3971 if (IS_FWI2_CAPABLE(ha)) {
3972 mid_init_cb->options = cpu_to_le16(BIT_1);
3973 mid_init_cb->init_cb.execution_throttle =
3974 cpu_to_le16(ha->cur_fw_xcb_count);
3975 ha->flags.dport_enabled =
3976 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
3977 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
3978 (ha->flags.dport_enabled) ? "enabled" : "disabled");
3979
3980 ha->flags.fawwpn_enabled =
3981 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
3982 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
3983 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
3984 }
3985
3986 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
3987next_check:
3988 if (rval) {
3989 ql_log(ql_log_fatal, vha, 0x00d2,
3990 "Init Firmware **** FAILED ****.\n");
3991 } else {
3992 ql_dbg(ql_dbg_init, vha, 0x00d3,
3993 "Init Firmware -- success.\n");
3994 QLA_FW_STARTED(ha);
3995 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
3996 }
3997
3998 return (rval);
3999}
4000
4001
4002
4003
4004
4005
4006
4007static int
4008qla2x00_fw_ready(scsi_qla_host_t *vha)
4009{
4010 int rval;
4011 unsigned long wtime, mtime, cs84xx_time;
4012 uint16_t min_wait;
4013 uint16_t wait_time;
4014 uint16_t state[6];
4015 struct qla_hw_data *ha = vha->hw;
4016
4017 if (IS_QLAFX00(vha->hw))
4018 return qlafx00_fw_ready(vha);
4019
4020 rval = QLA_SUCCESS;
4021
4022
4023 if (IS_P3P_TYPE(ha))
4024 min_wait = 30;
4025 else
4026 min_wait = 20;
4027
4028
4029
4030
4031
4032 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4033 wait_time = min_wait;
4034 }
4035
4036
4037 mtime = jiffies + (min_wait * HZ);
4038
4039
4040 wtime = jiffies + (wait_time * HZ);
4041
4042
4043 if (!vha->flags.init_done)
4044 ql_log(ql_log_info, vha, 0x801e,
4045 "Waiting for LIP to complete.\n");
4046
4047 do {
4048 memset(state, -1, sizeof(state));
4049 rval = qla2x00_get_firmware_state(vha, state);
4050 if (rval == QLA_SUCCESS) {
4051 if (state[0] < FSTATE_LOSS_OF_SYNC) {
4052 vha->device_flags &= ~DFLG_NO_CABLE;
4053 }
4054 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4055 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4056 "fw_state=%x 84xx=%x.\n", state[0],
4057 state[2]);
4058 if ((state[2] & FSTATE_LOGGED_IN) &&
4059 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4060 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4061 "Sending verify iocb.\n");
4062
4063 cs84xx_time = jiffies;
4064 rval = qla84xx_init_chip(vha);
4065 if (rval != QLA_SUCCESS) {
4066 ql_log(ql_log_warn,
4067 vha, 0x8007,
4068 "Init chip failed.\n");
4069 break;
4070 }
4071
4072
4073 cs84xx_time = jiffies - cs84xx_time;
4074 wtime += cs84xx_time;
4075 mtime += cs84xx_time;
4076 ql_dbg(ql_dbg_taskm, vha, 0x8008,
4077 "Increasing wait time by %ld. "
4078 "New time %ld.\n", cs84xx_time,
4079 wtime);
4080 }
4081 } else if (state[0] == FSTATE_READY) {
4082 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4083 "F/W Ready - OK.\n");
4084
4085 qla2x00_get_retry_cnt(vha, &ha->retry_count,
4086 &ha->login_timeout, &ha->r_a_tov);
4087
4088 rval = QLA_SUCCESS;
4089 break;
4090 }
4091
4092 rval = QLA_FUNCTION_FAILED;
4093
4094 if (atomic_read(&vha->loop_down_timer) &&
4095 state[0] != FSTATE_READY) {
4096
4097
4098
4099 if (time_after_eq(jiffies, mtime)) {
4100 ql_log(ql_log_info, vha, 0x8038,
4101 "Cable is unplugged...\n");
4102
4103 vha->device_flags |= DFLG_NO_CABLE;
4104 break;
4105 }
4106 }
4107 } else {
4108
4109 if (time_after_eq(jiffies, mtime) ||
4110 ha->flags.isp82xx_fw_hung)
4111 break;
4112 }
4113
4114 if (time_after_eq(jiffies, wtime))
4115 break;
4116
4117
4118 msleep(500);
4119 } while (1);
4120
4121 ql_dbg(ql_dbg_taskm, vha, 0x803a,
4122 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4123 state[1], state[2], state[3], state[4], state[5], jiffies);
4124
4125 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4126 ql_log(ql_log_warn, vha, 0x803b,
4127 "Firmware ready **** FAILED ****.\n");
4128 }
4129
4130 return (rval);
4131}
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142
4143
4144
4145
4146static int
4147qla2x00_configure_hba(scsi_qla_host_t *vha)
4148{
4149 int rval;
4150 uint16_t loop_id;
4151 uint16_t topo;
4152 uint16_t sw_cap;
4153 uint8_t al_pa;
4154 uint8_t area;
4155 uint8_t domain;
4156 char connect_type[22];
4157 struct qla_hw_data *ha = vha->hw;
4158 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4159 port_id_t id;
4160 unsigned long flags;
4161
4162
4163 rval = qla2x00_get_adapter_id(vha,
4164 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
4165 if (rval != QLA_SUCCESS) {
4166 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
4167 IS_CNA_CAPABLE(ha) ||
4168 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
4169 ql_dbg(ql_dbg_disc, vha, 0x2008,
4170 "Loop is in a transition state.\n");
4171 } else {
4172 ql_log(ql_log_warn, vha, 0x2009,
4173 "Unable to get host loop ID.\n");
4174 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4175 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4176 ql_log(ql_log_warn, vha, 0x1151,
4177 "Doing link init.\n");
4178 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4179 return rval;
4180 }
4181 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4182 }
4183 return (rval);
4184 }
4185
4186 if (topo == 4) {
4187 ql_log(ql_log_info, vha, 0x200a,
4188 "Cannot get topology - retrying.\n");
4189 return (QLA_FUNCTION_FAILED);
4190 }
4191
4192 vha->loop_id = loop_id;
4193
4194
4195 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4196 ha->operating_mode = LOOP;
4197 ha->switch_cap = 0;
4198
4199 switch (topo) {
4200 case 0:
4201 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4202 ha->current_topology = ISP_CFG_NL;
4203 strcpy(connect_type, "(Loop)");
4204 break;
4205
4206 case 1:
4207 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4208 ha->switch_cap = sw_cap;
4209 ha->current_topology = ISP_CFG_FL;
4210 strcpy(connect_type, "(FL_Port)");
4211 break;
4212
4213 case 2:
4214 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4215 ha->operating_mode = P2P;
4216 ha->current_topology = ISP_CFG_N;
4217 strcpy(connect_type, "(N_Port-to-N_Port)");
4218 break;
4219
4220 case 3:
4221 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4222 ha->switch_cap = sw_cap;
4223 ha->operating_mode = P2P;
4224 ha->current_topology = ISP_CFG_F;
4225 strcpy(connect_type, "(F_Port)");
4226 break;
4227
4228 default:
4229 ql_dbg(ql_dbg_disc, vha, 0x200f,
4230 "HBA in unknown topology %x, using NL.\n", topo);
4231 ha->current_topology = ISP_CFG_NL;
4232 strcpy(connect_type, "(Loop)");
4233 break;
4234 }
4235
4236
4237
4238 id.b.domain = domain;
4239 id.b.area = area;
4240 id.b.al_pa = al_pa;
4241 id.b.rsvd_1 = 0;
4242 spin_lock_irqsave(&ha->hardware_lock, flags);
4243 if (!(topo == 2 && ha->flags.n2n_bigger))
4244 qlt_update_host_map(vha, id);
4245 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4246
4247 if (!vha->flags.init_done)
4248 ql_log(ql_log_info, vha, 0x2010,
4249 "Topology - %s, Host Loop address 0x%x.\n",
4250 connect_type, vha->loop_id);
4251
4252 return(rval);
4253}
4254
4255inline void
4256qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4257 char *def)
4258{
4259 char *st, *en;
4260 uint16_t index;
4261 struct qla_hw_data *ha = vha->hw;
4262 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4263 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4264
4265 if (memcmp(model, BINZERO, len) != 0) {
4266 strncpy(ha->model_number, model, len);
4267 st = en = ha->model_number;
4268 en += len - 1;
4269 while (en > st) {
4270 if (*en != 0x20 && *en != 0x00)
4271 break;
4272 *en-- = '\0';
4273 }
4274
4275 index = (ha->pdev->subsystem_device & 0xff);
4276 if (use_tbl &&
4277 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4278 index < QLA_MODEL_NAMES)
4279 strncpy(ha->model_desc,
4280 qla2x00_model_name[index * 2 + 1],
4281 sizeof(ha->model_desc) - 1);
4282 } else {
4283 index = (ha->pdev->subsystem_device & 0xff);
4284 if (use_tbl &&
4285 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4286 index < QLA_MODEL_NAMES) {
4287 strcpy(ha->model_number,
4288 qla2x00_model_name[index * 2]);
4289 strncpy(ha->model_desc,
4290 qla2x00_model_name[index * 2 + 1],
4291 sizeof(ha->model_desc) - 1);
4292 } else {
4293 strcpy(ha->model_number, def);
4294 }
4295 }
4296 if (IS_FWI2_CAPABLE(ha))
4297 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4298 sizeof(ha->model_desc));
4299}
4300
4301
4302
4303
4304static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4305{
4306#ifdef CONFIG_SPARC
4307 struct qla_hw_data *ha = vha->hw;
4308 struct pci_dev *pdev = ha->pdev;
4309 struct device_node *dp = pci_device_to_OF_node(pdev);
4310 const u8 *val;
4311 int len;
4312
4313 val = of_get_property(dp, "port-wwn", &len);
4314 if (val && len >= WWN_SIZE)
4315 memcpy(nv->port_name, val, WWN_SIZE);
4316
4317 val = of_get_property(dp, "node-wwn", &len);
4318 if (val && len >= WWN_SIZE)
4319 memcpy(nv->node_name, val, WWN_SIZE);
4320#endif
4321}
4322
4323
4324
4325
4326
4327
4328
4329
4330
4331
4332
4333
4334
4335
4336int
4337qla2x00_nvram_config(scsi_qla_host_t *vha)
4338{
4339 int rval;
4340 uint8_t chksum = 0;
4341 uint16_t cnt;
4342 uint8_t *dptr1, *dptr2;
4343 struct qla_hw_data *ha = vha->hw;
4344 init_cb_t *icb = ha->init_cb;
4345 nvram_t *nv = ha->nvram;
4346 uint8_t *ptr = ha->nvram;
4347 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4348
4349 rval = QLA_SUCCESS;
4350
4351
4352 ha->nvram_size = sizeof(nvram_t);
4353 ha->nvram_base = 0;
4354 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4355 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1)
4356 ha->nvram_base = 0x80;
4357
4358
4359 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4360 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4361 chksum += *ptr++;
4362
4363 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4364 "Contents of NVRAM.\n");
4365 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4366 (uint8_t *)nv, ha->nvram_size);
4367
4368
4369 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
4370 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
4371
4372 ql_log(ql_log_warn, vha, 0x0064,
4373 "Inconsistent NVRAM "
4374 "detected: checksum=0x%x id=%c version=0x%x.\n",
4375 chksum, nv->id[0], nv->nvram_version);
4376 ql_log(ql_log_warn, vha, 0x0065,
4377 "Falling back to "
4378 "functioning (yet invalid -- WWPN) defaults.\n");
4379
4380
4381
4382
4383 memset(nv, 0, ha->nvram_size);
4384 nv->parameter_block_version = ICB_VERSION;
4385
4386 if (IS_QLA23XX(ha)) {
4387 nv->firmware_options[0] = BIT_2 | BIT_1;
4388 nv->firmware_options[1] = BIT_7 | BIT_5;
4389 nv->add_firmware_options[0] = BIT_5;
4390 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4391 nv->frame_payload_size = 2048;
4392 nv->special_options[1] = BIT_7;
4393 } else if (IS_QLA2200(ha)) {
4394 nv->firmware_options[0] = BIT_2 | BIT_1;
4395 nv->firmware_options[1] = BIT_7 | BIT_5;
4396 nv->add_firmware_options[0] = BIT_5;
4397 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4398 nv->frame_payload_size = 1024;
4399 } else if (IS_QLA2100(ha)) {
4400 nv->firmware_options[0] = BIT_3 | BIT_1;
4401 nv->firmware_options[1] = BIT_5;
4402 nv->frame_payload_size = 1024;
4403 }
4404
4405 nv->max_iocb_allocation = cpu_to_le16(256);
4406 nv->execution_throttle = cpu_to_le16(16);
4407 nv->retry_count = 8;
4408 nv->retry_delay = 1;
4409
4410 nv->port_name[0] = 33;
4411 nv->port_name[3] = 224;
4412 nv->port_name[4] = 139;
4413
4414 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4415
4416 nv->login_timeout = 4;
4417
4418
4419
4420
4421 nv->host_p[1] = BIT_2;
4422 nv->reset_delay = 5;
4423 nv->port_down_retry_count = 8;
4424 nv->max_luns_per_target = cpu_to_le16(8);
4425 nv->link_down_timeout = 60;
4426
4427 rval = 1;
4428 }
4429
4430#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
4431
4432
4433
4434
4435
4436
4437 if (ia64_platform_is("sn2")) {
4438 nv->frame_payload_size = 2048;
4439 if (IS_QLA23XX(ha))
4440 nv->special_options[1] = BIT_7;
4441 }
4442#endif
4443
4444
4445 memset(icb, 0, ha->init_cb_size);
4446
4447
4448
4449
4450 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4451 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4452 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4453 nv->firmware_options[1] &= ~BIT_4;
4454
4455 if (IS_QLA23XX(ha)) {
4456 nv->firmware_options[0] |= BIT_2;
4457 nv->firmware_options[0] &= ~BIT_3;
4458 nv->special_options[0] &= ~BIT_6;
4459 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4460
4461 if (IS_QLA2300(ha)) {
4462 if (ha->fb_rev == FPM_2310) {
4463 strcpy(ha->model_number, "QLA2310");
4464 } else {
4465 strcpy(ha->model_number, "QLA2300");
4466 }
4467 } else {
4468 qla2x00_set_model_info(vha, nv->model_number,
4469 sizeof(nv->model_number), "QLA23xx");
4470 }
4471 } else if (IS_QLA2200(ha)) {
4472 nv->firmware_options[0] |= BIT_2;
4473
4474
4475
4476
4477 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4478 (BIT_5 | BIT_4)) {
4479
4480 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4481 nv->add_firmware_options[0] |= BIT_5;
4482 }
4483 strcpy(ha->model_number, "QLA22xx");
4484 } else {
4485 strcpy(ha->model_number, "QLA2100");
4486 }
4487
4488
4489
4490
4491 dptr1 = (uint8_t *)icb;
4492 dptr2 = (uint8_t *)&nv->parameter_block_version;
4493 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4494 while (cnt--)
4495 *dptr1++ = *dptr2++;
4496
4497
4498 dptr1 = (uint8_t *)icb->add_firmware_options;
4499 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4500 while (cnt--)
4501 *dptr1++ = *dptr2++;
4502 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
4503
4504 if (nv->host_p[1] & BIT_7) {
4505 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4506 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4507 }
4508
4509
4510 if ((icb->firmware_options[1] & BIT_6) == 0) {
4511
4512
4513
4514
4515 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4516 icb->node_name[0] &= 0xF0;
4517 }
4518
4519
4520
4521
4522
4523
4524
4525
4526
4527 if (nv->host_p[0] & BIT_7)
4528 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4529 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4530
4531 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4532 ha->flags.disable_risc_code_load = 0;
4533 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4534 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4535 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4536 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4537 ha->flags.disable_serdes = 0;
4538
4539 ha->operating_mode =
4540 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4541
4542 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4543 sizeof(ha->fw_seriallink_options));
4544
4545
4546 ha->serial0 = icb->port_name[5];
4547 ha->serial1 = icb->port_name[6];
4548 ha->serial2 = icb->port_name[7];
4549 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4550 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4551
4552 icb->execution_throttle = cpu_to_le16(0xFFFF);
4553
4554 ha->retry_count = nv->retry_count;
4555
4556
4557 if (nv->login_timeout != ql2xlogintimeout)
4558 nv->login_timeout = ql2xlogintimeout;
4559 if (nv->login_timeout < 4)
4560 nv->login_timeout = 4;
4561 ha->login_timeout = nv->login_timeout;
4562
4563
4564 ha->r_a_tov = 100;
4565
4566 ha->loop_reset_delay = nv->reset_delay;
4567
4568
4569
4570
4571
4572
4573
4574
4575
4576
4577
4578 if (nv->link_down_timeout == 0) {
4579 ha->loop_down_abort_time =
4580 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4581 } else {
4582 ha->link_down_timeout = nv->link_down_timeout;
4583 ha->loop_down_abort_time =
4584 (LOOP_DOWN_TIME - ha->link_down_timeout);
4585 }
4586
4587
4588
4589
4590 ha->port_down_retry_count = nv->port_down_retry_count;
4591 if (qlport_down_retry)
4592 ha->port_down_retry_count = qlport_down_retry;
4593
4594 ha->login_retry_count = nv->retry_count;
4595 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4596 ha->port_down_retry_count > 3)
4597 ha->login_retry_count = ha->port_down_retry_count;
4598 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4599 ha->login_retry_count = ha->port_down_retry_count;
4600 if (ql2xloginretrycount)
4601 ha->login_retry_count = ql2xloginretrycount;
4602
4603 icb->lun_enables = cpu_to_le16(0);
4604 icb->command_resource_count = 0;
4605 icb->immediate_notify_resource_count = 0;
4606 icb->timeout = cpu_to_le16(0);
4607
4608 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4609
4610 icb->firmware_options[0] &= ~BIT_3;
4611 icb->add_firmware_options[0] &=
4612 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4613 icb->add_firmware_options[0] |= BIT_2;
4614 icb->response_accumulation_timer = 3;
4615 icb->interrupt_delay_timer = 5;
4616
4617 vha->flags.process_response_queue = 1;
4618 } else {
4619
4620 if (!vha->flags.init_done) {
4621 ha->zio_mode = icb->add_firmware_options[0] &
4622 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4623 ha->zio_timer = icb->interrupt_delay_timer ?
4624 icb->interrupt_delay_timer: 2;
4625 }
4626 icb->add_firmware_options[0] &=
4627 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4628 vha->flags.process_response_queue = 0;
4629 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4630 ha->zio_mode = QLA_ZIO_MODE_6;
4631
4632 ql_log(ql_log_info, vha, 0x0068,
4633 "ZIO mode %d enabled; timer delay (%d us).\n",
4634 ha->zio_mode, ha->zio_timer * 100);
4635
4636 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4637 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
4638 vha->flags.process_response_queue = 1;
4639 }
4640 }
4641
4642 if (rval) {
4643 ql_log(ql_log_warn, vha, 0x0069,
4644 "NVRAM configuration failed.\n");
4645 }
4646 return (rval);
4647}
4648
4649static void
4650qla2x00_rport_del(void *data)
4651{
4652 fc_port_t *fcport = data;
4653 struct fc_rport *rport;
4654 unsigned long flags;
4655
4656 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
4657 rport = fcport->drport ? fcport->drport: fcport->rport;
4658 fcport->drport = NULL;
4659 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
4660 if (rport) {
4661 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4662 "%s %8phN. rport %p roles %x\n",
4663 __func__, fcport->port_name, rport,
4664 rport->roles);
4665
4666 fc_remote_port_delete(rport);
4667 }
4668}
4669
4670
4671
4672
4673
4674
4675
4676
4677fc_port_t *
4678qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
4679{
4680 fc_port_t *fcport;
4681
4682 fcport = kzalloc(sizeof(fc_port_t), flags);
4683 if (!fcport)
4684 return NULL;
4685
4686
4687 fcport->vha = vha;
4688 fcport->port_type = FCT_UNKNOWN;
4689 fcport->loop_id = FC_NO_LOOP_ID;
4690 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
4691 fcport->supported_classes = FC_COS_UNSPECIFIED;
4692 fcport->fp_speed = PORT_SPEED_UNKNOWN;
4693
4694 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4695 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
4696 flags);
4697 fcport->disc_state = DSC_DELETED;
4698 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4699 fcport->deleted = QLA_SESS_DELETED;
4700 fcport->login_retry = vha->hw->login_retry_count;
4701 fcport->logout_on_delete = 1;
4702
4703 if (!fcport->ct_desc.ct_sns) {
4704 ql_log(ql_log_warn, vha, 0xd049,
4705 "Failed to allocate ct_sns request.\n");
4706 kfree(fcport);
4707 fcport = NULL;
4708 }
4709 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
4710 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
4711 INIT_LIST_HEAD(&fcport->gnl_entry);
4712 INIT_LIST_HEAD(&fcport->list);
4713
4714 return fcport;
4715}
4716
4717void
4718qla2x00_free_fcport(fc_port_t *fcport)
4719{
4720 if (fcport->ct_desc.ct_sns) {
4721 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4722 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4723 fcport->ct_desc.ct_sns_dma);
4724
4725 fcport->ct_desc.ct_sns = NULL;
4726 }
4727 kfree(fcport);
4728}
4729
4730
4731
4732
4733
4734
4735
4736
4737
4738
4739
4740
4741
4742static int
4743qla2x00_configure_loop(scsi_qla_host_t *vha)
4744{
4745 int rval;
4746 unsigned long flags, save_flags;
4747 struct qla_hw_data *ha = vha->hw;
4748 rval = QLA_SUCCESS;
4749
4750
4751 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4752 rval = qla2x00_configure_hba(vha);
4753 if (rval != QLA_SUCCESS) {
4754 ql_dbg(ql_dbg_disc, vha, 0x2013,
4755 "Unable to configure HBA.\n");
4756 return (rval);
4757 }
4758 }
4759
4760 save_flags = flags = vha->dpc_flags;
4761 ql_dbg(ql_dbg_disc, vha, 0x2014,
4762 "Configure loop -- dpc flags = 0x%lx.\n", flags);
4763
4764
4765
4766
4767
4768 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4769 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
4770
4771 qla2x00_get_data_rate(vha);
4772
4773
4774 if (ha->current_topology == ISP_CFG_FL &&
4775 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4776
4777 set_bit(RSCN_UPDATE, &flags);
4778
4779 } else if (ha->current_topology == ISP_CFG_F &&
4780 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4781
4782 set_bit(RSCN_UPDATE, &flags);
4783 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4784
4785 } else if (ha->current_topology == ISP_CFG_N) {
4786 clear_bit(RSCN_UPDATE, &flags);
4787 if (qla_tgt_mode_enabled(vha)) {
4788
4789 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4790 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4791 }
4792 } else if (ha->current_topology == ISP_CFG_NL) {
4793 clear_bit(RSCN_UPDATE, &flags);
4794 set_bit(LOCAL_LOOP_UPDATE, &flags);
4795 } else if (!vha->flags.online ||
4796 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
4797 set_bit(RSCN_UPDATE, &flags);
4798 set_bit(LOCAL_LOOP_UPDATE, &flags);
4799 }
4800
4801 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
4802 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4803 ql_dbg(ql_dbg_disc, vha, 0x2015,
4804 "Loop resync needed, failing.\n");
4805 rval = QLA_FUNCTION_FAILED;
4806 } else
4807 rval = qla2x00_configure_local_loop(vha);
4808 }
4809
4810 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
4811 if (LOOP_TRANSITION(vha)) {
4812 ql_dbg(ql_dbg_disc, vha, 0x2099,
4813 "Needs RSCN update and loop transition.\n");
4814 rval = QLA_FUNCTION_FAILED;
4815 }
4816 else
4817 rval = qla2x00_configure_fabric(vha);
4818 }
4819
4820 if (rval == QLA_SUCCESS) {
4821 if (atomic_read(&vha->loop_down_timer) ||
4822 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4823 rval = QLA_FUNCTION_FAILED;
4824 } else {
4825 atomic_set(&vha->loop_state, LOOP_READY);
4826 ql_dbg(ql_dbg_disc, vha, 0x2069,
4827 "LOOP READY.\n");
4828 ha->flags.fw_init_done = 1;
4829
4830
4831
4832
4833
4834 if (qla_tgt_mode_enabled(vha) ||
4835 qla_dual_mode_enabled(vha)) {
4836 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
4837 qlt_24xx_process_atio_queue(vha, 0);
4838 spin_unlock_irqrestore(&ha->tgt.atio_lock,
4839 flags);
4840 }
4841 }
4842 }
4843
4844 if (rval) {
4845 ql_dbg(ql_dbg_disc, vha, 0x206a,
4846 "%s *** FAILED ***.\n", __func__);
4847 } else {
4848 ql_dbg(ql_dbg_disc, vha, 0x206b,
4849 "%s: exiting normally.\n", __func__);
4850 }
4851
4852
4853 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4854 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
4855 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4856 if (test_bit(RSCN_UPDATE, &save_flags)) {
4857 set_bit(RSCN_UPDATE, &vha->dpc_flags);
4858 }
4859 }
4860
4861 return (rval);
4862}
4863
4864
4865
4866
4867
4868
4869
4870
4871
4872
4873
4874static int
4875qla2x00_configure_local_loop(scsi_qla_host_t *vha)
4876{
4877 int rval, rval2;
4878 int found_devs;
4879 int found;
4880 fc_port_t *fcport, *new_fcport;
4881
4882 uint16_t index;
4883 uint16_t entries;
4884 char *id_iter;
4885 uint16_t loop_id;
4886 uint8_t domain, area, al_pa;
4887 struct qla_hw_data *ha = vha->hw;
4888 unsigned long flags;
4889
4890
4891 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
4892
4893 u32 *bp, i, sz;
4894
4895 memset(ha->init_cb, 0, ha->init_cb_size);
4896 sz = min_t(int, sizeof(struct els_plogi_payload),
4897 ha->init_cb_size);
4898 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
4899 (void *)ha->init_cb, sz);
4900 if (rval == QLA_SUCCESS) {
4901 bp = (uint32_t *)ha->init_cb;
4902 for (i = 0; i < sz/4 ; i++, bp++)
4903 *bp = cpu_to_be32(*bp);
4904
4905 memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb,
4906 sizeof(ha->plogi_els_payld.data));
4907 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4908 } else {
4909 ql_dbg(ql_dbg_init, vha, 0x00d1,
4910 "PLOGI ELS param read fail.\n");
4911 }
4912 return QLA_SUCCESS;
4913 }
4914
4915 found_devs = 0;
4916 new_fcport = NULL;
4917 entries = MAX_FIBRE_DEVICES_LOOP;
4918
4919
4920 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
4921 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
4922 &entries);
4923 if (rval != QLA_SUCCESS)
4924 goto cleanup_allocation;
4925
4926 ql_dbg(ql_dbg_disc, vha, 0x2011,
4927 "Entries in ID list (%d).\n", entries);
4928 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
4929 (uint8_t *)ha->gid_list,
4930 entries * sizeof(struct gid_list_info));
4931
4932 if (entries == 0) {
4933 spin_lock_irqsave(&vha->work_lock, flags);
4934 vha->scan.scan_retry++;
4935 spin_unlock_irqrestore(&vha->work_lock, flags);
4936
4937 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
4938 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4939 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4940 }
4941 } else {
4942 vha->scan.scan_retry = 0;
4943 }
4944
4945 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4946 fcport->scan_state = QLA_FCPORT_SCAN;
4947 }
4948
4949
4950 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4951 if (new_fcport == NULL) {
4952 ql_log(ql_log_warn, vha, 0x2012,
4953 "Memory allocation failed for fcport.\n");
4954 rval = QLA_MEMORY_ALLOC_FAILED;
4955 goto cleanup_allocation;
4956 }
4957 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
4958
4959
4960 id_iter = (char *)ha->gid_list;
4961 for (index = 0; index < entries; index++) {
4962 domain = ((struct gid_list_info *)id_iter)->domain;
4963 area = ((struct gid_list_info *)id_iter)->area;
4964 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
4965 if (IS_QLA2100(ha) || IS_QLA2200(ha))
4966 loop_id = (uint16_t)
4967 ((struct gid_list_info *)id_iter)->loop_id_2100;
4968 else
4969 loop_id = le16_to_cpu(
4970 ((struct gid_list_info *)id_iter)->loop_id);
4971 id_iter += ha->gid_list_info_size;
4972
4973
4974 if ((domain & 0xf0) == 0xf0)
4975 continue;
4976
4977
4978 if (area && domain &&
4979 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
4980 continue;
4981
4982
4983 if (loop_id > LAST_LOCAL_LOOP_ID)
4984 continue;
4985
4986 memset(new_fcport->port_name, 0, WWN_SIZE);
4987
4988
4989 new_fcport->d_id.b.domain = domain;
4990 new_fcport->d_id.b.area = area;
4991 new_fcport->d_id.b.al_pa = al_pa;
4992 new_fcport->loop_id = loop_id;
4993 new_fcport->scan_state = QLA_FCPORT_FOUND;
4994
4995 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
4996 if (rval2 != QLA_SUCCESS) {
4997 ql_dbg(ql_dbg_disc, vha, 0x2097,
4998 "Failed to retrieve fcport information "
4999 "-- get_port_database=%x, loop_id=0x%04x.\n",
5000 rval2, new_fcport->loop_id);
5001
5002 if (ha->current_topology != ISP_CFG_N) {
5003 ql_dbg(ql_dbg_disc, vha, 0x2105,
5004 "Scheduling resync.\n");
5005 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5006 continue;
5007 }
5008 }
5009
5010 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5011
5012 found = 0;
5013 fcport = NULL;
5014 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5015 if (memcmp(new_fcport->port_name, fcport->port_name,
5016 WWN_SIZE))
5017 continue;
5018
5019 fcport->flags &= ~FCF_FABRIC_DEVICE;
5020 fcport->loop_id = new_fcport->loop_id;
5021 fcport->port_type = new_fcport->port_type;
5022 fcport->d_id.b24 = new_fcport->d_id.b24;
5023 memcpy(fcport->node_name, new_fcport->node_name,
5024 WWN_SIZE);
5025 fcport->scan_state = QLA_FCPORT_FOUND;
5026 found++;
5027 break;
5028 }
5029
5030 if (!found) {
5031
5032 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5033
5034
5035 fcport = new_fcport;
5036
5037 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5038
5039 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5040
5041 if (new_fcport == NULL) {
5042 ql_log(ql_log_warn, vha, 0xd031,
5043 "Failed to allocate memory for fcport.\n");
5044 rval = QLA_MEMORY_ALLOC_FAILED;
5045 goto cleanup_allocation;
5046 }
5047 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5048 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5049 }
5050
5051 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5052
5053
5054 fcport->fp_speed = ha->link_data_rate;
5055
5056 found_devs++;
5057 }
5058
5059 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5060 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5061 break;
5062
5063 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5064 if ((qla_dual_mode_enabled(vha) ||
5065 qla_ini_mode_enabled(vha)) &&
5066 atomic_read(&fcport->state) == FCS_ONLINE) {
5067 qla2x00_mark_device_lost(vha, fcport,
5068 ql2xplogiabsentdevice, 0);
5069 if (fcport->loop_id != FC_NO_LOOP_ID &&
5070 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5071 fcport->port_type != FCT_INITIATOR &&
5072 fcport->port_type != FCT_BROADCAST) {
5073 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5074 "%s %d %8phC post del sess\n",
5075 __func__, __LINE__,
5076 fcport->port_name);
5077
5078 qlt_schedule_sess_for_deletion(fcport);
5079 continue;
5080 }
5081 }
5082 }
5083
5084 if (fcport->scan_state == QLA_FCPORT_FOUND)
5085 qla24xx_fcport_handle_login(vha, fcport);
5086 }
5087
5088cleanup_allocation:
5089 kfree(new_fcport);
5090
5091 if (rval != QLA_SUCCESS) {
5092 ql_dbg(ql_dbg_disc, vha, 0x2098,
5093 "Configure local loop error exit: rval=%x.\n", rval);
5094 }
5095
5096 return (rval);
5097}
5098
5099static void
5100qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5101{
5102 int rval;
5103 uint16_t mb[MAILBOX_REGISTER_COUNT];
5104 struct qla_hw_data *ha = vha->hw;
5105
5106 if (!IS_IIDMA_CAPABLE(ha))
5107 return;
5108
5109 if (atomic_read(&fcport->state) != FCS_ONLINE)
5110 return;
5111
5112 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5113 fcport->fp_speed > ha->link_data_rate ||
5114 !ha->flags.gpsc_supported)
5115 return;
5116
5117 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5118 mb);
5119 if (rval != QLA_SUCCESS) {
5120 ql_dbg(ql_dbg_disc, vha, 0x2004,
5121 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5122 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5123 } else {
5124 ql_dbg(ql_dbg_disc, vha, 0x2005,
5125 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
5126 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5127 fcport->fp_speed, fcport->port_name);
5128 }
5129}
5130
5131void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5132{
5133 qla2x00_iidma_fcport(vha, fcport);
5134 qla24xx_update_fcport_fcp_prio(vha, fcport);
5135}
5136
5137int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5138{
5139 struct qla_work_evt *e;
5140
5141 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5142 if (!e)
5143 return QLA_FUNCTION_FAILED;
5144
5145 e->u.fcport.fcport = fcport;
5146 return qla2x00_post_work(vha, e);
5147}
5148
5149
5150static void
5151qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5152{
5153 struct fc_rport_identifiers rport_ids;
5154 struct fc_rport *rport;
5155 unsigned long flags;
5156
5157 if (atomic_read(&fcport->state) == FCS_ONLINE)
5158 return;
5159
5160 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5161 rport_ids.port_name = wwn_to_u64(fcport->port_name);
5162 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5163 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5164 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5165 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5166 if (!rport) {
5167 ql_log(ql_log_warn, vha, 0x2006,
5168 "Unable to allocate fc remote port.\n");
5169 return;
5170 }
5171
5172 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5173 *((fc_port_t **)rport->dd_data) = fcport;
5174 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5175
5176 rport->supported_classes = fcport->supported_classes;
5177
5178 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5179 if (fcport->port_type == FCT_INITIATOR)
5180 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
5181 if (fcport->port_type == FCT_TARGET)
5182 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
5183
5184 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5185 "%s %8phN. rport %p is %s mode\n",
5186 __func__, fcport->port_name, rport,
5187 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini");
5188
5189 fc_remote_port_rolechg(rport, rport_ids.roles);
5190}
5191
5192
5193
5194
5195
5196
5197
5198
5199
5200
5201
5202
5203
5204
5205
5206
5207void
5208qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5209{
5210 if (IS_SW_RESV_ADDR(fcport->d_id))
5211 return;
5212
5213 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5214 __func__, fcport->port_name);
5215
5216 fcport->disc_state = DSC_UPD_FCPORT;
5217 fcport->login_retry = vha->hw->login_retry_count;
5218 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5219 fcport->deleted = 0;
5220 fcport->logout_on_delete = 1;
5221 fcport->login_retry = vha->hw->login_retry_count;
5222 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5223
5224 switch (vha->hw->current_topology) {
5225 case ISP_CFG_N:
5226 case ISP_CFG_NL:
5227 fcport->keep_nport_handle = 1;
5228 break;
5229 default:
5230 break;
5231 }
5232
5233 qla2x00_iidma_fcport(vha, fcport);
5234
5235 if (fcport->fc4f_nvme) {
5236 qla_nvme_register_remote(vha, fcport);
5237 fcport->disc_state = DSC_LOGIN_COMPLETE;
5238 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5239 return;
5240 }
5241
5242 qla24xx_update_fcport_fcp_prio(vha, fcport);
5243
5244 switch (vha->host->active_mode) {
5245 case MODE_INITIATOR:
5246 qla2x00_reg_remote_port(vha, fcport);
5247 break;
5248 case MODE_TARGET:
5249 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5250 !vha->vha_tgt.qla_tgt->tgt_stopped)
5251 qlt_fc_port_added(vha, fcport);
5252 break;
5253 case MODE_DUAL:
5254 qla2x00_reg_remote_port(vha, fcport);
5255 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5256 !vha->vha_tgt.qla_tgt->tgt_stopped)
5257 qlt_fc_port_added(vha, fcport);
5258 break;
5259 default:
5260 break;
5261 }
5262
5263 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5264
5265 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5266 if (fcport->id_changed) {
5267 fcport->id_changed = 0;
5268 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5269 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5270 __func__, __LINE__, fcport->port_name,
5271 vha->fcport_count);
5272 qla24xx_post_gfpnid_work(vha, fcport);
5273 } else {
5274 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5275 "%s %d %8phC post gpsc fcp_cnt %d\n",
5276 __func__, __LINE__, fcport->port_name,
5277 vha->fcport_count);
5278 qla24xx_post_gpsc_work(vha, fcport);
5279 }
5280 }
5281
5282 fcport->disc_state = DSC_LOGIN_COMPLETE;
5283}
5284
5285void qla_register_fcport_fn(struct work_struct *work)
5286{
5287 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5288 u32 rscn_gen = fcport->rscn_gen;
5289 u16 data[2];
5290
5291 if (IS_SW_RESV_ADDR(fcport->d_id))
5292 return;
5293
5294 qla2x00_update_fcport(fcport->vha, fcport);
5295
5296 if (rscn_gen != fcport->rscn_gen) {
5297
5298 switch (fcport->next_disc_state) {
5299 case DSC_DELETE_PEND:
5300 qlt_schedule_sess_for_deletion(fcport);
5301 break;
5302 case DSC_ADISC:
5303 data[0] = data[1] = 0;
5304 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5305 data);
5306 break;
5307 default:
5308 break;
5309 }
5310 }
5311}
5312
5313
5314
5315
5316
5317
5318
5319
5320
5321
5322
5323
5324static int
5325qla2x00_configure_fabric(scsi_qla_host_t *vha)
5326{
5327 int rval;
5328 fc_port_t *fcport;
5329 uint16_t mb[MAILBOX_REGISTER_COUNT];
5330 uint16_t loop_id;
5331 LIST_HEAD(new_fcports);
5332 struct qla_hw_data *ha = vha->hw;
5333 int discovery_gen;
5334
5335
5336 if (IS_FWI2_CAPABLE(ha))
5337 loop_id = NPH_F_PORT;
5338 else
5339 loop_id = SNS_FL_PORT;
5340 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5341 if (rval != QLA_SUCCESS) {
5342 ql_dbg(ql_dbg_disc, vha, 0x20a0,
5343 "MBX_GET_PORT_NAME failed, No FL Port.\n");
5344
5345 vha->device_flags &= ~SWITCH_FOUND;
5346 return (QLA_SUCCESS);
5347 }
5348 vha->device_flags |= SWITCH_FOUND;
5349
5350
5351 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5352 rval = qla2x00_send_change_request(vha, 0x3, 0);
5353 if (rval != QLA_SUCCESS)
5354 ql_log(ql_log_warn, vha, 0x121,
5355 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5356 rval);
5357 }
5358
5359
5360 do {
5361 qla2x00_mgmt_svr_login(vha);
5362
5363
5364 if (ql2xfdmienable &&
5365 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5366 qla2x00_fdmi_register(vha);
5367
5368
5369 loop_id = NPH_SNS_LID(ha);
5370 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5371 0xfc, mb, BIT_1|BIT_0);
5372 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5373 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5374 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5375 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5376 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5377 return rval;
5378 }
5379 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5380 if (qla2x00_rft_id(vha)) {
5381
5382 ql_dbg(ql_dbg_disc, vha, 0x20a2,
5383 "Register FC-4 TYPE failed.\n");
5384 if (test_bit(LOOP_RESYNC_NEEDED,
5385 &vha->dpc_flags))
5386 break;
5387 }
5388 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5389
5390 ql_dbg(ql_dbg_disc, vha, 0x209a,
5391 "Register FC-4 Features failed.\n");
5392 if (test_bit(LOOP_RESYNC_NEEDED,
5393 &vha->dpc_flags))
5394 break;
5395 }
5396 if (vha->flags.nvme_enabled) {
5397 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5398 ql_dbg(ql_dbg_disc, vha, 0x2049,
5399 "Register NVME FC Type Features failed.\n");
5400 }
5401 }
5402 if (qla2x00_rnn_id(vha)) {
5403
5404 ql_dbg(ql_dbg_disc, vha, 0x2104,
5405 "Register Node Name failed.\n");
5406 if (test_bit(LOOP_RESYNC_NEEDED,
5407 &vha->dpc_flags))
5408 break;
5409 } else if (qla2x00_rsnn_nn(vha)) {
5410
5411 ql_dbg(ql_dbg_disc, vha, 0x209b,
5412 "Register Symbolic Node Name failed.\n");
5413 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5414 break;
5415 }
5416 }
5417
5418
5419
5420
5421
5422
5423
5424
5425 qlt_do_generation_tick(vha, &discovery_gen);
5426
5427 if (USE_ASYNC_SCAN(ha)) {
5428 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5429 NULL);
5430 if (rval)
5431 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5432 } else {
5433 list_for_each_entry(fcport, &vha->vp_fcports, list)
5434 fcport->scan_state = QLA_FCPORT_SCAN;
5435
5436 rval = qla2x00_find_all_fabric_devs(vha);
5437 }
5438 if (rval != QLA_SUCCESS)
5439 break;
5440 } while (0);
5441
5442 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5443 qla_nvme_register_hba(vha);
5444
5445 if (rval)
5446 ql_dbg(ql_dbg_disc, vha, 0x2068,
5447 "Configure fabric error exit rval=%d.\n", rval);
5448
5449 return (rval);
5450}
5451
5452
5453
5454
5455
5456
5457
5458
5459
5460
5461
5462
5463
5464
5465static int
5466qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
5467{
5468 int rval;
5469 uint16_t loop_id;
5470 fc_port_t *fcport, *new_fcport;
5471 int found;
5472
5473 sw_info_t *swl;
5474 int swl_idx;
5475 int first_dev, last_dev;
5476 port_id_t wrap = {}, nxt_d_id;
5477 struct qla_hw_data *ha = vha->hw;
5478 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5479 unsigned long flags;
5480
5481 rval = QLA_SUCCESS;
5482
5483
5484 if (!ha->swl)
5485 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
5486 GFP_KERNEL);
5487 swl = ha->swl;
5488 if (!swl) {
5489
5490 ql_dbg(ql_dbg_disc, vha, 0x209c,
5491 "GID_PT allocations failed, fallback on GA_NXT.\n");
5492 } else {
5493 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
5494 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
5495 swl = NULL;
5496 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5497 return rval;
5498 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
5499 swl = NULL;
5500 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5501 return rval;
5502 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
5503 swl = NULL;
5504 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5505 return rval;
5506 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5507 swl = NULL;
5508 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5509 return rval;
5510 }
5511
5512
5513 if (swl) {
5514 qla2x00_gff_id(vha, swl);
5515 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5516 return rval;
5517 }
5518 }
5519 swl_idx = 0;
5520
5521
5522 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5523 if (new_fcport == NULL) {
5524 ql_log(ql_log_warn, vha, 0x209d,
5525 "Failed to allocate memory for fcport.\n");
5526 return (QLA_MEMORY_ALLOC_FAILED);
5527 }
5528 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5529
5530 first_dev = 1;
5531 last_dev = 0;
5532
5533
5534 loop_id = ha->min_external_loopid;
5535 for (; loop_id <= ha->max_loop_id; loop_id++) {
5536 if (qla2x00_is_reserved_id(vha, loop_id))
5537 continue;
5538
5539 if (ha->current_topology == ISP_CFG_FL &&
5540 (atomic_read(&vha->loop_down_timer) ||
5541 LOOP_TRANSITION(vha))) {
5542 atomic_set(&vha->loop_down_timer, 0);
5543 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5544 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5545 break;
5546 }
5547
5548 if (swl != NULL) {
5549 if (last_dev) {
5550 wrap.b24 = new_fcport->d_id.b24;
5551 } else {
5552 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5553 memcpy(new_fcport->node_name,
5554 swl[swl_idx].node_name, WWN_SIZE);
5555 memcpy(new_fcport->port_name,
5556 swl[swl_idx].port_name, WWN_SIZE);
5557 memcpy(new_fcport->fabric_port_name,
5558 swl[swl_idx].fabric_port_name, WWN_SIZE);
5559 new_fcport->fp_speed = swl[swl_idx].fp_speed;
5560 new_fcport->fc4_type = swl[swl_idx].fc4_type;
5561
5562 new_fcport->nvme_flag = 0;
5563 new_fcport->fc4f_nvme = 0;
5564 if (vha->flags.nvme_enabled &&
5565 swl[swl_idx].fc4f_nvme) {
5566 new_fcport->fc4f_nvme =
5567 swl[swl_idx].fc4f_nvme;
5568 ql_log(ql_log_info, vha, 0x2131,
5569 "FOUND: NVME port %8phC as FC Type 28h\n",
5570 new_fcport->port_name);
5571 }
5572
5573 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5574 last_dev = 1;
5575 }
5576 swl_idx++;
5577 }
5578 } else {
5579
5580 rval = qla2x00_ga_nxt(vha, new_fcport);
5581 if (rval != QLA_SUCCESS) {
5582 ql_log(ql_log_warn, vha, 0x209e,
5583 "SNS scan failed -- assuming "
5584 "zero-entry result.\n");
5585 rval = QLA_SUCCESS;
5586 break;
5587 }
5588 }
5589
5590
5591 if (first_dev) {
5592 wrap.b24 = new_fcport->d_id.b24;
5593 first_dev = 0;
5594 } else if (new_fcport->d_id.b24 == wrap.b24) {
5595 ql_dbg(ql_dbg_disc, vha, 0x209f,
5596 "Device wrap (%02x%02x%02x).\n",
5597 new_fcport->d_id.b.domain,
5598 new_fcport->d_id.b.area,
5599 new_fcport->d_id.b.al_pa);
5600 break;
5601 }
5602
5603
5604 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
5605 continue;
5606
5607
5608 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5609 continue;
5610
5611
5612 if (((new_fcport->d_id.b24 & 0xffff00) ==
5613 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
5614 ISP_CFG_FL)
5615 continue;
5616
5617
5618 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5619 continue;
5620
5621
5622 if (ql2xgffidenable &&
5623 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
5624 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
5625 continue;
5626
5627 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5628
5629
5630 found = 0;
5631 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5632 if (memcmp(new_fcport->port_name, fcport->port_name,
5633 WWN_SIZE))
5634 continue;
5635
5636 fcport->scan_state = QLA_FCPORT_FOUND;
5637
5638 found++;
5639
5640
5641 memcpy(fcport->fabric_port_name,
5642 new_fcport->fabric_port_name, WWN_SIZE);
5643 fcport->fp_speed = new_fcport->fp_speed;
5644
5645
5646
5647
5648
5649 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
5650 (atomic_read(&fcport->state) == FCS_ONLINE ||
5651 (vha->host->active_mode == MODE_TARGET))) {
5652 break;
5653 }
5654
5655
5656
5657
5658 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5659 fcport->d_id.b24 = new_fcport->d_id.b24;
5660 qla2x00_clear_loop_id(fcport);
5661 fcport->flags |= (FCF_FABRIC_DEVICE |
5662 FCF_LOGIN_NEEDED);
5663 break;
5664 }
5665
5666
5667
5668
5669
5670
5671 if (qla_tgt_mode_enabled(base_vha)) {
5672 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5673 "port changed FC ID, %8phC"
5674 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5675 fcport->port_name,
5676 fcport->d_id.b.domain,
5677 fcport->d_id.b.area,
5678 fcport->d_id.b.al_pa,
5679 fcport->loop_id,
5680 new_fcport->d_id.b.domain,
5681 new_fcport->d_id.b.area,
5682 new_fcport->d_id.b.al_pa);
5683 fcport->d_id.b24 = new_fcport->d_id.b24;
5684 break;
5685 }
5686
5687 fcport->d_id.b24 = new_fcport->d_id.b24;
5688 fcport->flags |= FCF_LOGIN_NEEDED;
5689 break;
5690 }
5691
5692 if (fcport->fc4f_nvme) {
5693 if (fcport->disc_state == DSC_DELETE_PEND) {
5694 fcport->disc_state = DSC_GNL;
5695 vha->fcport_count--;
5696 fcport->login_succ = 0;
5697 }
5698 }
5699
5700 if (found) {
5701 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5702 continue;
5703 }
5704
5705 new_fcport->scan_state = QLA_FCPORT_FOUND;
5706 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5707
5708 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5709
5710
5711
5712 nxt_d_id.b24 = new_fcport->d_id.b24;
5713 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5714 if (new_fcport == NULL) {
5715 ql_log(ql_log_warn, vha, 0xd032,
5716 "Memory allocation failed for fcport.\n");
5717 return (QLA_MEMORY_ALLOC_FAILED);
5718 }
5719 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5720 new_fcport->d_id.b24 = nxt_d_id.b24;
5721 }
5722
5723 qla2x00_free_fcport(new_fcport);
5724
5725
5726
5727
5728 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5729 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5730 break;
5731
5732 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
5733 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
5734 continue;
5735
5736 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5737 if ((qla_dual_mode_enabled(vha) ||
5738 qla_ini_mode_enabled(vha)) &&
5739 atomic_read(&fcport->state) == FCS_ONLINE) {
5740 qla2x00_mark_device_lost(vha, fcport,
5741 ql2xplogiabsentdevice, 0);
5742 if (fcport->loop_id != FC_NO_LOOP_ID &&
5743 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5744 fcport->port_type != FCT_INITIATOR &&
5745 fcport->port_type != FCT_BROADCAST) {
5746 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5747 "%s %d %8phC post del sess\n",
5748 __func__, __LINE__,
5749 fcport->port_name);
5750 qlt_schedule_sess_for_deletion(fcport);
5751 continue;
5752 }
5753 }
5754 }
5755
5756 if (fcport->scan_state == QLA_FCPORT_FOUND)
5757 qla24xx_fcport_handle_login(vha, fcport);
5758 }
5759 return (rval);
5760}
5761
5762
5763
5764
5765
5766
5767
5768
5769
5770
5771
5772
5773
5774
5775
5776int
5777qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
5778{
5779 int rval;
5780 struct qla_hw_data *ha = vha->hw;
5781 unsigned long flags = 0;
5782
5783 rval = QLA_SUCCESS;
5784
5785 spin_lock_irqsave(&ha->vport_slock, flags);
5786
5787 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
5788 LOOPID_MAP_SIZE);
5789 if (dev->loop_id >= LOOPID_MAP_SIZE ||
5790 qla2x00_is_reserved_id(vha, dev->loop_id)) {
5791 dev->loop_id = FC_NO_LOOP_ID;
5792 rval = QLA_FUNCTION_FAILED;
5793 } else
5794 set_bit(dev->loop_id, ha->loop_id_map);
5795
5796 spin_unlock_irqrestore(&ha->vport_slock, flags);
5797
5798 if (rval == QLA_SUCCESS)
5799 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
5800 "Assigning new loopid=%x, portid=%x.\n",
5801 dev->loop_id, dev->d_id.b24);
5802 else
5803 ql_log(ql_log_warn, dev->vha, 0x2087,
5804 "No loop_id's available, portid=%x.\n",
5805 dev->d_id.b24);
5806
5807 return (rval);
5808}
5809
5810
5811
5812int
5813qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
5814{
5815 int loop_id = FC_NO_LOOP_ID;
5816 int lid = NPH_MGMT_SERVER - vha->vp_idx;
5817 unsigned long flags;
5818 struct qla_hw_data *ha = vha->hw;
5819
5820 if (vha->vp_idx == 0) {
5821 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
5822 return NPH_MGMT_SERVER;
5823 }
5824
5825
5826 spin_lock_irqsave(&ha->vport_slock, flags);
5827 for (; lid > 0; lid--) {
5828 if (!test_bit(lid, vha->hw->loop_id_map)) {
5829 set_bit(lid, vha->hw->loop_id_map);
5830 loop_id = lid;
5831 break;
5832 }
5833 }
5834 spin_unlock_irqrestore(&ha->vport_slock, flags);
5835
5836 return loop_id;
5837}
5838
5839
5840
5841
5842
5843
5844
5845
5846
5847
5848
5849
5850
5851
5852
5853int
5854qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
5855 uint16_t *next_loopid)
5856{
5857 int rval;
5858 int retry;
5859 uint16_t tmp_loopid;
5860 uint16_t mb[MAILBOX_REGISTER_COUNT];
5861 struct qla_hw_data *ha = vha->hw;
5862
5863 retry = 0;
5864 tmp_loopid = 0;
5865
5866 for (;;) {
5867 ql_dbg(ql_dbg_disc, vha, 0x2000,
5868 "Trying Fabric Login w/loop id 0x%04x for port "
5869 "%02x%02x%02x.\n",
5870 fcport->loop_id, fcport->d_id.b.domain,
5871 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5872
5873
5874 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
5875 fcport->d_id.b.domain, fcport->d_id.b.area,
5876 fcport->d_id.b.al_pa, mb, BIT_0);
5877 if (rval != QLA_SUCCESS) {
5878 return rval;
5879 }
5880 if (mb[0] == MBS_PORT_ID_USED) {
5881
5882
5883
5884
5885
5886
5887
5888 retry++;
5889 tmp_loopid = fcport->loop_id;
5890 fcport->loop_id = mb[1];
5891
5892 ql_dbg(ql_dbg_disc, vha, 0x2001,
5893 "Fabric Login: port in use - next loop "
5894 "id=0x%04x, port id= %02x%02x%02x.\n",
5895 fcport->loop_id, fcport->d_id.b.domain,
5896 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5897
5898 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
5899
5900
5901
5902 if (retry) {
5903
5904 *next_loopid = tmp_loopid;
5905 } else {
5906
5907
5908
5909
5910 *next_loopid = (fcport->loop_id + 1);
5911 }
5912
5913 if (mb[1] & BIT_0) {
5914 fcport->port_type = FCT_INITIATOR;
5915 } else {
5916 fcport->port_type = FCT_TARGET;
5917 if (mb[1] & BIT_1) {
5918 fcport->flags |= FCF_FCP2_DEVICE;
5919 }
5920 }
5921
5922 if (mb[10] & BIT_0)
5923 fcport->supported_classes |= FC_COS_CLASS2;
5924 if (mb[10] & BIT_1)
5925 fcport->supported_classes |= FC_COS_CLASS3;
5926
5927 if (IS_FWI2_CAPABLE(ha)) {
5928 if (mb[10] & BIT_7)
5929 fcport->flags |=
5930 FCF_CONF_COMP_SUPPORTED;
5931 }
5932
5933 rval = QLA_SUCCESS;
5934 break;
5935 } else if (mb[0] == MBS_LOOP_ID_USED) {
5936
5937
5938
5939 fcport->loop_id++;
5940 rval = qla2x00_find_new_loop_id(vha, fcport);
5941 if (rval != QLA_SUCCESS) {
5942
5943 break;
5944 }
5945 } else if (mb[0] == MBS_COMMAND_ERROR) {
5946
5947
5948
5949
5950
5951 *next_loopid = fcport->loop_id;
5952 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
5953 fcport->d_id.b.domain, fcport->d_id.b.area,
5954 fcport->d_id.b.al_pa);
5955 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5956
5957 rval = 1;
5958 break;
5959 } else {
5960
5961
5962
5963 ql_dbg(ql_dbg_disc, vha, 0x2002,
5964 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
5965 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
5966 fcport->d_id.b.area, fcport->d_id.b.al_pa,
5967 fcport->loop_id, jiffies);
5968
5969 *next_loopid = fcport->loop_id;
5970 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
5971 fcport->d_id.b.domain, fcport->d_id.b.area,
5972 fcport->d_id.b.al_pa);
5973 qla2x00_clear_loop_id(fcport);
5974 fcport->login_retry = 0;
5975
5976 rval = 3;
5977 break;
5978 }
5979 }
5980
5981 return (rval);
5982}
5983
5984
5985
5986
5987
5988
5989
5990
5991
5992
5993
5994
5995
5996
5997int
5998qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
5999{
6000 int rval;
6001 uint16_t mb[MAILBOX_REGISTER_COUNT];
6002
6003 memset(mb, 0, sizeof(mb));
6004 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6005 if (rval == QLA_SUCCESS) {
6006
6007 if (mb[0] == MBS_COMMAND_ERROR)
6008 rval = 1;
6009 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6010
6011 rval = 3;
6012 }
6013
6014 return (rval);
6015}
6016
6017
6018
6019
6020
6021
6022
6023
6024
6025
6026
6027int
6028qla2x00_loop_resync(scsi_qla_host_t *vha)
6029{
6030 int rval = QLA_SUCCESS;
6031 uint32_t wait_time;
6032 struct req_que *req;
6033 struct rsp_que *rsp;
6034
6035 req = vha->req;
6036 rsp = req->rsp;
6037
6038 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6039 if (vha->flags.online) {
6040 if (!(rval = qla2x00_fw_ready(vha))) {
6041
6042 wait_time = 256;
6043 do {
6044 if (!IS_QLAFX00(vha->hw)) {
6045
6046
6047
6048
6049 qla2x00_marker(vha, req, rsp, 0, 0,
6050 MK_SYNC_ALL);
6051 vha->marker_needed = 0;
6052 }
6053
6054
6055 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6056
6057 if (IS_QLAFX00(vha->hw))
6058 qlafx00_configure_devices(vha);
6059 else
6060 qla2x00_configure_loop(vha);
6061
6062 wait_time--;
6063 } while (!atomic_read(&vha->loop_down_timer) &&
6064 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6065 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6066 &vha->dpc_flags)));
6067 }
6068 }
6069
6070 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6071 return (QLA_FUNCTION_FAILED);
6072
6073 if (rval)
6074 ql_dbg(ql_dbg_disc, vha, 0x206c,
6075 "%s *** FAILED ***.\n", __func__);
6076
6077 return (rval);
6078}
6079
6080
6081
6082
6083
6084
6085
6086
6087
6088int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6089{
6090 int32_t rval = 0;
6091
6092 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6093
6094 atomic_set(&ha->loop_down_timer, 0);
6095 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6096 atomic_set(&ha->loop_state, LOOP_UP);
6097 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6098 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6099 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6100
6101 rval = qla2x00_loop_resync(ha);
6102 } else
6103 atomic_set(&ha->loop_state, LOOP_DEAD);
6104
6105 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6106 }
6107
6108 return rval;
6109}
6110
6111void
6112qla2x00_update_fcports(scsi_qla_host_t *base_vha)
6113{
6114 fc_port_t *fcport;
6115 struct scsi_qla_host *vha;
6116 struct qla_hw_data *ha = base_vha->hw;
6117 unsigned long flags;
6118
6119 spin_lock_irqsave(&ha->vport_slock, flags);
6120
6121 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6122 atomic_inc(&vha->vref_count);
6123 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6124 if (fcport->drport &&
6125 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6126 spin_unlock_irqrestore(&ha->vport_slock, flags);
6127 qla2x00_rport_del(fcport);
6128
6129 spin_lock_irqsave(&ha->vport_slock, flags);
6130 }
6131 }
6132 atomic_dec(&vha->vref_count);
6133 wake_up(&vha->vref_waitq);
6134 }
6135 spin_unlock_irqrestore(&ha->vport_slock, flags);
6136}
6137
6138
6139void
6140qla83xx_reset_ownership(scsi_qla_host_t *vha)
6141{
6142 struct qla_hw_data *ha = vha->hw;
6143 uint32_t drv_presence, drv_presence_mask;
6144 uint32_t dev_part_info1, dev_part_info2, class_type;
6145 uint32_t class_type_mask = 0x3;
6146 uint16_t fcoe_other_function = 0xffff, i;
6147
6148 if (IS_QLA8044(ha)) {
6149 drv_presence = qla8044_rd_direct(vha,
6150 QLA8044_CRB_DRV_ACTIVE_INDEX);
6151 dev_part_info1 = qla8044_rd_direct(vha,
6152 QLA8044_CRB_DEV_PART_INFO_INDEX);
6153 dev_part_info2 = qla8044_rd_direct(vha,
6154 QLA8044_CRB_DEV_PART_INFO2);
6155 } else {
6156 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6157 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6158 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6159 }
6160 for (i = 0; i < 8; i++) {
6161 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6162 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6163 (i != ha->portnum)) {
6164 fcoe_other_function = i;
6165 break;
6166 }
6167 }
6168 if (fcoe_other_function == 0xffff) {
6169 for (i = 0; i < 8; i++) {
6170 class_type = ((dev_part_info2 >> (i * 4)) &
6171 class_type_mask);
6172 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6173 ((i + 8) != ha->portnum)) {
6174 fcoe_other_function = i + 8;
6175 break;
6176 }
6177 }
6178 }
6179
6180
6181
6182
6183 drv_presence_mask = ~((1 << (ha->portnum)) |
6184 ((fcoe_other_function == 0xffff) ?
6185 0 : (1 << (fcoe_other_function))));
6186
6187
6188
6189
6190 if (!(drv_presence & drv_presence_mask) &&
6191 (ha->portnum < fcoe_other_function)) {
6192 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6193 "This host is Reset owner.\n");
6194 ha->flags.nic_core_reset_owner = 1;
6195 }
6196}
6197
6198static int
6199__qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6200{
6201 int rval = QLA_SUCCESS;
6202 struct qla_hw_data *ha = vha->hw;
6203 uint32_t drv_ack;
6204
6205 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6206 if (rval == QLA_SUCCESS) {
6207 drv_ack |= (1 << ha->portnum);
6208 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6209 }
6210
6211 return rval;
6212}
6213
6214static int
6215__qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6216{
6217 int rval = QLA_SUCCESS;
6218 struct qla_hw_data *ha = vha->hw;
6219 uint32_t drv_ack;
6220
6221 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6222 if (rval == QLA_SUCCESS) {
6223 drv_ack &= ~(1 << ha->portnum);
6224 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6225 }
6226
6227 return rval;
6228}
6229
6230static const char *
6231qla83xx_dev_state_to_string(uint32_t dev_state)
6232{
6233 switch (dev_state) {
6234 case QLA8XXX_DEV_COLD:
6235 return "COLD/RE-INIT";
6236 case QLA8XXX_DEV_INITIALIZING:
6237 return "INITIALIZING";
6238 case QLA8XXX_DEV_READY:
6239 return "READY";
6240 case QLA8XXX_DEV_NEED_RESET:
6241 return "NEED RESET";
6242 case QLA8XXX_DEV_NEED_QUIESCENT:
6243 return "NEED QUIESCENT";
6244 case QLA8XXX_DEV_FAILED:
6245 return "FAILED";
6246 case QLA8XXX_DEV_QUIESCENT:
6247 return "QUIESCENT";
6248 default:
6249 return "Unknown";
6250 }
6251}
6252
6253
6254void
6255qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6256{
6257 struct qla_hw_data *ha = vha->hw;
6258 uint32_t idc_audit_reg = 0, duration_secs = 0;
6259
6260 switch (audit_type) {
6261 case IDC_AUDIT_TIMESTAMP:
6262 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6263 idc_audit_reg = (ha->portnum) |
6264 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6265 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6266 break;
6267
6268 case IDC_AUDIT_COMPLETION:
6269 duration_secs = ((jiffies_to_msecs(jiffies) -
6270 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6271 idc_audit_reg = (ha->portnum) |
6272 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6273 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6274 break;
6275
6276 default:
6277 ql_log(ql_log_warn, vha, 0xb078,
6278 "Invalid audit type specified.\n");
6279 break;
6280 }
6281}
6282
6283
6284static int
6285qla83xx_initiating_reset(scsi_qla_host_t *vha)
6286{
6287 struct qla_hw_data *ha = vha->hw;
6288 uint32_t idc_control, dev_state;
6289
6290 __qla83xx_get_idc_control(vha, &idc_control);
6291 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6292 ql_log(ql_log_info, vha, 0xb080,
6293 "NIC Core reset has been disabled. idc-control=0x%x\n",
6294 idc_control);
6295 return QLA_FUNCTION_FAILED;
6296 }
6297
6298
6299 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6300 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6301 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6302 QLA8XXX_DEV_NEED_RESET);
6303 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6304 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6305 } else {
6306 const char *state = qla83xx_dev_state_to_string(dev_state);
6307 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6308
6309
6310
6311 while (dev_state == QLA8XXX_DEV_READY) {
6312 qla83xx_idc_unlock(vha, 0);
6313 msleep(200);
6314 qla83xx_idc_lock(vha, 0);
6315 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6316 }
6317 }
6318
6319
6320 __qla83xx_set_drv_ack(vha);
6321
6322 return QLA_SUCCESS;
6323}
6324
6325int
6326__qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6327{
6328 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6329}
6330
6331int
6332__qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6333{
6334 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6335}
6336
6337static int
6338qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6339{
6340 uint32_t drv_presence = 0;
6341 struct qla_hw_data *ha = vha->hw;
6342
6343 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6344 if (drv_presence & (1 << ha->portnum))
6345 return QLA_SUCCESS;
6346 else
6347 return QLA_TEST_FAILED;
6348}
6349
6350int
6351qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6352{
6353 int rval = QLA_SUCCESS;
6354 struct qla_hw_data *ha = vha->hw;
6355
6356 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6357 "Entered %s().\n", __func__);
6358
6359 if (vha->device_flags & DFLG_DEV_FAILED) {
6360 ql_log(ql_log_warn, vha, 0xb059,
6361 "Device in unrecoverable FAILED state.\n");
6362 return QLA_FUNCTION_FAILED;
6363 }
6364
6365 qla83xx_idc_lock(vha, 0);
6366
6367 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6368 ql_log(ql_log_warn, vha, 0xb05a,
6369 "Function=0x%x has been removed from IDC participation.\n",
6370 ha->portnum);
6371 rval = QLA_FUNCTION_FAILED;
6372 goto exit;
6373 }
6374
6375 qla83xx_reset_ownership(vha);
6376
6377 rval = qla83xx_initiating_reset(vha);
6378
6379
6380
6381
6382
6383 if (rval == QLA_SUCCESS) {
6384 rval = qla83xx_idc_state_handler(vha);
6385
6386 if (rval == QLA_SUCCESS)
6387 ha->flags.nic_core_hung = 0;
6388 __qla83xx_clear_drv_ack(vha);
6389 }
6390
6391exit:
6392 qla83xx_idc_unlock(vha, 0);
6393
6394 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6395
6396 return rval;
6397}
6398
6399int
6400qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6401{
6402 struct qla_hw_data *ha = vha->hw;
6403 int rval = QLA_FUNCTION_FAILED;
6404
6405 if (!IS_MCTP_CAPABLE(ha)) {
6406
6407 ql_log(ql_log_info, vha, 0x506d,
6408 "This board is not MCTP capable\n");
6409 return rval;
6410 }
6411
6412 if (!ha->mctp_dump) {
6413 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6414 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6415
6416 if (!ha->mctp_dump) {
6417 ql_log(ql_log_warn, vha, 0x506e,
6418 "Failed to allocate memory for mctp dump\n");
6419 return rval;
6420 }
6421 }
6422
6423#define MCTP_DUMP_STR_ADDR 0x00000000
6424 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6425 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6426 if (rval != QLA_SUCCESS) {
6427 ql_log(ql_log_warn, vha, 0x506f,
6428 "Failed to capture mctp dump\n");
6429 } else {
6430 ql_log(ql_log_info, vha, 0x5070,
6431 "Mctp dump capture for host (%ld/%p).\n",
6432 vha->host_no, ha->mctp_dump);
6433 ha->mctp_dumped = 1;
6434 }
6435
6436 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6437 ha->flags.nic_core_reset_hdlr_active = 1;
6438 rval = qla83xx_restart_nic_firmware(vha);
6439 if (rval)
6440
6441 ql_log(ql_log_warn, vha, 0x5071,
6442 "Failed to restart nic firmware\n");
6443 else
6444 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6445 "Restarted NIC firmware successfully.\n");
6446 ha->flags.nic_core_reset_hdlr_active = 0;
6447 }
6448
6449 return rval;
6450
6451}
6452
6453
6454
6455
6456
6457
6458
6459
6460
6461void
6462qla2x00_quiesce_io(scsi_qla_host_t *vha)
6463{
6464 struct qla_hw_data *ha = vha->hw;
6465 struct scsi_qla_host *vp;
6466
6467 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6468 "Quiescing I/O - ha=%p.\n", ha);
6469
6470 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6471 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6472 atomic_set(&vha->loop_state, LOOP_DOWN);
6473 qla2x00_mark_all_devices_lost(vha, 0);
6474 list_for_each_entry(vp, &ha->vp_list, list)
6475 qla2x00_mark_all_devices_lost(vp, 0);
6476 } else {
6477 if (!atomic_read(&vha->loop_down_timer))
6478 atomic_set(&vha->loop_down_timer,
6479 LOOP_DOWN_TIME);
6480 }
6481
6482 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
6483}
6484
6485void
6486qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6487{
6488 struct qla_hw_data *ha = vha->hw;
6489 struct scsi_qla_host *vp;
6490 unsigned long flags;
6491 fc_port_t *fcport;
6492 u16 i;
6493
6494
6495
6496
6497 if (!(IS_P3P_TYPE(ha)))
6498 vha->flags.online = 0;
6499 ha->flags.chip_reset_done = 0;
6500 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
6501 vha->qla_stats.total_isp_aborts++;
6502
6503 ql_log(ql_log_info, vha, 0x00af,
6504 "Performing ISP error recovery - ha=%p.\n", ha);
6505
6506 ha->flags.purge_mbox = 1;
6507
6508
6509
6510
6511 if (!(IS_P3P_TYPE(ha)))
6512 ha->isp_ops->reset_chip(vha);
6513
6514 ha->link_data_rate = PORT_SPEED_UNKNOWN;
6515 SAVE_TOPO(ha);
6516 ha->flags.rida_fmt2 = 0;
6517 ha->flags.n2n_ae = 0;
6518 ha->flags.lip_ae = 0;
6519 ha->current_topology = 0;
6520 ha->flags.fw_started = 0;
6521 ha->flags.fw_init_done = 0;
6522 ha->chip_reset++;
6523 ha->base_qpair->chip_reset = ha->chip_reset;
6524 for (i = 0; i < ha->max_qpairs; i++) {
6525 if (ha->queue_pair_map[i])
6526 ha->queue_pair_map[i]->chip_reset =
6527 ha->base_qpair->chip_reset;
6528 }
6529
6530
6531 if (atomic_read(&ha->num_pend_mbx_stage3)) {
6532 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6533 complete(&ha->mbx_intr_comp);
6534 }
6535
6536 i = 0;
6537 while (atomic_read(&ha->num_pend_mbx_stage3) ||
6538 atomic_read(&ha->num_pend_mbx_stage2) ||
6539 atomic_read(&ha->num_pend_mbx_stage1)) {
6540 msleep(20);
6541 i++;
6542 if (i > 50)
6543 break;
6544 }
6545 ha->flags.purge_mbox = 0;
6546
6547 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6548 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6549 atomic_set(&vha->loop_state, LOOP_DOWN);
6550 qla2x00_mark_all_devices_lost(vha, 0);
6551
6552 spin_lock_irqsave(&ha->vport_slock, flags);
6553 list_for_each_entry(vp, &ha->vp_list, list) {
6554 atomic_inc(&vp->vref_count);
6555 spin_unlock_irqrestore(&ha->vport_slock, flags);
6556
6557 qla2x00_mark_all_devices_lost(vp, 0);
6558
6559 spin_lock_irqsave(&ha->vport_slock, flags);
6560 atomic_dec(&vp->vref_count);
6561 }
6562 spin_unlock_irqrestore(&ha->vport_slock, flags);
6563 } else {
6564 if (!atomic_read(&vha->loop_down_timer))
6565 atomic_set(&vha->loop_down_timer,
6566 LOOP_DOWN_TIME);
6567 }
6568
6569
6570 list_for_each_entry(fcport, &vha->vp_fcports, list)
6571 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6572 spin_lock_irqsave(&ha->vport_slock, flags);
6573 list_for_each_entry(vp, &ha->vp_list, list) {
6574 atomic_inc(&vp->vref_count);
6575 spin_unlock_irqrestore(&ha->vport_slock, flags);
6576
6577 list_for_each_entry(fcport, &vp->vp_fcports, list)
6578 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6579
6580 spin_lock_irqsave(&ha->vport_slock, flags);
6581 atomic_dec(&vp->vref_count);
6582 }
6583 spin_unlock_irqrestore(&ha->vport_slock, flags);
6584
6585 if (!ha->flags.eeh_busy) {
6586
6587 if (IS_P3P_TYPE(ha)) {
6588 qla82xx_chip_reset_cleanup(vha);
6589 ql_log(ql_log_info, vha, 0x00b4,
6590 "Done chip reset cleanup.\n");
6591
6592
6593
6594
6595 vha->flags.online = 0;
6596 }
6597
6598
6599 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6600 }
6601
6602 wmb();
6603}
6604
6605
6606
6607
6608
6609
6610
6611
6612
6613
6614
6615int
6616qla2x00_abort_isp(scsi_qla_host_t *vha)
6617{
6618 int rval;
6619 uint8_t status = 0;
6620 struct qla_hw_data *ha = vha->hw;
6621 struct scsi_qla_host *vp;
6622 struct req_que *req = ha->req_q_map[0];
6623 unsigned long flags;
6624
6625 if (vha->flags.online) {
6626 qla2x00_abort_isp_cleanup(vha);
6627
6628 if (IS_QLA8031(ha)) {
6629 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6630 "Clearing fcoe driver presence.\n");
6631 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6632 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6633 "Error while clearing DRV-Presence.\n");
6634 }
6635
6636 if (unlikely(pci_channel_offline(ha->pdev) &&
6637 ha->flags.pci_channel_io_perm_failure)) {
6638 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6639 status = 0;
6640 return status;
6641 }
6642
6643 switch (vha->qlini_mode) {
6644 case QLA2XXX_INI_MODE_DISABLED:
6645 if (!qla_tgt_mode_enabled(vha))
6646 return 0;
6647 break;
6648 case QLA2XXX_INI_MODE_DUAL:
6649 if (!qla_dual_mode_enabled(vha))
6650 return 0;
6651 break;
6652 case QLA2XXX_INI_MODE_ENABLED:
6653 default:
6654 break;
6655 }
6656
6657 ha->isp_ops->get_flash_version(vha, req->ring);
6658
6659 ha->isp_ops->nvram_config(vha);
6660
6661 if (!qla2x00_restart_isp(vha)) {
6662 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6663
6664 if (!atomic_read(&vha->loop_down_timer)) {
6665
6666
6667
6668
6669 vha->marker_needed = 1;
6670 }
6671
6672 vha->flags.online = 1;
6673
6674 ha->isp_ops->enable_intrs(ha);
6675
6676 ha->isp_abort_cnt = 0;
6677 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6678
6679 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6680 qla2x00_get_fw_version(vha);
6681 if (ha->fce) {
6682 ha->flags.fce_enabled = 1;
6683 memset(ha->fce, 0,
6684 fce_calc_size(ha->fce_bufs));
6685 rval = qla2x00_enable_fce_trace(vha,
6686 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6687 &ha->fce_bufs);
6688 if (rval) {
6689 ql_log(ql_log_warn, vha, 0x8033,
6690 "Unable to reinitialize FCE "
6691 "(%d).\n", rval);
6692 ha->flags.fce_enabled = 0;
6693 }
6694 }
6695
6696 if (ha->eft) {
6697 memset(ha->eft, 0, EFT_SIZE);
6698 rval = qla2x00_enable_eft_trace(vha,
6699 ha->eft_dma, EFT_NUM_BUFFERS);
6700 if (rval) {
6701 ql_log(ql_log_warn, vha, 0x8034,
6702 "Unable to reinitialize EFT "
6703 "(%d).\n", rval);
6704 }
6705 }
6706 } else {
6707 vha->flags.online = 1;
6708 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
6709 if (ha->isp_abort_cnt == 0) {
6710 ql_log(ql_log_fatal, vha, 0x8035,
6711 "ISP error recover failed - "
6712 "board disabled.\n");
6713
6714
6715
6716
6717 qla2x00_abort_isp_cleanup(vha);
6718 vha->flags.online = 0;
6719 clear_bit(ISP_ABORT_RETRY,
6720 &vha->dpc_flags);
6721 status = 0;
6722 } else {
6723 ha->isp_abort_cnt--;
6724 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6725 "ISP abort - retry remaining %d.\n",
6726 ha->isp_abort_cnt);
6727 status = 1;
6728 }
6729 } else {
6730 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
6731 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6732 "ISP error recovery - retrying (%d) "
6733 "more times.\n", ha->isp_abort_cnt);
6734 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6735 status = 1;
6736 }
6737 }
6738
6739 }
6740
6741 if (!status) {
6742 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
6743 qla2x00_configure_hba(vha);
6744 spin_lock_irqsave(&ha->vport_slock, flags);
6745 list_for_each_entry(vp, &ha->vp_list, list) {
6746 if (vp->vp_idx) {
6747 atomic_inc(&vp->vref_count);
6748 spin_unlock_irqrestore(&ha->vport_slock, flags);
6749
6750 qla2x00_vp_abort_isp(vp);
6751
6752 spin_lock_irqsave(&ha->vport_slock, flags);
6753 atomic_dec(&vp->vref_count);
6754 }
6755 }
6756 spin_unlock_irqrestore(&ha->vport_slock, flags);
6757
6758 if (IS_QLA8031(ha)) {
6759 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6760 "Setting back fcoe driver presence.\n");
6761 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6762 ql_dbg(ql_dbg_p3p, vha, 0xb074,
6763 "Error while setting DRV-Presence.\n");
6764 }
6765 } else {
6766 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6767 __func__);
6768 }
6769
6770 return(status);
6771}
6772
6773
6774
6775
6776
6777
6778
6779
6780
6781
6782
6783static int
6784qla2x00_restart_isp(scsi_qla_host_t *vha)
6785{
6786 int status = 0;
6787 struct qla_hw_data *ha = vha->hw;
6788 struct req_que *req = ha->req_q_map[0];
6789 struct rsp_que *rsp = ha->rsp_q_map[0];
6790
6791
6792 if (qla2x00_isp_firmware(vha)) {
6793 vha->flags.online = 0;
6794 status = ha->isp_ops->chip_diag(vha);
6795 if (!status)
6796 status = qla2x00_setup_chip(vha);
6797 }
6798
6799 if (!status && !(status = qla2x00_init_rings(vha))) {
6800 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6801 ha->flags.chip_reset_done = 1;
6802
6803
6804 qla25xx_init_queues(ha);
6805
6806 status = qla2x00_fw_ready(vha);
6807 if (!status) {
6808
6809 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
6810 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6811 }
6812
6813
6814 if ((vha->device_flags & DFLG_NO_CABLE))
6815 status = 0;
6816 }
6817 return (status);
6818}
6819
6820static int
6821qla25xx_init_queues(struct qla_hw_data *ha)
6822{
6823 struct rsp_que *rsp = NULL;
6824 struct req_que *req = NULL;
6825 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6826 int ret = -1;
6827 int i;
6828
6829 for (i = 1; i < ha->max_rsp_queues; i++) {
6830 rsp = ha->rsp_q_map[i];
6831 if (rsp && test_bit(i, ha->rsp_qid_map)) {
6832 rsp->options &= ~BIT_0;
6833 ret = qla25xx_init_rsp_que(base_vha, rsp);
6834 if (ret != QLA_SUCCESS)
6835 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
6836 "%s Rsp que: %d init failed.\n",
6837 __func__, rsp->id);
6838 else
6839 ql_dbg(ql_dbg_init, base_vha, 0x0100,
6840 "%s Rsp que: %d inited.\n",
6841 __func__, rsp->id);
6842 }
6843 }
6844 for (i = 1; i < ha->max_req_queues; i++) {
6845 req = ha->req_q_map[i];
6846 if (req && test_bit(i, ha->req_qid_map)) {
6847
6848 req->options &= ~BIT_0;
6849 ret = qla25xx_init_req_que(base_vha, req);
6850 if (ret != QLA_SUCCESS)
6851 ql_dbg(ql_dbg_init, base_vha, 0x0101,
6852 "%s Req que: %d init failed.\n",
6853 __func__, req->id);
6854 else
6855 ql_dbg(ql_dbg_init, base_vha, 0x0102,
6856 "%s Req que: %d inited.\n",
6857 __func__, req->id);
6858 }
6859 }
6860 return ret;
6861}
6862
6863
6864
6865
6866
6867
6868
6869
6870void
6871qla2x00_reset_adapter(scsi_qla_host_t *vha)
6872{
6873 unsigned long flags = 0;
6874 struct qla_hw_data *ha = vha->hw;
6875 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6876
6877 vha->flags.online = 0;
6878 ha->isp_ops->disable_intrs(ha);
6879
6880 spin_lock_irqsave(&ha->hardware_lock, flags);
6881 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
6882 RD_REG_WORD(®->hccr);
6883 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
6884 RD_REG_WORD(®->hccr);
6885 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6886}
6887
6888void
6889qla24xx_reset_adapter(scsi_qla_host_t *vha)
6890{
6891 unsigned long flags = 0;
6892 struct qla_hw_data *ha = vha->hw;
6893 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
6894
6895 if (IS_P3P_TYPE(ha))
6896 return;
6897
6898 vha->flags.online = 0;
6899 ha->isp_ops->disable_intrs(ha);
6900
6901 spin_lock_irqsave(&ha->hardware_lock, flags);
6902 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET);
6903 RD_REG_DWORD(®->hccr);
6904 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
6905 RD_REG_DWORD(®->hccr);
6906 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6907
6908 if (IS_NOPOLLING_TYPE(ha))
6909 ha->isp_ops->enable_intrs(ha);
6910}
6911
6912
6913
6914
6915static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
6916 struct nvram_24xx *nv)
6917{
6918#ifdef CONFIG_SPARC
6919 struct qla_hw_data *ha = vha->hw;
6920 struct pci_dev *pdev = ha->pdev;
6921 struct device_node *dp = pci_device_to_OF_node(pdev);
6922 const u8 *val;
6923 int len;
6924
6925 val = of_get_property(dp, "port-wwn", &len);
6926 if (val && len >= WWN_SIZE)
6927 memcpy(nv->port_name, val, WWN_SIZE);
6928
6929 val = of_get_property(dp, "node-wwn", &len);
6930 if (val && len >= WWN_SIZE)
6931 memcpy(nv->node_name, val, WWN_SIZE);
6932#endif
6933}
6934
6935int
6936qla24xx_nvram_config(scsi_qla_host_t *vha)
6937{
6938 int rval;
6939 struct init_cb_24xx *icb;
6940 struct nvram_24xx *nv;
6941 uint32_t *dptr;
6942 uint8_t *dptr1, *dptr2;
6943 uint32_t chksum;
6944 uint16_t cnt;
6945 struct qla_hw_data *ha = vha->hw;
6946
6947 rval = QLA_SUCCESS;
6948 icb = (struct init_cb_24xx *)ha->init_cb;
6949 nv = ha->nvram;
6950
6951
6952 if (ha->port_no == 0) {
6953 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
6954 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
6955 } else {
6956 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6957 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
6958 }
6959
6960 ha->nvram_size = sizeof(struct nvram_24xx);
6961 ha->vpd_size = FA_NVRAM_VPD_SIZE;
6962
6963
6964 ha->vpd = ha->nvram + VPD_OFFSET;
6965 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
6966 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
6967
6968
6969 dptr = (uint32_t *)nv;
6970 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
6971 ha->nvram_size);
6972 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
6973 chksum += le32_to_cpu(*dptr);
6974
6975 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
6976 "Contents of NVRAM\n");
6977 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
6978 (uint8_t *)nv, ha->nvram_size);
6979
6980
6981 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
6982 || nv->id[3] != ' ' ||
6983 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
6984
6985 ql_log(ql_log_warn, vha, 0x006b,
6986 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
6987 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
6988 ql_log(ql_log_warn, vha, 0x006c,
6989 "Falling back to functioning (yet invalid -- WWPN) "
6990 "defaults.\n");
6991
6992
6993
6994
6995 memset(nv, 0, ha->nvram_size);
6996 nv->nvram_version = cpu_to_le16(ICB_VERSION);
6997 nv->version = cpu_to_le16(ICB_VERSION);
6998 nv->frame_payload_size = 2048;
6999 nv->execution_throttle = cpu_to_le16(0xFFFF);
7000 nv->exchange_count = cpu_to_le16(0);
7001 nv->hard_address = cpu_to_le16(124);
7002 nv->port_name[0] = 0x21;
7003 nv->port_name[1] = 0x00 + ha->port_no + 1;
7004 nv->port_name[2] = 0x00;
7005 nv->port_name[3] = 0xe0;
7006 nv->port_name[4] = 0x8b;
7007 nv->port_name[5] = 0x1c;
7008 nv->port_name[6] = 0x55;
7009 nv->port_name[7] = 0x86;
7010 nv->node_name[0] = 0x20;
7011 nv->node_name[1] = 0x00;
7012 nv->node_name[2] = 0x00;
7013 nv->node_name[3] = 0xe0;
7014 nv->node_name[4] = 0x8b;
7015 nv->node_name[5] = 0x1c;
7016 nv->node_name[6] = 0x55;
7017 nv->node_name[7] = 0x86;
7018 qla24xx_nvram_wwn_from_ofw(vha, nv);
7019 nv->login_retry_count = cpu_to_le16(8);
7020 nv->interrupt_delay_timer = cpu_to_le16(0);
7021 nv->login_timeout = cpu_to_le16(0);
7022 nv->firmware_options_1 =
7023 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7024 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7025 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7026 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7027 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7028 nv->efi_parameters = cpu_to_le32(0);
7029 nv->reset_delay = 5;
7030 nv->max_luns_per_target = cpu_to_le16(128);
7031 nv->port_down_retry_count = cpu_to_le16(30);
7032 nv->link_down_timeout = cpu_to_le16(30);
7033
7034 rval = 1;
7035 }
7036
7037 if (qla_tgt_mode_enabled(vha)) {
7038
7039 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7040
7041 nv->host_p &= cpu_to_le32(~BIT_10);
7042 }
7043
7044 qlt_24xx_config_nvram_stage1(vha, nv);
7045
7046
7047 memset(icb, 0, ha->init_cb_size);
7048
7049
7050 dptr1 = (uint8_t *)icb;
7051 dptr2 = (uint8_t *)&nv->version;
7052 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7053 while (cnt--)
7054 *dptr1++ = *dptr2++;
7055
7056 icb->login_retry_count = nv->login_retry_count;
7057 icb->link_down_on_nos = nv->link_down_on_nos;
7058
7059
7060 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7061 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7062 cnt = (uint8_t *)&icb->reserved_3 -
7063 (uint8_t *)&icb->interrupt_delay_timer;
7064 while (cnt--)
7065 *dptr1++ = *dptr2++;
7066 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7067
7068
7069
7070 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7071 "QLA2462");
7072
7073 qlt_24xx_config_nvram_stage2(vha, icb);
7074
7075 if (nv->host_p & cpu_to_le32(BIT_15)) {
7076
7077 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7078 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7079 }
7080
7081
7082 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7083
7084
7085
7086
7087 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7088 icb->node_name[0] &= 0xF0;
7089 }
7090
7091
7092 ha->flags.disable_risc_code_load = 0;
7093 ha->flags.enable_lip_reset = 0;
7094 ha->flags.enable_lip_full_login =
7095 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
7096 ha->flags.enable_target_reset =
7097 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
7098 ha->flags.enable_led_scheme = 0;
7099 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
7100
7101 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7102 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7103
7104 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7105 sizeof(ha->fw_seriallink_options24));
7106
7107
7108 ha->serial0 = icb->port_name[5];
7109 ha->serial1 = icb->port_name[6];
7110 ha->serial2 = icb->port_name[7];
7111 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7112 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7113
7114 icb->execution_throttle = cpu_to_le16(0xFFFF);
7115
7116 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7117
7118
7119 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7120 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7121 if (le16_to_cpu(nv->login_timeout) < 4)
7122 nv->login_timeout = cpu_to_le16(4);
7123 ha->login_timeout = le16_to_cpu(nv->login_timeout);
7124
7125
7126 ha->r_a_tov = 100;
7127
7128 ha->loop_reset_delay = nv->reset_delay;
7129
7130
7131
7132
7133
7134
7135
7136
7137
7138
7139
7140 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7141 ha->loop_down_abort_time =
7142 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7143 } else {
7144 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7145 ha->loop_down_abort_time =
7146 (LOOP_DOWN_TIME - ha->link_down_timeout);
7147 }
7148
7149
7150 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7151 if (qlport_down_retry)
7152 ha->port_down_retry_count = qlport_down_retry;
7153
7154
7155 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7156 if (ha->port_down_retry_count ==
7157 le16_to_cpu(nv->port_down_retry_count) &&
7158 ha->port_down_retry_count > 3)
7159 ha->login_retry_count = ha->port_down_retry_count;
7160 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7161 ha->login_retry_count = ha->port_down_retry_count;
7162 if (ql2xloginretrycount)
7163 ha->login_retry_count = ql2xloginretrycount;
7164
7165
7166 icb->firmware_options_3 |= BIT_8;
7167
7168
7169 if (!vha->flags.init_done) {
7170 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7171 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7172 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7173 le16_to_cpu(icb->interrupt_delay_timer): 2;
7174 }
7175 icb->firmware_options_2 &= cpu_to_le32(
7176 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7177 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7178 ha->zio_mode = QLA_ZIO_MODE_6;
7179
7180 ql_log(ql_log_info, vha, 0x006f,
7181 "ZIO mode %d enabled; timer delay (%d us).\n",
7182 ha->zio_mode, ha->zio_timer * 100);
7183
7184 icb->firmware_options_2 |= cpu_to_le32(
7185 (uint32_t)ha->zio_mode);
7186 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7187 }
7188
7189 if (rval) {
7190 ql_log(ql_log_warn, vha, 0x0070,
7191 "NVRAM configuration failed.\n");
7192 }
7193 return (rval);
7194}
7195
7196uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
7197{
7198 struct qla27xx_image_status pri_image_status, sec_image_status;
7199 uint8_t valid_pri_image, valid_sec_image;
7200 uint32_t *wptr;
7201 uint32_t cnt, chksum, size;
7202 struct qla_hw_data *ha = vha->hw;
7203
7204 valid_pri_image = valid_sec_image = 1;
7205 ha->active_image = 0;
7206 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t);
7207
7208 if (!ha->flt_region_img_status_pri) {
7209 valid_pri_image = 0;
7210 goto check_sec_image;
7211 }
7212
7213 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status),
7214 ha->flt_region_img_status_pri, size);
7215
7216 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7217 ql_dbg(ql_dbg_init, vha, 0x018b,
7218 "Primary image signature (0x%x) not valid\n",
7219 pri_image_status.signature);
7220 valid_pri_image = 0;
7221 goto check_sec_image;
7222 }
7223
7224 wptr = (uint32_t *)(&pri_image_status);
7225 cnt = size;
7226
7227 for (chksum = 0; cnt--; wptr++)
7228 chksum += le32_to_cpu(*wptr);
7229
7230 if (chksum) {
7231 ql_dbg(ql_dbg_init, vha, 0x018c,
7232 "Checksum validation failed for primary image (0x%x)\n",
7233 chksum);
7234 valid_pri_image = 0;
7235 }
7236
7237check_sec_image:
7238 if (!ha->flt_region_img_status_sec) {
7239 valid_sec_image = 0;
7240 goto check_valid_image;
7241 }
7242
7243 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7244 ha->flt_region_img_status_sec, size);
7245
7246 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7247 ql_dbg(ql_dbg_init, vha, 0x018d,
7248 "Secondary image signature(0x%x) not valid\n",
7249 sec_image_status.signature);
7250 valid_sec_image = 0;
7251 goto check_valid_image;
7252 }
7253
7254 wptr = (uint32_t *)(&sec_image_status);
7255 cnt = size;
7256 for (chksum = 0; cnt--; wptr++)
7257 chksum += le32_to_cpu(*wptr);
7258 if (chksum) {
7259 ql_dbg(ql_dbg_init, vha, 0x018e,
7260 "Checksum validation failed for secondary image (0x%x)\n",
7261 chksum);
7262 valid_sec_image = 0;
7263 }
7264
7265check_valid_image:
7266 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1))
7267 ha->active_image = QLA27XX_PRIMARY_IMAGE;
7268 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) {
7269 if (!ha->active_image ||
7270 pri_image_status.generation_number <
7271 sec_image_status.generation_number)
7272 ha->active_image = QLA27XX_SECONDARY_IMAGE;
7273 }
7274
7275 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n",
7276 ha->active_image == 0 ? "default bootld and fw" :
7277 ha->active_image == 1 ? "primary" :
7278 ha->active_image == 2 ? "secondary" :
7279 "Invalid");
7280
7281 return ha->active_image;
7282}
7283
7284static int
7285qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7286 uint32_t faddr)
7287{
7288 int rval = QLA_SUCCESS;
7289 int segments, fragment;
7290 uint32_t *dcode, dlen;
7291 uint32_t risc_addr;
7292 uint32_t risc_size;
7293 uint32_t i;
7294 struct qla_hw_data *ha = vha->hw;
7295 struct req_que *req = ha->req_q_map[0];
7296
7297 ql_dbg(ql_dbg_init, vha, 0x008b,
7298 "FW: Loading firmware from flash (%x).\n", faddr);
7299
7300 rval = QLA_SUCCESS;
7301
7302 segments = FA_RISC_CODE_SEGMENTS;
7303 dcode = (uint32_t *)req->ring;
7304 *srisc_addr = 0;
7305
7306 if (IS_QLA27XX(ha) &&
7307 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
7308 faddr = ha->flt_region_fw_sec;
7309
7310
7311 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
7312 for (i = 0; i < 4; i++)
7313 dcode[i] = be32_to_cpu(dcode[i]);
7314 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7315 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7316 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7317 dcode[3] == 0)) {
7318 ql_log(ql_log_fatal, vha, 0x008c,
7319 "Unable to verify the integrity of flash firmware "
7320 "image.\n");
7321 ql_log(ql_log_fatal, vha, 0x008d,
7322 "Firmware data: %08x %08x %08x %08x.\n",
7323 dcode[0], dcode[1], dcode[2], dcode[3]);
7324
7325 return QLA_FUNCTION_FAILED;
7326 }
7327
7328 while (segments && rval == QLA_SUCCESS) {
7329
7330 qla24xx_read_flash_data(vha, dcode, faddr, 4);
7331
7332 risc_addr = be32_to_cpu(dcode[2]);
7333 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7334 risc_size = be32_to_cpu(dcode[3]);
7335
7336 fragment = 0;
7337 while (risc_size > 0 && rval == QLA_SUCCESS) {
7338 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7339 if (dlen > risc_size)
7340 dlen = risc_size;
7341
7342 ql_dbg(ql_dbg_init, vha, 0x008e,
7343 "Loading risc segment@ risc addr %x "
7344 "number of dwords 0x%x offset 0x%x.\n",
7345 risc_addr, dlen, faddr);
7346
7347 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7348 for (i = 0; i < dlen; i++)
7349 dcode[i] = swab32(dcode[i]);
7350
7351 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7352 dlen);
7353 if (rval) {
7354 ql_log(ql_log_fatal, vha, 0x008f,
7355 "Failed to load segment %d of firmware.\n",
7356 fragment);
7357 return QLA_FUNCTION_FAILED;
7358 }
7359
7360 faddr += dlen;
7361 risc_addr += dlen;
7362 risc_size -= dlen;
7363 fragment++;
7364 }
7365
7366
7367 segments--;
7368 }
7369
7370 if (!IS_QLA27XX(ha))
7371 return rval;
7372
7373 if (ha->fw_dump_template)
7374 vfree(ha->fw_dump_template);
7375 ha->fw_dump_template = NULL;
7376 ha->fw_dump_template_len = 0;
7377
7378 ql_dbg(ql_dbg_init, vha, 0x0161,
7379 "Loading fwdump template from %x\n", faddr);
7380 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7381 risc_size = be32_to_cpu(dcode[2]);
7382 ql_dbg(ql_dbg_init, vha, 0x0162,
7383 "-> array size %x dwords\n", risc_size);
7384 if (risc_size == 0 || risc_size == ~0)
7385 goto default_template;
7386
7387 dlen = (risc_size - 8) * sizeof(*dcode);
7388 ql_dbg(ql_dbg_init, vha, 0x0163,
7389 "-> template allocating %x bytes...\n", dlen);
7390 ha->fw_dump_template = vmalloc(dlen);
7391 if (!ha->fw_dump_template) {
7392 ql_log(ql_log_warn, vha, 0x0164,
7393 "Failed fwdump template allocate %x bytes.\n", risc_size);
7394 goto default_template;
7395 }
7396
7397 faddr += 7;
7398 risc_size -= 8;
7399 dcode = ha->fw_dump_template;
7400 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7401 for (i = 0; i < risc_size; i++)
7402 dcode[i] = le32_to_cpu(dcode[i]);
7403
7404 if (!qla27xx_fwdt_template_valid(dcode)) {
7405 ql_log(ql_log_warn, vha, 0x0165,
7406 "Failed fwdump template validate\n");
7407 goto default_template;
7408 }
7409
7410 dlen = qla27xx_fwdt_template_size(dcode);
7411 ql_dbg(ql_dbg_init, vha, 0x0166,
7412 "-> template size %x bytes\n", dlen);
7413 if (dlen > risc_size * sizeof(*dcode)) {
7414 ql_log(ql_log_warn, vha, 0x0167,
7415 "Failed fwdump template exceeds array by %zx bytes\n",
7416 (size_t)(dlen - risc_size * sizeof(*dcode)));
7417 goto default_template;
7418 }
7419 ha->fw_dump_template_len = dlen;
7420 return rval;
7421
7422default_template:
7423 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
7424 if (ha->fw_dump_template)
7425 vfree(ha->fw_dump_template);
7426 ha->fw_dump_template = NULL;
7427 ha->fw_dump_template_len = 0;
7428
7429 dlen = qla27xx_fwdt_template_default_size();
7430 ql_dbg(ql_dbg_init, vha, 0x0169,
7431 "-> template allocating %x bytes...\n", dlen);
7432 ha->fw_dump_template = vmalloc(dlen);
7433 if (!ha->fw_dump_template) {
7434 ql_log(ql_log_warn, vha, 0x016a,
7435 "Failed fwdump template allocate %x bytes.\n", risc_size);
7436 goto failed_template;
7437 }
7438
7439 dcode = ha->fw_dump_template;
7440 risc_size = dlen / sizeof(*dcode);
7441 memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
7442 for (i = 0; i < risc_size; i++)
7443 dcode[i] = be32_to_cpu(dcode[i]);
7444
7445 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7446 ql_log(ql_log_warn, vha, 0x016b,
7447 "Failed fwdump template validate\n");
7448 goto failed_template;
7449 }
7450
7451 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7452 ql_dbg(ql_dbg_init, vha, 0x016c,
7453 "-> template size %x bytes\n", dlen);
7454 ha->fw_dump_template_len = dlen;
7455 return rval;
7456
7457failed_template:
7458 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
7459 if (ha->fw_dump_template)
7460 vfree(ha->fw_dump_template);
7461 ha->fw_dump_template = NULL;
7462 ha->fw_dump_template_len = 0;
7463 return rval;
7464}
7465
7466#define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
7467
7468int
7469qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7470{
7471 int rval;
7472 int i, fragment;
7473 uint16_t *wcode, *fwcode;
7474 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7475 struct fw_blob *blob;
7476 struct qla_hw_data *ha = vha->hw;
7477 struct req_que *req = ha->req_q_map[0];
7478
7479
7480 blob = qla2x00_request_firmware(vha);
7481 if (!blob) {
7482 ql_log(ql_log_info, vha, 0x0083,
7483 "Firmware image unavailable.\n");
7484 ql_log(ql_log_info, vha, 0x0084,
7485 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
7486 return QLA_FUNCTION_FAILED;
7487 }
7488
7489 rval = QLA_SUCCESS;
7490
7491 wcode = (uint16_t *)req->ring;
7492 *srisc_addr = 0;
7493 fwcode = (uint16_t *)blob->fw->data;
7494 fwclen = 0;
7495
7496
7497 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7498 ql_log(ql_log_fatal, vha, 0x0085,
7499 "Unable to verify integrity of firmware image (%Zd).\n",
7500 blob->fw->size);
7501 goto fail_fw_integrity;
7502 }
7503 for (i = 0; i < 4; i++)
7504 wcode[i] = be16_to_cpu(fwcode[i + 4]);
7505 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7506 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7507 wcode[2] == 0 && wcode[3] == 0)) {
7508 ql_log(ql_log_fatal, vha, 0x0086,
7509 "Unable to verify integrity of firmware image.\n");
7510 ql_log(ql_log_fatal, vha, 0x0087,
7511 "Firmware data: %04x %04x %04x %04x.\n",
7512 wcode[0], wcode[1], wcode[2], wcode[3]);
7513 goto fail_fw_integrity;
7514 }
7515
7516 seg = blob->segs;
7517 while (*seg && rval == QLA_SUCCESS) {
7518 risc_addr = *seg;
7519 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7520 risc_size = be16_to_cpu(fwcode[3]);
7521
7522
7523 fwclen += risc_size * sizeof(uint16_t);
7524 if (blob->fw->size < fwclen) {
7525 ql_log(ql_log_fatal, vha, 0x0088,
7526 "Unable to verify integrity of firmware image "
7527 "(%Zd).\n", blob->fw->size);
7528 goto fail_fw_integrity;
7529 }
7530
7531 fragment = 0;
7532 while (risc_size > 0 && rval == QLA_SUCCESS) {
7533 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7534 if (wlen > risc_size)
7535 wlen = risc_size;
7536 ql_dbg(ql_dbg_init, vha, 0x0089,
7537 "Loading risc segment@ risc addr %x number of "
7538 "words 0x%x.\n", risc_addr, wlen);
7539
7540 for (i = 0; i < wlen; i++)
7541 wcode[i] = swab16(fwcode[i]);
7542
7543 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7544 wlen);
7545 if (rval) {
7546 ql_log(ql_log_fatal, vha, 0x008a,
7547 "Failed to load segment %d of firmware.\n",
7548 fragment);
7549 break;
7550 }
7551
7552 fwcode += wlen;
7553 risc_addr += wlen;
7554 risc_size -= wlen;
7555 fragment++;
7556 }
7557
7558
7559 seg++;
7560 }
7561 return rval;
7562
7563fail_fw_integrity:
7564 return QLA_FUNCTION_FAILED;
7565}
7566
7567static int
7568qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7569{
7570 int rval;
7571 int segments, fragment;
7572 uint32_t *dcode, dlen;
7573 uint32_t risc_addr;
7574 uint32_t risc_size;
7575 uint32_t i;
7576 struct fw_blob *blob;
7577 const uint32_t *fwcode;
7578 uint32_t fwclen;
7579 struct qla_hw_data *ha = vha->hw;
7580 struct req_que *req = ha->req_q_map[0];
7581
7582
7583 blob = qla2x00_request_firmware(vha);
7584 if (!blob) {
7585 ql_log(ql_log_warn, vha, 0x0090,
7586 "Firmware image unavailable.\n");
7587 ql_log(ql_log_warn, vha, 0x0091,
7588 "Firmware images can be retrieved from: "
7589 QLA_FW_URL ".\n");
7590
7591 return QLA_FUNCTION_FAILED;
7592 }
7593
7594 ql_dbg(ql_dbg_init, vha, 0x0092,
7595 "FW: Loading via request-firmware.\n");
7596
7597 rval = QLA_SUCCESS;
7598
7599 segments = FA_RISC_CODE_SEGMENTS;
7600 dcode = (uint32_t *)req->ring;
7601 *srisc_addr = 0;
7602 fwcode = (uint32_t *)blob->fw->data;
7603 fwclen = 0;
7604
7605
7606 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7607 ql_log(ql_log_fatal, vha, 0x0093,
7608 "Unable to verify integrity of firmware image (%Zd).\n",
7609 blob->fw->size);
7610 return QLA_FUNCTION_FAILED;
7611 }
7612 for (i = 0; i < 4; i++)
7613 dcode[i] = be32_to_cpu(fwcode[i + 4]);
7614 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7615 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7616 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7617 dcode[3] == 0)) {
7618 ql_log(ql_log_fatal, vha, 0x0094,
7619 "Unable to verify integrity of firmware image (%Zd).\n",
7620 blob->fw->size);
7621 ql_log(ql_log_fatal, vha, 0x0095,
7622 "Firmware data: %08x %08x %08x %08x.\n",
7623 dcode[0], dcode[1], dcode[2], dcode[3]);
7624 return QLA_FUNCTION_FAILED;
7625 }
7626
7627 while (segments && rval == QLA_SUCCESS) {
7628 risc_addr = be32_to_cpu(fwcode[2]);
7629 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7630 risc_size = be32_to_cpu(fwcode[3]);
7631
7632
7633 fwclen += risc_size * sizeof(uint32_t);
7634 if (blob->fw->size < fwclen) {
7635 ql_log(ql_log_fatal, vha, 0x0096,
7636 "Unable to verify integrity of firmware image "
7637 "(%Zd).\n", blob->fw->size);
7638 return QLA_FUNCTION_FAILED;
7639 }
7640
7641 fragment = 0;
7642 while (risc_size > 0 && rval == QLA_SUCCESS) {
7643 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7644 if (dlen > risc_size)
7645 dlen = risc_size;
7646
7647 ql_dbg(ql_dbg_init, vha, 0x0097,
7648 "Loading risc segment@ risc addr %x "
7649 "number of dwords 0x%x.\n", risc_addr, dlen);
7650
7651 for (i = 0; i < dlen; i++)
7652 dcode[i] = swab32(fwcode[i]);
7653
7654 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7655 dlen);
7656 if (rval) {
7657 ql_log(ql_log_fatal, vha, 0x0098,
7658 "Failed to load segment %d of firmware.\n",
7659 fragment);
7660 return QLA_FUNCTION_FAILED;
7661 }
7662
7663 fwcode += dlen;
7664 risc_addr += dlen;
7665 risc_size -= dlen;
7666 fragment++;
7667 }
7668
7669
7670 segments--;
7671 }
7672
7673 if (!IS_QLA27XX(ha))
7674 return rval;
7675
7676 if (ha->fw_dump_template)
7677 vfree(ha->fw_dump_template);
7678 ha->fw_dump_template = NULL;
7679 ha->fw_dump_template_len = 0;
7680
7681 ql_dbg(ql_dbg_init, vha, 0x171,
7682 "Loading fwdump template from %lx\n",
7683 (void *)fwcode - (void *)blob->fw->data);
7684 risc_size = be32_to_cpu(fwcode[2]);
7685 ql_dbg(ql_dbg_init, vha, 0x172,
7686 "-> array size %x dwords\n", risc_size);
7687 if (risc_size == 0 || risc_size == ~0)
7688 goto default_template;
7689
7690 dlen = (risc_size - 8) * sizeof(*fwcode);
7691 ql_dbg(ql_dbg_init, vha, 0x0173,
7692 "-> template allocating %x bytes...\n", dlen);
7693 ha->fw_dump_template = vmalloc(dlen);
7694 if (!ha->fw_dump_template) {
7695 ql_log(ql_log_warn, vha, 0x0174,
7696 "Failed fwdump template allocate %x bytes.\n", risc_size);
7697 goto default_template;
7698 }
7699
7700 fwcode += 7;
7701 risc_size -= 8;
7702 dcode = ha->fw_dump_template;
7703 for (i = 0; i < risc_size; i++)
7704 dcode[i] = le32_to_cpu(fwcode[i]);
7705
7706 if (!qla27xx_fwdt_template_valid(dcode)) {
7707 ql_log(ql_log_warn, vha, 0x0175,
7708 "Failed fwdump template validate\n");
7709 goto default_template;
7710 }
7711
7712 dlen = qla27xx_fwdt_template_size(dcode);
7713 ql_dbg(ql_dbg_init, vha, 0x0176,
7714 "-> template size %x bytes\n", dlen);
7715 if (dlen > risc_size * sizeof(*fwcode)) {
7716 ql_log(ql_log_warn, vha, 0x0177,
7717 "Failed fwdump template exceeds array by %zx bytes\n",
7718 (size_t)(dlen - risc_size * sizeof(*fwcode)));
7719 goto default_template;
7720 }
7721 ha->fw_dump_template_len = dlen;
7722 return rval;
7723
7724default_template:
7725 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
7726 if (ha->fw_dump_template)
7727 vfree(ha->fw_dump_template);
7728 ha->fw_dump_template = NULL;
7729 ha->fw_dump_template_len = 0;
7730
7731 dlen = qla27xx_fwdt_template_default_size();
7732 ql_dbg(ql_dbg_init, vha, 0x0179,
7733 "-> template allocating %x bytes...\n", dlen);
7734 ha->fw_dump_template = vmalloc(dlen);
7735 if (!ha->fw_dump_template) {
7736 ql_log(ql_log_warn, vha, 0x017a,
7737 "Failed fwdump template allocate %x bytes.\n", risc_size);
7738 goto failed_template;
7739 }
7740
7741 dcode = ha->fw_dump_template;
7742 risc_size = dlen / sizeof(*fwcode);
7743 fwcode = qla27xx_fwdt_template_default();
7744 for (i = 0; i < risc_size; i++)
7745 dcode[i] = be32_to_cpu(fwcode[i]);
7746
7747 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7748 ql_log(ql_log_warn, vha, 0x017b,
7749 "Failed fwdump template validate\n");
7750 goto failed_template;
7751 }
7752
7753 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7754 ql_dbg(ql_dbg_init, vha, 0x017c,
7755 "-> template size %x bytes\n", dlen);
7756 ha->fw_dump_template_len = dlen;
7757 return rval;
7758
7759failed_template:
7760 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
7761 if (ha->fw_dump_template)
7762 vfree(ha->fw_dump_template);
7763 ha->fw_dump_template = NULL;
7764 ha->fw_dump_template_len = 0;
7765 return rval;
7766}
7767
7768int
7769qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7770{
7771 int rval;
7772
7773 if (ql2xfwloadbin == 1)
7774 return qla81xx_load_risc(vha, srisc_addr);
7775
7776
7777
7778
7779
7780
7781 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7782 if (rval == QLA_SUCCESS)
7783 return rval;
7784
7785 return qla24xx_load_risc_flash(vha, srisc_addr,
7786 vha->hw->flt_region_fw);
7787}
7788
7789int
7790qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7791{
7792 int rval;
7793 struct qla_hw_data *ha = vha->hw;
7794
7795 if (ql2xfwloadbin == 2)
7796 goto try_blob_fw;
7797
7798
7799
7800
7801
7802
7803
7804 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
7805 if (rval == QLA_SUCCESS)
7806 return rval;
7807
7808try_blob_fw:
7809 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7810 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
7811 return rval;
7812
7813 ql_log(ql_log_info, vha, 0x0099,
7814 "Attempting to fallback to golden firmware.\n");
7815 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
7816 if (rval != QLA_SUCCESS)
7817 return rval;
7818
7819 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
7820 ha->flags.running_gold_fw = 1;
7821 return rval;
7822}
7823
7824void
7825qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
7826{
7827 int ret, retries;
7828 struct qla_hw_data *ha = vha->hw;
7829
7830 if (ha->flags.pci_channel_io_perm_failure)
7831 return;
7832 if (!IS_FWI2_CAPABLE(ha))
7833 return;
7834 if (!ha->fw_major_version)
7835 return;
7836 if (!ha->flags.fw_started)
7837 return;
7838
7839 ret = qla2x00_stop_firmware(vha);
7840 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
7841 ret != QLA_INVALID_COMMAND && retries ; retries--) {
7842 ha->isp_ops->reset_chip(vha);
7843 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
7844 continue;
7845 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
7846 continue;
7847 ql_log(ql_log_info, vha, 0x8015,
7848 "Attempting retry of stop-firmware command.\n");
7849 ret = qla2x00_stop_firmware(vha);
7850 }
7851
7852 QLA_FW_STOPPED(ha);
7853 ha->flags.fw_init_done = 0;
7854}
7855
7856int
7857qla24xx_configure_vhba(scsi_qla_host_t *vha)
7858{
7859 int rval = QLA_SUCCESS;
7860 int rval2;
7861 uint16_t mb[MAILBOX_REGISTER_COUNT];
7862 struct qla_hw_data *ha = vha->hw;
7863 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7864 struct req_que *req;
7865 struct rsp_que *rsp;
7866
7867 if (!vha->vp_idx)
7868 return -EINVAL;
7869
7870 rval = qla2x00_fw_ready(base_vha);
7871 if (vha->qpair)
7872 req = vha->qpair->req;
7873 else
7874 req = ha->req_q_map[0];
7875 rsp = req->rsp;
7876
7877 if (rval == QLA_SUCCESS) {
7878 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7879 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
7880 }
7881
7882 vha->flags.management_server_logged_in = 0;
7883
7884
7885 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
7886 BIT_1);
7887 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
7888 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
7889 ql_dbg(ql_dbg_init, vha, 0x0120,
7890 "Failed SNS login: loop_id=%x, rval2=%d\n",
7891 NPH_SNS, rval2);
7892 else
7893 ql_dbg(ql_dbg_init, vha, 0x0103,
7894 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
7895 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
7896 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
7897 return (QLA_FUNCTION_FAILED);
7898 }
7899
7900 atomic_set(&vha->loop_down_timer, 0);
7901 atomic_set(&vha->loop_state, LOOP_UP);
7902 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7903 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
7904 rval = qla2x00_loop_resync(base_vha);
7905
7906 return rval;
7907}
7908
7909
7910
7911static LIST_HEAD(qla_cs84xx_list);
7912static DEFINE_MUTEX(qla_cs84xx_mutex);
7913
7914static struct qla_chip_state_84xx *
7915qla84xx_get_chip(struct scsi_qla_host *vha)
7916{
7917 struct qla_chip_state_84xx *cs84xx;
7918 struct qla_hw_data *ha = vha->hw;
7919
7920 mutex_lock(&qla_cs84xx_mutex);
7921
7922
7923 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
7924 if (cs84xx->bus == ha->pdev->bus) {
7925 kref_get(&cs84xx->kref);
7926 goto done;
7927 }
7928 }
7929
7930 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
7931 if (!cs84xx)
7932 goto done;
7933
7934 kref_init(&cs84xx->kref);
7935 spin_lock_init(&cs84xx->access_lock);
7936 mutex_init(&cs84xx->fw_update_mutex);
7937 cs84xx->bus = ha->pdev->bus;
7938
7939 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
7940done:
7941 mutex_unlock(&qla_cs84xx_mutex);
7942 return cs84xx;
7943}
7944
7945static void
7946__qla84xx_chip_release(struct kref *kref)
7947{
7948 struct qla_chip_state_84xx *cs84xx =
7949 container_of(kref, struct qla_chip_state_84xx, kref);
7950
7951 mutex_lock(&qla_cs84xx_mutex);
7952 list_del(&cs84xx->list);
7953 mutex_unlock(&qla_cs84xx_mutex);
7954 kfree(cs84xx);
7955}
7956
7957void
7958qla84xx_put_chip(struct scsi_qla_host *vha)
7959{
7960 struct qla_hw_data *ha = vha->hw;
7961 if (ha->cs84xx)
7962 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
7963}
7964
7965static int
7966qla84xx_init_chip(scsi_qla_host_t *vha)
7967{
7968 int rval;
7969 uint16_t status[2];
7970 struct qla_hw_data *ha = vha->hw;
7971
7972 mutex_lock(&ha->cs84xx->fw_update_mutex);
7973
7974 rval = qla84xx_verify_chip(vha, status);
7975
7976 mutex_unlock(&ha->cs84xx->fw_update_mutex);
7977
7978 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
7979 QLA_SUCCESS;
7980}
7981
7982
7983
7984int
7985qla81xx_nvram_config(scsi_qla_host_t *vha)
7986{
7987 int rval;
7988 struct init_cb_81xx *icb;
7989 struct nvram_81xx *nv;
7990 uint32_t *dptr;
7991 uint8_t *dptr1, *dptr2;
7992 uint32_t chksum;
7993 uint16_t cnt;
7994 struct qla_hw_data *ha = vha->hw;
7995
7996 rval = QLA_SUCCESS;
7997 icb = (struct init_cb_81xx *)ha->init_cb;
7998 nv = ha->nvram;
7999
8000
8001 ha->nvram_size = sizeof(struct nvram_81xx);
8002 ha->vpd_size = FA_NVRAM_VPD_SIZE;
8003 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8004 ha->vpd_size = FA_VPD_SIZE_82XX;
8005
8006
8007 ha->vpd = ha->nvram + VPD_OFFSET;
8008 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
8009 ha->vpd_size);
8010
8011
8012 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
8013 ha->nvram_size);
8014 dptr = (uint32_t *)nv;
8015 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8016 chksum += le32_to_cpu(*dptr);
8017
8018 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8019 "Contents of NVRAM:\n");
8020 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8021 (uint8_t *)nv, ha->nvram_size);
8022
8023
8024 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
8025 || nv->id[3] != ' ' ||
8026 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
8027
8028 ql_log(ql_log_info, vha, 0x0073,
8029 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
8030 "version=0x%x.\n", chksum, nv->id[0],
8031 le16_to_cpu(nv->nvram_version));
8032 ql_log(ql_log_info, vha, 0x0074,
8033 "Falling back to functioning (yet invalid -- WWPN) "
8034 "defaults.\n");
8035
8036
8037
8038
8039 memset(nv, 0, ha->nvram_size);
8040 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8041 nv->version = cpu_to_le16(ICB_VERSION);
8042 nv->frame_payload_size = 2048;
8043 nv->execution_throttle = cpu_to_le16(0xFFFF);
8044 nv->exchange_count = cpu_to_le16(0);
8045 nv->port_name[0] = 0x21;
8046 nv->port_name[1] = 0x00 + ha->port_no + 1;
8047 nv->port_name[2] = 0x00;
8048 nv->port_name[3] = 0xe0;
8049 nv->port_name[4] = 0x8b;
8050 nv->port_name[5] = 0x1c;
8051 nv->port_name[6] = 0x55;
8052 nv->port_name[7] = 0x86;
8053 nv->node_name[0] = 0x20;
8054 nv->node_name[1] = 0x00;
8055 nv->node_name[2] = 0x00;
8056 nv->node_name[3] = 0xe0;
8057 nv->node_name[4] = 0x8b;
8058 nv->node_name[5] = 0x1c;
8059 nv->node_name[6] = 0x55;
8060 nv->node_name[7] = 0x86;
8061 nv->login_retry_count = cpu_to_le16(8);
8062 nv->interrupt_delay_timer = cpu_to_le16(0);
8063 nv->login_timeout = cpu_to_le16(0);
8064 nv->firmware_options_1 =
8065 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8066 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8067 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8068 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8069 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8070 nv->efi_parameters = cpu_to_le32(0);
8071 nv->reset_delay = 5;
8072 nv->max_luns_per_target = cpu_to_le16(128);
8073 nv->port_down_retry_count = cpu_to_le16(30);
8074 nv->link_down_timeout = cpu_to_le16(180);
8075 nv->enode_mac[0] = 0x00;
8076 nv->enode_mac[1] = 0xC0;
8077 nv->enode_mac[2] = 0xDD;
8078 nv->enode_mac[3] = 0x04;
8079 nv->enode_mac[4] = 0x05;
8080 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
8081
8082 rval = 1;
8083 }
8084
8085 if (IS_T10_PI_CAPABLE(ha))
8086 nv->frame_payload_size &= ~7;
8087
8088 qlt_81xx_config_nvram_stage1(vha, nv);
8089
8090
8091 memset(icb, 0, ha->init_cb_size);
8092
8093
8094 dptr1 = (uint8_t *)icb;
8095 dptr2 = (uint8_t *)&nv->version;
8096 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8097 while (cnt--)
8098 *dptr1++ = *dptr2++;
8099
8100 icb->login_retry_count = nv->login_retry_count;
8101
8102
8103 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8104 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8105 cnt = (uint8_t *)&icb->reserved_5 -
8106 (uint8_t *)&icb->interrupt_delay_timer;
8107 while (cnt--)
8108 *dptr1++ = *dptr2++;
8109
8110 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8111
8112 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
8113 icb->enode_mac[0] = 0x00;
8114 icb->enode_mac[1] = 0xC0;
8115 icb->enode_mac[2] = 0xDD;
8116 icb->enode_mac[3] = 0x04;
8117 icb->enode_mac[4] = 0x05;
8118 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
8119 }
8120
8121
8122 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
8123 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8124
8125
8126
8127 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8128 "QLE8XXX");
8129
8130 qlt_81xx_config_nvram_stage2(vha, icb);
8131
8132
8133 if (nv->host_p & cpu_to_le32(BIT_15)) {
8134 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8135 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8136 }
8137
8138
8139 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8140
8141
8142
8143
8144 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8145 icb->node_name[0] &= 0xF0;
8146 }
8147
8148
8149 ha->flags.disable_risc_code_load = 0;
8150 ha->flags.enable_lip_reset = 0;
8151 ha->flags.enable_lip_full_login =
8152 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
8153 ha->flags.enable_target_reset =
8154 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
8155 ha->flags.enable_led_scheme = 0;
8156 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
8157
8158 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8159 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8160
8161
8162 ha->serial0 = icb->port_name[5];
8163 ha->serial1 = icb->port_name[6];
8164 ha->serial2 = icb->port_name[7];
8165 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8166 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8167
8168 icb->execution_throttle = cpu_to_le16(0xFFFF);
8169
8170 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8171
8172
8173 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8174 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8175 if (le16_to_cpu(nv->login_timeout) < 4)
8176 nv->login_timeout = cpu_to_le16(4);
8177 ha->login_timeout = le16_to_cpu(nv->login_timeout);
8178
8179
8180 ha->r_a_tov = 100;
8181
8182 ha->loop_reset_delay = nv->reset_delay;
8183
8184
8185
8186
8187
8188
8189
8190
8191
8192
8193
8194 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8195 ha->loop_down_abort_time =
8196 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8197 } else {
8198 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8199 ha->loop_down_abort_time =
8200 (LOOP_DOWN_TIME - ha->link_down_timeout);
8201 }
8202
8203
8204 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8205 if (qlport_down_retry)
8206 ha->port_down_retry_count = qlport_down_retry;
8207
8208
8209 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8210 if (ha->port_down_retry_count ==
8211 le16_to_cpu(nv->port_down_retry_count) &&
8212 ha->port_down_retry_count > 3)
8213 ha->login_retry_count = ha->port_down_retry_count;
8214 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8215 ha->login_retry_count = ha->port_down_retry_count;
8216 if (ql2xloginretrycount)
8217 ha->login_retry_count = ql2xloginretrycount;
8218
8219
8220 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha)))
8221 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
8222
8223
8224 if (!vha->flags.init_done) {
8225 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8226 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8227 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8228 le16_to_cpu(icb->interrupt_delay_timer): 2;
8229 }
8230 icb->firmware_options_2 &= cpu_to_le32(
8231 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8232 vha->flags.process_response_queue = 0;
8233 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8234 ha->zio_mode = QLA_ZIO_MODE_6;
8235
8236 ql_log(ql_log_info, vha, 0x0075,
8237 "ZIO mode %d enabled; timer delay (%d us).\n",
8238 ha->zio_mode,
8239 ha->zio_timer * 100);
8240
8241 icb->firmware_options_2 |= cpu_to_le32(
8242 (uint32_t)ha->zio_mode);
8243 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8244 vha->flags.process_response_queue = 1;
8245 }
8246
8247
8248 icb->firmware_options_3 |= BIT_0;
8249
8250
8251 icb->firmware_options_3 |= BIT_8;
8252
8253 if (IS_QLA27XX(ha)) {
8254 icb->firmware_options_3 |= BIT_8;
8255 ql_dbg(ql_log_info, vha, 0x0075,
8256 "Enabling direct connection.\n");
8257 }
8258
8259 if (rval) {
8260 ql_log(ql_log_warn, vha, 0x0076,
8261 "NVRAM configuration failed.\n");
8262 }
8263 return (rval);
8264}
8265
8266int
8267qla82xx_restart_isp(scsi_qla_host_t *vha)
8268{
8269 int status, rval;
8270 struct qla_hw_data *ha = vha->hw;
8271 struct req_que *req = ha->req_q_map[0];
8272 struct rsp_que *rsp = ha->rsp_q_map[0];
8273 struct scsi_qla_host *vp;
8274 unsigned long flags;
8275
8276 status = qla2x00_init_rings(vha);
8277 if (!status) {
8278 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8279 ha->flags.chip_reset_done = 1;
8280
8281 status = qla2x00_fw_ready(vha);
8282 if (!status) {
8283
8284 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
8285 vha->flags.online = 1;
8286 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8287 }
8288
8289
8290 if ((vha->device_flags & DFLG_NO_CABLE))
8291 status = 0;
8292 }
8293
8294 if (!status) {
8295 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8296
8297 if (!atomic_read(&vha->loop_down_timer)) {
8298
8299
8300
8301
8302 vha->marker_needed = 1;
8303 }
8304
8305 ha->isp_ops->enable_intrs(ha);
8306
8307 ha->isp_abort_cnt = 0;
8308 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8309
8310
8311 status = qla82xx_check_md_needed(vha);
8312
8313 if (ha->fce) {
8314 ha->flags.fce_enabled = 1;
8315 memset(ha->fce, 0,
8316 fce_calc_size(ha->fce_bufs));
8317 rval = qla2x00_enable_fce_trace(vha,
8318 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8319 &ha->fce_bufs);
8320 if (rval) {
8321 ql_log(ql_log_warn, vha, 0x8001,
8322 "Unable to reinitialize FCE (%d).\n",
8323 rval);
8324 ha->flags.fce_enabled = 0;
8325 }
8326 }
8327
8328 if (ha->eft) {
8329 memset(ha->eft, 0, EFT_SIZE);
8330 rval = qla2x00_enable_eft_trace(vha,
8331 ha->eft_dma, EFT_NUM_BUFFERS);
8332 if (rval) {
8333 ql_log(ql_log_warn, vha, 0x8010,
8334 "Unable to reinitialize EFT (%d).\n",
8335 rval);
8336 }
8337 }
8338 }
8339
8340 if (!status) {
8341 ql_dbg(ql_dbg_taskm, vha, 0x8011,
8342 "qla82xx_restart_isp succeeded.\n");
8343
8344 spin_lock_irqsave(&ha->vport_slock, flags);
8345 list_for_each_entry(vp, &ha->vp_list, list) {
8346 if (vp->vp_idx) {
8347 atomic_inc(&vp->vref_count);
8348 spin_unlock_irqrestore(&ha->vport_slock, flags);
8349
8350 qla2x00_vp_abort_isp(vp);
8351
8352 spin_lock_irqsave(&ha->vport_slock, flags);
8353 atomic_dec(&vp->vref_count);
8354 }
8355 }
8356 spin_unlock_irqrestore(&ha->vport_slock, flags);
8357
8358 } else {
8359 ql_log(ql_log_warn, vha, 0x8016,
8360 "qla82xx_restart_isp **** FAILED ****.\n");
8361 }
8362
8363 return status;
8364}
8365
8366void
8367qla81xx_update_fw_options(scsi_qla_host_t *vha)
8368{
8369 struct qla_hw_data *ha = vha->hw;
8370
8371
8372 if (ql2xfwholdabts)
8373 ha->fw_options[3] |= BIT_12;
8374
8375
8376 if (ha->operating_mode == P2P) {
8377 ha->fw_options[2] |= BIT_3;
8378 ql_dbg(ql_dbg_disc, vha, 0x2103,
8379 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8380 __func__, ha->fw_options[2]);
8381 }
8382
8383
8384 if (ha->operating_mode == P2P) {
8385 ha->fw_options[2] |= BIT_3;
8386 ql_dbg(ql_dbg_disc, vha, 0x2103,
8387 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8388 __func__, ha->fw_options[2]);
8389 }
8390
8391
8392 if (ql2xmvasynctoatio) {
8393 if (qla_tgt_mode_enabled(vha) ||
8394 qla_dual_mode_enabled(vha))
8395 ha->fw_options[2] |= BIT_11;
8396 else
8397 ha->fw_options[2] &= ~BIT_11;
8398 }
8399
8400 if (qla_tgt_mode_enabled(vha) ||
8401 qla_dual_mode_enabled(vha)) {
8402
8403 ha->fw_options[1] |= BIT_8;
8404 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8;
8405
8406
8407 ha->fw_options[2] |= BIT_4;
8408 } else {
8409 ha->fw_options[1] &= ~BIT_8;
8410 ha->fw_options[10] &= 0x00ff;
8411
8412 ha->fw_options[2] &= ~BIT_4;
8413 }
8414
8415 if (ql2xetsenable) {
8416
8417 memset(ha->fw_options, 0, sizeof(ha->fw_options));
8418 ha->fw_options[2] |= BIT_9;
8419 }
8420
8421 ql_dbg(ql_dbg_init, vha, 0x00e9,
8422 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
8423 __func__, ha->fw_options[1], ha->fw_options[2],
8424 ha->fw_options[3], vha->host->active_mode);
8425
8426 qla2x00_set_fw_options(vha, ha->fw_options);
8427}
8428
8429
8430
8431
8432
8433
8434
8435
8436
8437
8438
8439
8440
8441
8442
8443
8444
8445
8446
8447static int
8448qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8449{
8450 int i, entries;
8451 uint8_t pid_match, wwn_match;
8452 int priority;
8453 uint32_t pid1, pid2;
8454 uint64_t wwn1, wwn2;
8455 struct qla_fcp_prio_entry *pri_entry;
8456 struct qla_hw_data *ha = vha->hw;
8457
8458 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
8459 return -1;
8460
8461 priority = -1;
8462 entries = ha->fcp_prio_cfg->num_entries;
8463 pri_entry = &ha->fcp_prio_cfg->entry[0];
8464
8465 for (i = 0; i < entries; i++) {
8466 pid_match = wwn_match = 0;
8467
8468 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8469 pri_entry++;
8470 continue;
8471 }
8472
8473
8474 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8475 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8476 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8477 if (pid1 == INVALID_PORT_ID)
8478 pid_match++;
8479 else if (pid1 == pid2)
8480 pid_match++;
8481 }
8482
8483
8484 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8485 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8486 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8487 if (pid1 == INVALID_PORT_ID)
8488 pid_match++;
8489 else if (pid1 == pid2)
8490 pid_match++;
8491 }
8492
8493
8494 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8495 wwn1 = wwn_to_u64(vha->port_name);
8496 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8497 if (wwn2 == (uint64_t)-1)
8498 wwn_match++;
8499 else if (wwn1 == wwn2)
8500 wwn_match++;
8501 }
8502
8503
8504 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8505 wwn1 = wwn_to_u64(fcport->port_name);
8506 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8507 if (wwn2 == (uint64_t)-1)
8508 wwn_match++;
8509 else if (wwn1 == wwn2)
8510 wwn_match++;
8511 }
8512
8513 if (pid_match == 2 || wwn_match == 2) {
8514
8515 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8516 priority = pri_entry->tag;
8517 break;
8518 }
8519
8520 pri_entry++;
8521 }
8522
8523 return priority;
8524}
8525
8526
8527
8528
8529
8530
8531
8532
8533
8534
8535
8536
8537
8538
8539
8540int
8541qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8542{
8543 int ret;
8544 int priority;
8545 uint16_t mb[5];
8546
8547 if (fcport->port_type != FCT_TARGET ||
8548 fcport->loop_id == FC_NO_LOOP_ID)
8549 return QLA_FUNCTION_FAILED;
8550
8551 priority = qla24xx_get_fcp_prio(vha, fcport);
8552 if (priority < 0)
8553 return QLA_FUNCTION_FAILED;
8554
8555 if (IS_P3P_TYPE(vha->hw)) {
8556 fcport->fcp_prio = priority & 0xf;
8557 return QLA_SUCCESS;
8558 }
8559
8560 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
8561 if (ret == QLA_SUCCESS) {
8562 if (fcport->fcp_prio != priority)
8563 ql_dbg(ql_dbg_user, vha, 0x709e,
8564 "Updated FCP_CMND priority - value=%d loop_id=%d "
8565 "port_id=%02x%02x%02x.\n", priority,
8566 fcport->loop_id, fcport->d_id.b.domain,
8567 fcport->d_id.b.area, fcport->d_id.b.al_pa);
8568 fcport->fcp_prio = priority & 0xf;
8569 } else
8570 ql_dbg(ql_dbg_user, vha, 0x704f,
8571 "Unable to update FCP_CMND priority - ret=0x%x for "
8572 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8573 fcport->d_id.b.domain, fcport->d_id.b.area,
8574 fcport->d_id.b.al_pa);
8575 return ret;
8576}
8577
8578
8579
8580
8581
8582
8583
8584
8585
8586
8587
8588
8589
8590
8591int
8592qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8593{
8594 int ret;
8595 fc_port_t *fcport;
8596
8597 ret = QLA_FUNCTION_FAILED;
8598
8599 list_for_each_entry(fcport, &vha->vp_fcports, list)
8600 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8601
8602 return ret;
8603}
8604
8605struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha,
8606 int qos, int vp_idx, bool startqp)
8607{
8608 int rsp_id = 0;
8609 int req_id = 0;
8610 int i;
8611 struct qla_hw_data *ha = vha->hw;
8612 uint16_t qpair_id = 0;
8613 struct qla_qpair *qpair = NULL;
8614 struct qla_msix_entry *msix;
8615
8616 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8617 ql_log(ql_log_warn, vha, 0x00181,
8618 "FW/Driver is not multi-queue capable.\n");
8619 return NULL;
8620 }
8621
8622 if (ql2xmqsupport || ql2xnvmeenable) {
8623 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8624 if (qpair == NULL) {
8625 ql_log(ql_log_warn, vha, 0x0182,
8626 "Failed to allocate memory for queue pair.\n");
8627 return NULL;
8628 }
8629 memset(qpair, 0, sizeof(struct qla_qpair));
8630
8631 qpair->hw = vha->hw;
8632 qpair->vha = vha;
8633 qpair->qp_lock_ptr = &qpair->qp_lock;
8634 spin_lock_init(&qpair->qp_lock);
8635 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
8636
8637
8638 mutex_lock(&ha->mq_lock);
8639 qpair_id = find_first_zero_bit(ha->qpair_qid_map,
8640 ha->max_qpairs);
8641 if (ha->num_qpairs >= ha->max_qpairs) {
8642 mutex_unlock(&ha->mq_lock);
8643 ql_log(ql_log_warn, vha, 0x0183,
8644 "No resources to create additional q pair.\n");
8645 goto fail_qid_map;
8646 }
8647 ha->num_qpairs++;
8648 set_bit(qpair_id, ha->qpair_qid_map);
8649 ha->queue_pair_map[qpair_id] = qpair;
8650 qpair->id = qpair_id;
8651 qpair->vp_idx = vp_idx;
8652 qpair->fw_started = ha->flags.fw_started;
8653 INIT_LIST_HEAD(&qpair->hints_list);
8654 qpair->chip_reset = ha->base_qpair->chip_reset;
8655 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8656 qpair->enable_explicit_conf =
8657 ha->base_qpair->enable_explicit_conf;
8658
8659 for (i = 0; i < ha->msix_count; i++) {
8660 msix = &ha->msix_entries[i];
8661 if (msix->in_use)
8662 continue;
8663 qpair->msix = msix;
8664 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
8665 "Vector %x selected for qpair\n", msix->vector);
8666 break;
8667 }
8668 if (!qpair->msix) {
8669 ql_log(ql_log_warn, vha, 0x0184,
8670 "Out of MSI-X vectors!.\n");
8671 goto fail_msix;
8672 }
8673
8674 qpair->msix->in_use = 1;
8675 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8676 qpair->pdev = ha->pdev;
8677 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
8678 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
8679
8680 mutex_unlock(&ha->mq_lock);
8681
8682
8683 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
8684 if (!rsp_id) {
8685 ql_log(ql_log_warn, vha, 0x0185,
8686 "Failed to create response queue.\n");
8687 goto fail_rsp;
8688 }
8689
8690 qpair->rsp = ha->rsp_q_map[rsp_id];
8691
8692
8693 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8694 startqp);
8695 if (!req_id) {
8696 ql_log(ql_log_warn, vha, 0x0186,
8697 "Failed to create request queue.\n");
8698 goto fail_req;
8699 }
8700
8701 qpair->req = ha->req_q_map[req_id];
8702 qpair->rsp->req = qpair->req;
8703 qpair->rsp->qpair = qpair;
8704
8705 qla_cpu_update(qpair, smp_processor_id());
8706
8707 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8708 if (ha->fw_attributes & BIT_4)
8709 qpair->difdix_supported = 1;
8710 }
8711
8712 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
8713 if (!qpair->srb_mempool) {
8714 ql_log(ql_log_warn, vha, 0xd036,
8715 "Failed to create srb mempool for qpair %d\n",
8716 qpair->id);
8717 goto fail_mempool;
8718 }
8719
8720
8721 qpair->online = 1;
8722
8723 if (!vha->flags.qpairs_available)
8724 vha->flags.qpairs_available = 1;
8725
8726 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
8727 "Request/Response queue pair created, id %d\n",
8728 qpair->id);
8729 ql_dbg(ql_dbg_init, vha, 0x0187,
8730 "Request/Response queue pair created, id %d\n",
8731 qpair->id);
8732 }
8733 return qpair;
8734
8735fail_mempool:
8736fail_req:
8737 qla25xx_delete_rsp_que(vha, qpair->rsp);
8738fail_rsp:
8739 mutex_lock(&ha->mq_lock);
8740 qpair->msix->in_use = 0;
8741 list_del(&qpair->qp_list_elem);
8742 if (list_empty(&vha->qp_list))
8743 vha->flags.qpairs_available = 0;
8744fail_msix:
8745 ha->queue_pair_map[qpair_id] = NULL;
8746 clear_bit(qpair_id, ha->qpair_qid_map);
8747 ha->num_qpairs--;
8748 mutex_unlock(&ha->mq_lock);
8749fail_qid_map:
8750 kfree(qpair);
8751 return NULL;
8752}
8753
8754int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
8755{
8756 int ret = QLA_FUNCTION_FAILED;
8757 struct qla_hw_data *ha = qpair->hw;
8758
8759 qpair->delete_in_progress = 1;
8760 while (atomic_read(&qpair->ref_count))
8761 msleep(500);
8762
8763 ret = qla25xx_delete_req_que(vha, qpair->req);
8764 if (ret != QLA_SUCCESS)
8765 goto fail;
8766
8767 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
8768 if (ret != QLA_SUCCESS)
8769 goto fail;
8770
8771 mutex_lock(&ha->mq_lock);
8772 ha->queue_pair_map[qpair->id] = NULL;
8773 clear_bit(qpair->id, ha->qpair_qid_map);
8774 ha->num_qpairs--;
8775 list_del(&qpair->qp_list_elem);
8776 if (list_empty(&vha->qp_list)) {
8777 vha->flags.qpairs_available = 0;
8778 vha->flags.qpairs_req_created = 0;
8779 vha->flags.qpairs_rsp_created = 0;
8780 }
8781 mempool_destroy(qpair->srb_mempool);
8782 kfree(qpair);
8783 mutex_unlock(&ha->mq_lock);
8784
8785 return QLA_SUCCESS;
8786fail:
8787 return ret;
8788}
8789
