LXR linux/drivers/staging/rtl8712/rtl8712

   1/******************************************************************************
   2 *
   3 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of version 2 of the GNU General Public License as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12 * more details.
  13 *
  14 * You should have received a copy of the GNU General Public License along with
  15 * this program; if not, write to the Free Software Foundation, Inc.,
  16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17 *
  18 * Modifications for inclusion into the Linux staging tree are
  19 * Copyright(c) 2010 Larry Finger. All rights reserved.
  20 *
  21 * Contact information:
  22 * WLAN FAE <wlanfae@realtek.com>
  23 * Larry Finger <Larry.Finger@lwfinger.net>
  24 *
  25 ******************************************************************************/
  26#ifndef __RTL8712_HAL_H__
  27#define __RTL8712_HAL_H__
  28
  29enum _HW_VERSION {
  30        RTL8712_FPGA,
  31        RTL8712_1stCUT, /*A Cut (RTL8712_ASIC)*/
  32        RTL8712_2ndCUT, /*B Cut*/
  33        RTL8712_3rdCUT, /*C Cut*/
  34};
  35
  36enum _LOOPBACK_TYPE {
  37        RTL8712_AIR_TRX = 0,
  38        RTL8712_MAC_LBK,
  39        RTL8712_BB_LBK,
  40        RTL8712_MAC_FW_LBK = 4,
  41        RTL8712_BB_FW_LBK = 8,
  42};
  43
  44enum RTL871X_HCI_TYPE {
  45        RTL8712_SDIO,
  46        RTL8712_USB,
  47};
  48
  49enum RTL8712_RF_CONFIG {
  50        RTL8712_RF_1T1R,
  51        RTL8712_RF_1T2R,
  52        RTL8712_RF_2T2R
  53};
  54
  55enum _RTL8712_HCI_TYPE_ {
  56        RTL8712_HCI_TYPE_PCIE = 0x01,
  57        RTL8712_HCI_TYPE_AP_PCIE = 0x81,
  58        RTL8712_HCI_TYPE_USB = 0x02,
  59        RTL8712_HCI_TYPE_92USB = 0x02,
  60        RTL8712_HCI_TYPE_AP_USB = 0x82,
  61        RTL8712_HCI_TYPE_72USB = 0x12,
  62        RTL8712_HCI_TYPE_SDIO = 0x04,
  63        RTL8712_HCI_TYPE_72SDIO = 0x14
  64};
  65
  66struct fw_priv {   /*8-bytes alignment required*/
  67        /*--- long word 0 ----*/
  68        unsigned char signature_0;  /*0x12: CE product, 0x92: IT product*/
  69        unsigned char signature_1;  /*0x87: CE product, 0x81: IT product*/
  70        unsigned char hci_sel; /*0x81: PCI-AP, 01:PCIe, 02: 92S-U, 0x82: USB-AP,
  71                            * 0x12: 72S-U, 03:SDIO*/
  72        unsigned char chip_version; /*the same value as register value*/
  73        unsigned char customer_ID_0; /*customer  ID low byte*/
  74        unsigned char customer_ID_1; /*customer  ID high byte*/
  75        unsigned char rf_config;  /*0x11:  1T1R, 0x12: 1T2R, 0x92: 1T2R turbo,
  76                             * 0x22: 2T2R*/
  77        unsigned char usb_ep_num;  /* 4: 4EP, 6: 6EP, 11: 11EP*/
  78        /*--- long word 1 ----*/
  79        unsigned char regulatory_class_0; /*regulatory class bit map 0*/
  80        unsigned char regulatory_class_1; /*regulatory class bit map 1*/
  81        unsigned char regulatory_class_2; /*regulatory class bit map 2*/
  82        unsigned char regulatory_class_3; /*regulatory class bit map 3*/
  83        unsigned char rfintfs;    /* 0:SWSI, 1:HWSI, 2:HWPI*/
  84        unsigned char def_nettype;
  85        unsigned char turboMode;
  86        unsigned char lowPowerMode;/* 0: normal mode, 1: low power mode*/
  87        /*--- long word 2 ----*/
  88        unsigned char lbk_mode; /*0x00: normal, 0x03: MACLBK, 0x01: PHYLBK*/
  89        unsigned char mp_mode; /* 1: for MP use, 0: for normal driver */
  90        unsigned char vcsType; /* 0:off 1:on 2:auto */
  91        unsigned char vcsMode; /* 1:RTS/CTS 2:CTS to self */
  92        unsigned char rsvd022;
  93        unsigned char rsvd023;
  94        unsigned char rsvd024;
  95        unsigned char rsvd025;
  96        /*--- long word 3 ----*/
  97        unsigned char qos_en;    /*1: QoS enable*/
  98        unsigned char bw_40MHz_en;   /*1: 40MHz BW enable*/
  99        unsigned char AMSDU2AMPDU_en;   /*1: 4181 convert AMSDU to AMPDU,
 100                                   * 0: disable*/
 101        unsigned char AMPDU_en;   /*1: 11n AMPDU enable*/
 102        unsigned char rate_control_offload; /*1: FW offloads,0: driver handles*/
 103        unsigned char aggregation_offload;  /*1: FW offloads,0: driver handles*/
 104        unsigned char rsvd030;
 105        unsigned char rsvd031;
 106        /*--- long word 4 ----*/
 107        unsigned char beacon_offload;   /* 1. FW offloads, 0: driver handles*/
 108        unsigned char MLME_offload;   /* 2. FW offloads, 0: driver handles*/
 109        unsigned char hwpc_offload;   /* 3. FW offloads, 0: driver handles*/
 110        unsigned char tcp_checksum_offload; /*4. FW offloads,0: driver handles*/
 111        unsigned char tcp_offload;    /* 5. FW offloads, 0: driver handles*/
 112        unsigned char ps_control_offload; /* 6. FW offloads, 0: driver handles*/
 113        unsigned char WWLAN_offload;   /* 7. FW offloads, 0: driver handles*/
 114        unsigned char rsvd040;
 115        /*--- long word 5 ----*/
 116        unsigned char tcp_tx_frame_len_L;  /*tcp tx packet length low byte*/
 117        unsigned char tcp_tx_frame_len_H;  /*tcp tx packet length high byte*/
 118        unsigned char tcp_rx_frame_len_L;  /*tcp rx packet length low byte*/
 119        unsigned char tcp_rx_frame_len_H;  /*tcp rx packet length high byte*/
 120        unsigned char rsvd050;
 121        unsigned char rsvd051;
 122        unsigned char rsvd052;
 123        unsigned char rsvd053;
 124};
 125
 126struct fw_hdr {/*8-byte alignment required*/
 127        unsigned short  signature;
 128        unsigned short  version;        /*0x8000 ~ 0x8FFF for FPGA version,
 129                                         *0x0000 ~ 0x7FFF for ASIC version,*/
 130        unsigned int            dmem_size;    /*define the size of boot loader*/
 131        unsigned int            img_IMEM_size; /*define the size of FW in IMEM*/
 132        unsigned int            img_SRAM_size; /*define the size of FW in SRAM*/
 133        unsigned int            fw_priv_sz; /*define the size of DMEM variable*/
 134        unsigned short  efuse_addr;
 135        unsigned short  h2ccnd_resp_addr;
 136        unsigned int            SVNRevision;
 137        unsigned int            release_time; /*Mon:Day:Hr:Min*/
 138        struct fw_priv  fwpriv;
 139};
 140
 141struct hal_priv {
 142        /*Endpoint handles*/
 143        struct  net_device *pipehdls_r8712[10];
 144        u8 (*hal_bus_init)(struct _adapter *adapter);
 145};
 146
 147uint     rtl8712_hal_init(struct _adapter *padapter);
 148int rtl871x_load_fw(struct _adapter *padapter);
 149
 150#endif
 151