LXR linux/arch/sparc/include/asm/tlbflush

   1#ifndef _SPARC_TLBFLUSH_H
   2#define _SPARC_TLBFLUSH_H
   3
   4#include <asm/cachetlb_32.h>
   5
   6#define flush_tlb_all() \
   7        sparc32_cachetlb_ops->tlb_all()
   8#define flush_tlb_mm(mm) \
   9        sparc32_cachetlb_ops->tlb_mm(mm)
  10#define flush_tlb_range(vma, start, end) \
  11        sparc32_cachetlb_ops->tlb_range(vma, start, end)
  12#define flush_tlb_page(vma, addr) \
  13        sparc32_cachetlb_ops->tlb_page(vma, addr)
  14
  15/*
  16 * This is a kludge, until I know better. --zaitcev XXX
  17 */
  18static inline void flush_tlb_kernel_range(unsigned long start,
  19                                          unsigned long end)
  20{
  21        flush_tlb_all();
  22}
  23
  24#endif /* _SPARC_TLBFLUSH_H */
  25