1/******************************************************************************* 2 3 Intel PRO/10GbE Linux driver 4 Copyright(c) 1999 - 2008 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27*******************************************************************************/ 28 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31#include "ixgb_hw.h" 32#include "ixgb_ee.h" 33/* Local prototypes */ 34static u16 ixgb_shift_in_bits(struct ixgb_hw *hw); 35 36static void ixgb_shift_out_bits(struct ixgb_hw *hw, 37 u16 data, 38 u16 count); 39static void ixgb_standby_eeprom(struct ixgb_hw *hw); 40 41static bool ixgb_wait_eeprom_command(struct ixgb_hw *hw); 42 43static void ixgb_cleanup_eeprom(struct ixgb_hw *hw); 44 45/****************************************************************************** 46 * Raises the EEPROM's clock input. 47 * 48 * hw - Struct containing variables accessed by shared code 49 * eecd_reg - EECD's current value 50 *****************************************************************************/ 51static void 52ixgb_raise_clock(struct ixgb_hw *hw, 53 u32 *eecd_reg) 54{ 55 /* Raise the clock input to the EEPROM (by setting the SK bit), and then 56 * wait 50 microseconds. 57 */ 58 *eecd_reg = *eecd_reg | IXGB_EECD_SK; 59 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 60 IXGB_WRITE_FLUSH(hw); 61 udelay(50); 62} 63 64/****************************************************************************** 65 * Lowers the EEPROM's clock input. 66 * 67 * hw - Struct containing variables accessed by shared code 68 * eecd_reg - EECD's current value 69 *****************************************************************************/ 70static void 71ixgb_lower_clock(struct ixgb_hw *hw, 72 u32 *eecd_reg) 73{ 74 /* Lower the clock input to the EEPROM (by clearing the SK bit), and then 75 * wait 50 microseconds. 76 */ 77 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; 78 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 79 IXGB_WRITE_FLUSH(hw); 80 udelay(50); 81} 82 83/****************************************************************************** 84 * Shift data bits out to the EEPROM. 85 * 86 * hw - Struct containing variables accessed by shared code 87 * data - data to send to the EEPROM 88 * count - number of bits to shift out 89 *****************************************************************************/ 90static void 91ixgb_shift_out_bits(struct ixgb_hw *hw, 92 u16 data, 93 u16 count) 94{ 95 u32 eecd_reg; 96 u32 mask; 97 98 /* We need to shift "count" bits out to the EEPROM. So, value in the 99 * "data" parameter will be shifted out to the EEPROM one bit at a time. 100 * In order to do this, "data" must be broken down into bits. 101 */ 102 mask = 0x01 << (count - 1); 103 eecd_reg = IXGB_READ_REG(hw, EECD); 104 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); 105 do { 106 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1", 107 * and then raising and then lowering the clock (the SK bit controls 108 * the clock input to the EEPROM). A "0" is shifted out to the EEPROM 109 * by setting "DI" to "0" and then raising and then lowering the clock. 110 */ 111 eecd_reg &= ~IXGB_EECD_DI; 112 113 if (data & mask) 114 eecd_reg |= IXGB_EECD_DI; 115 116 IXGB_WRITE_REG(hw, EECD, eecd_reg); 117 IXGB_WRITE_FLUSH(hw); 118 119 udelay(50); 120 121 ixgb_raise_clock(hw, &eecd_reg); 122 ixgb_lower_clock(hw, &eecd_reg); 123 124 mask = mask >> 1; 125 126 } while (mask); 127 128 /* We leave the "DI" bit set to "0" when we leave this routine. */ 129 eecd_reg &= ~IXGB_EECD_DI; 130 IXGB_WRITE_REG(hw, EECD, eecd_reg); 131} 132 133/****************************************************************************** 134 * Shift data bits in from the EEPROM 135 * 136 * hw - Struct containing variables accessed by shared code 137 *****************************************************************************/ 138static u16 139ixgb_shift_in_bits(struct ixgb_hw *hw) 140{ 141 u32 eecd_reg; 142 u32 i; 143 u16 data; 144 145 /* In order to read a register from the EEPROM, we need to shift 16 bits 146 * in from the EEPROM. Bits are "shifted in" by raising the clock input to 147 * the EEPROM (setting the SK bit), and then reading the value of the "DO" 148 * bit. During this "shifting in" process the "DI" bit should always be 149 * clear.. 150 */ 151 152 eecd_reg = IXGB_READ_REG(hw, EECD); 153 154 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); 155 data = 0; 156 157 for (i = 0; i < 16; i++) { 158 data = data << 1; 159 ixgb_raise_clock(hw, &eecd_reg); 160 161 eecd_reg = IXGB_READ_REG(hw, EECD); 162 163 eecd_reg &= ~(IXGB_EECD_DI); 164 if (eecd_reg & IXGB_EECD_DO) 165 data |= 1; 166 167 ixgb_lower_clock(hw, &eecd_reg); 168 } 169 170 return data; 171} 172 173/****************************************************************************** 174 * Prepares EEPROM for access 175 * 176 * hw - Struct containing variables accessed by shared code 177 * 178 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This 179 * function should be called before issuing a command to the EEPROM. 180 *****************************************************************************/ 181static void 182ixgb_setup_eeprom(struct ixgb_hw *hw) 183{ 184 u32 eecd_reg; 185 186 eecd_reg = IXGB_READ_REG(hw, EECD); 187 188 /* Clear SK and DI */ 189 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI); 190 IXGB_WRITE_REG(hw, EECD, eecd_reg); 191 192 /* Set CS */ 193 eecd_reg |= IXGB_EECD_CS; 194 IXGB_WRITE_REG(hw, EECD, eecd_reg); 195} 196 197/****************************************************************************** 198 * Returns EEPROM to a "standby" state 199 * 200 * hw - Struct containing variables accessed by shared code 201 *****************************************************************************/ 202static void 203ixgb_standby_eeprom(struct ixgb_hw *hw) 204{ 205 u32 eecd_reg; 206 207 eecd_reg = IXGB_READ_REG(hw, EECD); 208 209 /* Deselect EEPROM */ 210 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK); 211 IXGB_WRITE_REG(hw, EECD, eecd_reg); 212 IXGB_WRITE_FLUSH(hw); 213 udelay(50); 214 215 /* Clock high */ 216 eecd_reg |= IXGB_EECD_SK; 217 IXGB_WRITE_REG(hw, EECD, eecd_reg); 218 IXGB_WRITE_FLUSH(hw); 219 udelay(50); 220 221 /* Select EEPROM */ 222 eecd_reg |= IXGB_EECD_CS; 223 IXGB_WRITE_REG(hw, EECD, eecd_reg); 224 IXGB_WRITE_FLUSH(hw); 225 udelay(50); 226 227 /* Clock low */ 228 eecd_reg &= ~IXGB_EECD_SK; 229 IXGB_WRITE_REG(hw, EECD, eecd_reg); 230 IXGB_WRITE_FLUSH(hw); 231 udelay(50); 232} 233 234/****************************************************************************** 235 * Raises then lowers the EEPROM's clock pin 236 * 237 * hw - Struct containing variables accessed by shared code 238 *****************************************************************************/ 239static void 240ixgb_clock_eeprom(struct ixgb_hw *hw) 241{ 242 u32 eecd_reg; 243 244 eecd_reg = IXGB_READ_REG(hw, EECD); 245 246 /* Rising edge of clock */ 247 eecd_reg |= IXGB_EECD_SK; 248 IXGB_WRITE_REG(hw, EECD, eecd_reg); 249 IXGB_WRITE_FLUSH(hw); 250 udelay(50); 251 252 /* Falling edge of clock */ 253 eecd_reg &= ~IXGB_EECD_SK; 254 IXGB_WRITE_REG(hw, EECD, eecd_reg); 255 IXGB_WRITE_FLUSH(hw); 256 udelay(50); 257} 258 259/****************************************************************************** 260 * Terminates a command by lowering the EEPROM's chip select pin 261 * 262 * hw - Struct containing variables accessed by shared code 263 *****************************************************************************/ 264static void 265ixgb_cleanup_eeprom(struct ixgb_hw *hw) 266{ 267 u32 eecd_reg; 268 269 eecd_reg = IXGB_READ_REG(hw, EECD); 270 271 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI); 272 273 IXGB_WRITE_REG(hw, EECD, eecd_reg); 274 275 ixgb_clock_eeprom(hw); 276} 277 278/****************************************************************************** 279 * Waits for the EEPROM to finish the current command. 280 * 281 * hw - Struct containing variables accessed by shared code 282 * 283 * The command is done when the EEPROM's data out pin goes high. 284 * 285 * Returns: 286 * true: EEPROM data pin is high before timeout. 287 * false: Time expired. 288 *****************************************************************************/ 289static bool 290ixgb_wait_eeprom_command(struct ixgb_hw *hw) 291{ 292 u32 eecd_reg; 293 u32 i; 294 295 /* Toggle the CS line. This in effect tells to EEPROM to actually execute 296 * the command in question. 297 */ 298 ixgb_standby_eeprom(hw); 299 300 /* Now read DO repeatedly until is high (equal to '1'). The EEPROM will 301 * signal that the command has been completed by raising the DO signal. 302 * If DO does not go high in 10 milliseconds, then error out. 303 */ 304 for (i = 0; i < 200; i++) { 305 eecd_reg = IXGB_READ_REG(hw, EECD); 306 307 if (eecd_reg & IXGB_EECD_DO) 308 return true; 309 310 udelay(50); 311 } 312 ASSERT(0); 313 return false; 314} 315 316/****************************************************************************** 317 * Verifies that the EEPROM has a valid checksum 318 * 319 * hw - Struct containing variables accessed by shared code 320 * 321 * Reads the first 64 16 bit words of the EEPROM and sums the values read. 322 * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is 323 * valid. 324 * 325 * Returns: 326 * true: Checksum is valid 327 * false: Checksum is not valid. 328 *****************************************************************************/ 329bool 330ixgb_validate_eeprom_checksum(struct ixgb_hw *hw) 331{ 332 u16 checksum = 0; 333 u16 i; 334 335 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) 336 checksum += ixgb_read_eeprom(hw, i); 337 338 if (checksum == (u16) EEPROM_SUM) 339 return true; 340 else 341 return false; 342} 343 344/****************************************************************************** 345 * Calculates the EEPROM checksum and writes it to the EEPROM 346 * 347 * hw - Struct containing variables accessed by shared code 348 * 349 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA. 350 * Writes the difference to word offset 63 of the EEPROM. 351 *****************************************************************************/ 352void 353ixgb_update_eeprom_checksum(struct ixgb_hw *hw) 354{ 355 u16 checksum = 0; 356 u16 i; 357 358 for (i = 0; i < EEPROM_CHECKSUM_REG; i++) 359 checksum += ixgb_read_eeprom(hw, i); 360 361 checksum = (u16) EEPROM_SUM - checksum; 362 363 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum); 364} 365 366/****************************************************************************** 367 * Writes a 16 bit word to a given offset in the EEPROM. 368 * 369 * hw - Struct containing variables accessed by shared code 370 * reg - offset within the EEPROM to be written to 371 * data - 16 bit word to be written to the EEPROM 372 * 373 * If ixgb_update_eeprom_checksum is not called after this function, the 374 * EEPROM will most likely contain an invalid checksum. 375 * 376 *****************************************************************************/ 377void 378ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data) 379{ 380 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 381 382 /* Prepare the EEPROM for writing */ 383 ixgb_setup_eeprom(hw); 384 385 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode 386 * plus 4-bit dummy). This puts the EEPROM into write/erase mode. 387 */ 388 ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5); 389 ixgb_shift_out_bits(hw, 0, 4); 390 391 /* Prepare the EEPROM */ 392 ixgb_standby_eeprom(hw); 393 394 /* Send the Write command (3-bit opcode + 6-bit addr) */ 395 ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3); 396 ixgb_shift_out_bits(hw, offset, 6); 397 398 /* Send the data */ 399 ixgb_shift_out_bits(hw, data, 16); 400 401 ixgb_wait_eeprom_command(hw); 402 403 /* Recover from write */ 404 ixgb_standby_eeprom(hw); 405 406 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit 407 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase 408 * mode. 409 */ 410 ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5); 411 ixgb_shift_out_bits(hw, 0, 4); 412 413 /* Done with writing */ 414 ixgb_cleanup_eeprom(hw); 415 416 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ 417 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR); 418} 419 420/****************************************************************************** 421 * Reads a 16 bit word from the EEPROM. 422 * 423 * hw - Struct containing variables accessed by shared code 424 * offset - offset of 16 bit word in the EEPROM to read 425 * 426 * Returns: 427 * The 16-bit value read from the eeprom 428 *****************************************************************************/ 429u16 430ixgb_read_eeprom(struct ixgb_hw *hw, 431 u16 offset) 432{ 433 u16 data; 434 435 /* Prepare the EEPROM for reading */ 436 ixgb_setup_eeprom(hw); 437 438 /* Send the READ command (opcode + addr) */ 439 ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3); 440 /* 441 * We have a 64 word EEPROM, there are 6 address bits 442 */ 443 ixgb_shift_out_bits(hw, offset, 6); 444 445 /* Read the data */ 446 data = ixgb_shift_in_bits(hw); 447 448 /* End this read operation */ 449 ixgb_standby_eeprom(hw); 450 451 return data; 452} 453 454/****************************************************************************** 455 * Reads eeprom and stores data in shared structure. 456 * Validates eeprom checksum and eeprom signature. 457 * 458 * hw - Struct containing variables accessed by shared code 459 * 460 * Returns: 461 * true: if eeprom read is successful 462 * false: otherwise. 463 *****************************************************************************/ 464bool 465ixgb_get_eeprom_data(struct ixgb_hw *hw) 466{ 467 u16 i; 468 u16 checksum = 0; 469 struct ixgb_ee_map_type *ee_map; 470 471 ENTER(); 472 473 ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 474 475 pr_debug("Reading eeprom data\n"); 476 for (i = 0; i < IXGB_EEPROM_SIZE ; i++) { 477 u16 ee_data; 478 ee_data = ixgb_read_eeprom(hw, i); 479 checksum += ee_data; 480 hw->eeprom[i] = cpu_to_le16(ee_data); 481 } 482 483 if (checksum != (u16) EEPROM_SUM) { 484 pr_debug("Checksum invalid\n"); 485 /* clear the init_ctrl_reg_1 to signify that the cache is 486 * invalidated */ 487 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR); 488 return false; 489 } 490 491 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK)) 492 != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) { 493 pr_debug("Signature invalid\n"); 494 return false; 495 } 496 497 return true; 498} 499 500/****************************************************************************** 501 * Local function to check if the eeprom signature is good 502 * If the eeprom signature is good, calls ixgb)get_eeprom_data. 503 * 504 * hw - Struct containing variables accessed by shared code 505 * 506 * Returns: 507 * true: eeprom signature was good and the eeprom read was successful 508 * false: otherwise. 509 ******************************************************************************/ 510static bool 511ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw) 512{ 513 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 514 515 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK)) 516 == cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) { 517 return true; 518 } else { 519 return ixgb_get_eeprom_data(hw); 520 } 521} 522 523/****************************************************************************** 524 * return a word from the eeprom 525 * 526 * hw - Struct containing variables accessed by shared code 527 * index - Offset of eeprom word 528 * 529 * Returns: 530 * Word at indexed offset in eeprom, if valid, 0 otherwise. 531 ******************************************************************************/ 532__le16 533ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index) 534{ 535 536 if (index < IXGB_EEPROM_SIZE && ixgb_check_and_get_eeprom_data(hw)) 537 return hw->eeprom[index]; 538 539 return 0; 540} 541 542/****************************************************************************** 543 * return the mac address from EEPROM 544 * 545 * hw - Struct containing variables accessed by shared code 546 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise 547 * 548 * Returns: None. 549 ******************************************************************************/ 550void 551ixgb_get_ee_mac_addr(struct ixgb_hw *hw, 552 u8 *mac_addr) 553{ 554 int i; 555 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 556 557 ENTER(); 558 559 if (ixgb_check_and_get_eeprom_data(hw)) { 560 for (i = 0; i < ETH_ALEN; i++) { 561 mac_addr[i] = ee_map->mac_addr[i]; 562 } 563 pr_debug("eeprom mac address = %pM\n", mac_addr); 564 } 565} 566 567 568/****************************************************************************** 569 * return the Printed Board Assembly number from EEPROM 570 * 571 * hw - Struct containing variables accessed by shared code 572 * 573 * Returns: 574 * PBA number if EEPROM contents are valid, 0 otherwise 575 ******************************************************************************/ 576u32 577ixgb_get_ee_pba_number(struct ixgb_hw *hw) 578{ 579 if (ixgb_check_and_get_eeprom_data(hw)) 580 return le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG]) 581 | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16); 582 583 return 0; 584} 585 586 587/****************************************************************************** 588 * return the Device Id from EEPROM 589 * 590 * hw - Struct containing variables accessed by shared code 591 * 592 * Returns: 593 * Device Id if EEPROM contents are valid, 0 otherwise 594 ******************************************************************************/ 595u16 596ixgb_get_ee_device_id(struct ixgb_hw *hw) 597{ 598 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 599 600 if (ixgb_check_and_get_eeprom_data(hw)) 601 return le16_to_cpu(ee_map->device_id); 602 603 return 0; 604} 605 606