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9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/delay.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/kernel.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18#include <linux/list.h>
19#include <linux/module.h>
20
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23#include "meter.h"
24#include "ade7754.h"
25
26static int ade7754_spi_write_reg_8(struct device *dev,
27 u8 reg_address,
28 u8 val)
29{
30 int ret;
31 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
32 struct ade7754_state *st = iio_priv(indio_dev);
33
34 mutex_lock(&st->buf_lock);
35 st->tx[0] = ADE7754_WRITE_REG(reg_address);
36 st->tx[1] = val;
37
38 ret = spi_write(st->us, st->tx, 2);
39 mutex_unlock(&st->buf_lock);
40
41 return ret;
42}
43
44static int ade7754_spi_write_reg_16(struct device *dev,
45 u8 reg_address,
46 u16 value)
47{
48 int ret;
49 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
50 struct ade7754_state *st = iio_priv(indio_dev);
51
52 mutex_lock(&st->buf_lock);
53 st->tx[0] = ADE7754_WRITE_REG(reg_address);
54 st->tx[1] = (value >> 8) & 0xFF;
55 st->tx[2] = value & 0xFF;
56 ret = spi_write(st->us, st->tx, 3);
57 mutex_unlock(&st->buf_lock);
58
59 return ret;
60}
61
62static int ade7754_spi_read_reg_8(struct device *dev,
63 u8 reg_address,
64 u8 *val)
65{
66 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
67 struct ade7754_state *st = iio_priv(indio_dev);
68 int ret;
69
70 ret = spi_w8r8(st->us, ADE7754_READ_REG(reg_address));
71 if (ret < 0) {
72 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
73 reg_address);
74 return ret;
75 }
76 *val = ret;
77
78 return 0;
79}
80
81static int ade7754_spi_read_reg_16(struct device *dev,
82 u8 reg_address,
83 u16 *val)
84{
85 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
86 struct ade7754_state *st = iio_priv(indio_dev);
87 int ret;
88
89 ret = spi_w8r16(st->us, ADE7754_READ_REG(reg_address));
90 if (ret < 0) {
91 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
92 reg_address);
93 return ret;
94 }
95
96 *val = ret;
97 *val = be16_to_cpup(val);
98
99 return 0;
100}
101
102static int ade7754_spi_read_reg_24(struct device *dev,
103 u8 reg_address,
104 u32 *val)
105{
106 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
107 struct ade7754_state *st = iio_priv(indio_dev);
108 int ret;
109 struct spi_transfer xfers[] = {
110 {
111 .tx_buf = st->tx,
112 .rx_buf = st->rx,
113 .bits_per_word = 8,
114 .len = 4,
115 },
116 };
117
118 mutex_lock(&st->buf_lock);
119 st->tx[0] = ADE7754_READ_REG(reg_address);
120 st->tx[1] = 0;
121 st->tx[2] = 0;
122 st->tx[3] = 0;
123
124 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
125 if (ret) {
126 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
127 reg_address);
128 goto error_ret;
129 }
130 *val = (st->rx[1] << 16) | (st->rx[2] << 8) | st->rx[3];
131
132error_ret:
133 mutex_unlock(&st->buf_lock);
134 return ret;
135}
136
137static ssize_t ade7754_read_8bit(struct device *dev,
138 struct device_attribute *attr,
139 char *buf)
140{
141 int ret;
142 u8 val = 0;
143 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
144
145 ret = ade7754_spi_read_reg_8(dev, this_attr->address, &val);
146 if (ret)
147 return ret;
148
149 return sprintf(buf, "%u\n", val);
150}
151
152static ssize_t ade7754_read_16bit(struct device *dev,
153 struct device_attribute *attr,
154 char *buf)
155{
156 int ret;
157 u16 val = 0;
158 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
159
160 ret = ade7754_spi_read_reg_16(dev, this_attr->address, &val);
161 if (ret)
162 return ret;
163
164 return sprintf(buf, "%u\n", val);
165}
166
167static ssize_t ade7754_read_24bit(struct device *dev,
168 struct device_attribute *attr,
169 char *buf)
170{
171 int ret;
172 u32 val = 0;
173 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
174
175 ret = ade7754_spi_read_reg_24(dev, this_attr->address, &val);
176 if (ret)
177 return ret;
178
179 return sprintf(buf, "%u\n", val & 0xFFFFFF);
180}
181
182static ssize_t ade7754_write_8bit(struct device *dev,
183 struct device_attribute *attr,
184 const char *buf,
185 size_t len)
186{
187 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
188 int ret;
189 long val;
190
191 ret = strict_strtol(buf, 10, &val);
192 if (ret)
193 goto error_ret;
194 ret = ade7754_spi_write_reg_8(dev, this_attr->address, val);
195
196error_ret:
197 return ret ? ret : len;
198}
199
200static ssize_t ade7754_write_16bit(struct device *dev,
201 struct device_attribute *attr,
202 const char *buf,
203 size_t len)
204{
205 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
206 int ret;
207 long val;
208
209 ret = strict_strtol(buf, 10, &val);
210 if (ret)
211 goto error_ret;
212 ret = ade7754_spi_write_reg_16(dev, this_attr->address, val);
213
214error_ret:
215 return ret ? ret : len;
216}
217
218static int ade7754_reset(struct device *dev)
219{
220 u8 val;
221
222 ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
223 val |= 1 << 6;
224 return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
225}
226
227
228static ssize_t ade7754_write_reset(struct device *dev,
229 struct device_attribute *attr,
230 const char *buf, size_t len)
231{
232 if (len < 1)
233 return -1;
234 switch (buf[0]) {
235 case '1':
236 case 'y':
237 case 'Y':
238 return ade7754_reset(dev);
239 }
240 return -1;
241}
242
243static IIO_DEV_ATTR_AENERGY(ade7754_read_24bit, ADE7754_AENERGY);
244static IIO_DEV_ATTR_LAENERGY(ade7754_read_24bit, ADE7754_LAENERGY);
245static IIO_DEV_ATTR_VAENERGY(ade7754_read_24bit, ADE7754_VAENERGY);
246static IIO_DEV_ATTR_LVAENERGY(ade7754_read_24bit, ADE7754_LVAENERGY);
247static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO,
248 ade7754_read_8bit,
249 ade7754_write_8bit,
250 ADE7754_VPEAK);
251static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO,
252 ade7754_read_8bit,
253 ade7754_write_8bit,
254 ADE7754_VPEAK);
255static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO,
256 ade7754_read_8bit,
257 ade7754_write_8bit,
258 ADE7754_APHCAL);
259static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO,
260 ade7754_read_8bit,
261 ade7754_write_8bit,
262 ADE7754_BPHCAL);
263static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO,
264 ade7754_read_8bit,
265 ade7754_write_8bit,
266 ADE7754_CPHCAL);
267static IIO_DEV_ATTR_AAPOS(S_IWUSR | S_IRUGO,
268 ade7754_read_16bit,
269 ade7754_write_16bit,
270 ADE7754_AAPOS);
271static IIO_DEV_ATTR_BAPOS(S_IWUSR | S_IRUGO,
272 ade7754_read_16bit,
273 ade7754_write_16bit,
274 ADE7754_BAPOS);
275static IIO_DEV_ATTR_CAPOS(S_IWUSR | S_IRUGO,
276 ade7754_read_16bit,
277 ade7754_write_16bit,
278 ADE7754_CAPOS);
279static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
280 ade7754_read_8bit,
281 ade7754_write_8bit,
282 ADE7754_WDIV);
283static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO,
284 ade7754_read_8bit,
285 ade7754_write_8bit,
286 ADE7754_VADIV);
287static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
288 ade7754_read_16bit,
289 ade7754_write_16bit,
290 ADE7754_CFNUM);
291static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
292 ade7754_read_16bit,
293 ade7754_write_16bit,
294 ADE7754_CFDEN);
295static IIO_DEV_ATTR_ACTIVE_POWER_A_GAIN(S_IWUSR | S_IRUGO,
296 ade7754_read_16bit,
297 ade7754_write_16bit,
298 ADE7754_AAPGAIN);
299static IIO_DEV_ATTR_ACTIVE_POWER_B_GAIN(S_IWUSR | S_IRUGO,
300 ade7754_read_16bit,
301 ade7754_write_16bit,
302 ADE7754_BAPGAIN);
303static IIO_DEV_ATTR_ACTIVE_POWER_C_GAIN(S_IWUSR | S_IRUGO,
304 ade7754_read_16bit,
305 ade7754_write_16bit,
306 ADE7754_CAPGAIN);
307static IIO_DEV_ATTR_AIRMS(S_IRUGO,
308 ade7754_read_24bit,
309 NULL,
310 ADE7754_AIRMS);
311static IIO_DEV_ATTR_BIRMS(S_IRUGO,
312 ade7754_read_24bit,
313 NULL,
314 ADE7754_BIRMS);
315static IIO_DEV_ATTR_CIRMS(S_IRUGO,
316 ade7754_read_24bit,
317 NULL,
318 ADE7754_CIRMS);
319static IIO_DEV_ATTR_AVRMS(S_IRUGO,
320 ade7754_read_24bit,
321 NULL,
322 ADE7754_AVRMS);
323static IIO_DEV_ATTR_BVRMS(S_IRUGO,
324 ade7754_read_24bit,
325 NULL,
326 ADE7754_BVRMS);
327static IIO_DEV_ATTR_CVRMS(S_IRUGO,
328 ade7754_read_24bit,
329 NULL,
330 ADE7754_CVRMS);
331static IIO_DEV_ATTR_AIRMSOS(S_IRUGO,
332 ade7754_read_16bit,
333 ade7754_write_16bit,
334 ADE7754_AIRMSOS);
335static IIO_DEV_ATTR_BIRMSOS(S_IRUGO,
336 ade7754_read_16bit,
337 ade7754_write_16bit,
338 ADE7754_BIRMSOS);
339static IIO_DEV_ATTR_CIRMSOS(S_IRUGO,
340 ade7754_read_16bit,
341 ade7754_write_16bit,
342 ADE7754_CIRMSOS);
343static IIO_DEV_ATTR_AVRMSOS(S_IRUGO,
344 ade7754_read_16bit,
345 ade7754_write_16bit,
346 ADE7754_AVRMSOS);
347static IIO_DEV_ATTR_BVRMSOS(S_IRUGO,
348 ade7754_read_16bit,
349 ade7754_write_16bit,
350 ADE7754_BVRMSOS);
351static IIO_DEV_ATTR_CVRMSOS(S_IRUGO,
352 ade7754_read_16bit,
353 ade7754_write_16bit,
354 ADE7754_CVRMSOS);
355
356static int ade7754_set_irq(struct device *dev, bool enable)
357{
358 int ret;
359 u16 irqen;
360 ret = ade7754_spi_read_reg_16(dev, ADE7754_IRQEN, &irqen);
361 if (ret)
362 goto error_ret;
363
364 if (enable)
365 irqen |= 1 << 14;
366
367 else
368 irqen &= ~(1 << 14);
369
370 ret = ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
371 if (ret)
372 goto error_ret;
373
374error_ret:
375 return ret;
376}
377
378
379static int ade7754_stop_device(struct device *dev)
380{
381 u8 val;
382
383 ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
384 val |= 7 << 3;
385 return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
386}
387
388static int ade7754_initial_setup(struct iio_dev *indio_dev)
389{
390 int ret;
391 struct ade7754_state *st = iio_priv(indio_dev);
392 struct device *dev = &indio_dev->dev;
393
394
395 st->us->mode = SPI_MODE_3;
396 spi_setup(st->us);
397
398
399 ret = ade7754_set_irq(dev, false);
400 if (ret) {
401 dev_err(dev, "disable irq failed");
402 goto err_ret;
403 }
404
405 ade7754_reset(dev);
406 msleep(ADE7754_STARTUP_DELAY);
407
408err_ret:
409 return ret;
410}
411
412static ssize_t ade7754_read_frequency(struct device *dev,
413 struct device_attribute *attr,
414 char *buf)
415{
416 int ret;
417 u8 t;
418 int sps;
419 ret = ade7754_spi_read_reg_8(dev,
420 ADE7754_WAVMODE,
421 &t);
422 if (ret)
423 return ret;
424
425 t = (t >> 3) & 0x3;
426 sps = 26000 / (1 + t);
427
428 return sprintf(buf, "%d\n", sps);
429}
430
431static ssize_t ade7754_write_frequency(struct device *dev,
432 struct device_attribute *attr,
433 const char *buf,
434 size_t len)
435{
436 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
437 struct ade7754_state *st = iio_priv(indio_dev);
438 unsigned long val;
439 int ret;
440 u8 reg, t;
441
442 ret = strict_strtol(buf, 10, &val);
443 if (ret)
444 return ret;
445 if (val == 0)
446 return -EINVAL;
447
448 mutex_lock(&indio_dev->mlock);
449
450 t = (26000 / val);
451 if (t > 0)
452 t--;
453
454 if (t > 1)
455 st->us->max_speed_hz = ADE7754_SPI_SLOW;
456 else
457 st->us->max_speed_hz = ADE7754_SPI_FAST;
458
459 ret = ade7754_spi_read_reg_8(dev, ADE7754_WAVMODE, ®);
460 if (ret)
461 goto out;
462
463 reg &= ~(3 << 3);
464 reg |= t << 3;
465
466 ret = ade7754_spi_write_reg_8(dev, ADE7754_WAVMODE, reg);
467
468out:
469 mutex_unlock(&indio_dev->mlock);
470
471 return ret ? ret : len;
472}
473static IIO_DEV_ATTR_TEMP_RAW(ade7754_read_8bit);
474static IIO_CONST_ATTR(in_temp_offset, "129 C");
475static IIO_CONST_ATTR(in_temp_scale, "4 C");
476
477static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
478 ade7754_read_frequency,
479 ade7754_write_frequency);
480
481static IIO_DEV_ATTR_RESET(ade7754_write_reset);
482
483static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26000 13000 65000 33000");
484
485static struct attribute *ade7754_attributes[] = {
486 &iio_dev_attr_in_temp_raw.dev_attr.attr,
487 &iio_const_attr_in_temp_offset.dev_attr.attr,
488 &iio_const_attr_in_temp_scale.dev_attr.attr,
489 &iio_dev_attr_sampling_frequency.dev_attr.attr,
490 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
491 &iio_dev_attr_reset.dev_attr.attr,
492 &iio_dev_attr_aenergy.dev_attr.attr,
493 &iio_dev_attr_laenergy.dev_attr.attr,
494 &iio_dev_attr_vaenergy.dev_attr.attr,
495 &iio_dev_attr_lvaenergy.dev_attr.attr,
496 &iio_dev_attr_vpeak.dev_attr.attr,
497 &iio_dev_attr_ipeak.dev_attr.attr,
498 &iio_dev_attr_aphcal.dev_attr.attr,
499 &iio_dev_attr_bphcal.dev_attr.attr,
500 &iio_dev_attr_cphcal.dev_attr.attr,
501 &iio_dev_attr_aapos.dev_attr.attr,
502 &iio_dev_attr_bapos.dev_attr.attr,
503 &iio_dev_attr_capos.dev_attr.attr,
504 &iio_dev_attr_wdiv.dev_attr.attr,
505 &iio_dev_attr_vadiv.dev_attr.attr,
506 &iio_dev_attr_cfnum.dev_attr.attr,
507 &iio_dev_attr_cfden.dev_attr.attr,
508 &iio_dev_attr_active_power_a_gain.dev_attr.attr,
509 &iio_dev_attr_active_power_b_gain.dev_attr.attr,
510 &iio_dev_attr_active_power_c_gain.dev_attr.attr,
511 &iio_dev_attr_airms.dev_attr.attr,
512 &iio_dev_attr_birms.dev_attr.attr,
513 &iio_dev_attr_cirms.dev_attr.attr,
514 &iio_dev_attr_avrms.dev_attr.attr,
515 &iio_dev_attr_bvrms.dev_attr.attr,
516 &iio_dev_attr_cvrms.dev_attr.attr,
517 &iio_dev_attr_airmsos.dev_attr.attr,
518 &iio_dev_attr_birmsos.dev_attr.attr,
519 &iio_dev_attr_cirmsos.dev_attr.attr,
520 &iio_dev_attr_avrmsos.dev_attr.attr,
521 &iio_dev_attr_bvrmsos.dev_attr.attr,
522 &iio_dev_attr_cvrmsos.dev_attr.attr,
523 NULL,
524};
525
526static const struct attribute_group ade7754_attribute_group = {
527 .attrs = ade7754_attributes,
528};
529
530static const struct iio_info ade7754_info = {
531 .attrs = &ade7754_attribute_group,
532 .driver_module = THIS_MODULE,
533};
534
535static int ade7754_probe(struct spi_device *spi)
536{
537 int ret;
538 struct ade7754_state *st;
539 struct iio_dev *indio_dev;
540
541
542 indio_dev = iio_device_alloc(sizeof(*st));
543 if (indio_dev == NULL) {
544 ret = -ENOMEM;
545 goto error_ret;
546 }
547
548 spi_set_drvdata(spi, indio_dev);
549
550 st = iio_priv(indio_dev);
551 st->us = spi;
552 mutex_init(&st->buf_lock);
553
554 indio_dev->name = spi->dev.driver->name;
555 indio_dev->dev.parent = &spi->dev;
556 indio_dev->info = &ade7754_info;
557 indio_dev->modes = INDIO_DIRECT_MODE;
558
559
560 ret = ade7754_initial_setup(indio_dev);
561 if (ret)
562 goto error_free_dev;
563 ret = iio_device_register(indio_dev);
564 if (ret)
565 goto error_free_dev;
566
567 return 0;
568
569error_free_dev:
570 iio_device_free(indio_dev);
571
572error_ret:
573 return ret;
574}
575
576
577static int ade7754_remove(struct spi_device *spi)
578{
579 struct iio_dev *indio_dev = spi_get_drvdata(spi);
580
581 iio_device_unregister(indio_dev);
582 ade7754_stop_device(&indio_dev->dev);
583 iio_device_free(indio_dev);
584
585 return 0;
586}
587
588static struct spi_driver ade7754_driver = {
589 .driver = {
590 .name = "ade7754",
591 .owner = THIS_MODULE,
592 },
593 .probe = ade7754_probe,
594 .remove = ade7754_remove,
595};
596module_spi_driver(ade7754_driver);
597
598MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
599MODULE_DESCRIPTION("Analog Devices ADE7754 Polyphase Multifunction Energy Metering IC Driver");
600MODULE_LICENSE("GPL v2");
601MODULE_ALIAS("spi:ad7754");
602
