linux/drivers/usb/gadget/s3c2410_udc.c
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   1/*
   2 * linux/drivers/usb/gadget/s3c2410_udc.c
   3 *
   4 * Samsung S3C24xx series on-chip full speed USB device controllers
   5 *
   6 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
   7 *      Additional cleanups by Ben Dooks <ben-linux@fluff.org>
   8 *
   9 * This program is free software; you can redistribute it and/or modify
  10 * it under the terms of the GNU General Public License as published by
  11 * the Free Software Foundation; either version 2 of the License, or
  12 * (at your option) any later version.
  13 */
  14
  15#define pr_fmt(fmt) "s3c2410_udc: " fmt
  16
  17#include <linux/module.h>
  18#include <linux/kernel.h>
  19#include <linux/delay.h>
  20#include <linux/ioport.h>
  21#include <linux/sched.h>
  22#include <linux/slab.h>
  23#include <linux/errno.h>
  24#include <linux/init.h>
  25#include <linux/timer.h>
  26#include <linux/list.h>
  27#include <linux/interrupt.h>
  28#include <linux/platform_device.h>
  29#include <linux/clk.h>
  30#include <linux/gpio.h>
  31#include <linux/prefetch.h>
  32#include <linux/io.h>
  33
  34#include <linux/debugfs.h>
  35#include <linux/seq_file.h>
  36
  37#include <linux/usb.h>
  38#include <linux/usb/gadget.h>
  39
  40#include <asm/byteorder.h>
  41#include <asm/irq.h>
  42#include <asm/unaligned.h>
  43#include <mach/irqs.h>
  44
  45#include <mach/hardware.h>
  46
  47#include <plat/regs-udc.h>
  48#include <linux/platform_data/usb-s3c2410_udc.h>
  49
  50
  51#include "s3c2410_udc.h"
  52
  53#define DRIVER_DESC     "S3C2410 USB Device Controller Gadget"
  54#define DRIVER_VERSION  "29 Apr 2007"
  55#define DRIVER_AUTHOR   "Herbert Pötzl <herbert@13thfloor.at>, " \
  56                        "Arnaud Patard <arnaud.patard@rtp-net.org>"
  57
  58static const char               gadget_name[] = "s3c2410_udc";
  59static const char               driver_desc[] = DRIVER_DESC;
  60
  61static struct s3c2410_udc       *the_controller;
  62static struct clk               *udc_clock;
  63static struct clk               *usb_bus_clock;
  64static void __iomem             *base_addr;
  65static u64                      rsrc_start;
  66static u64                      rsrc_len;
  67static struct dentry            *s3c2410_udc_debugfs_root;
  68
  69static inline u32 udc_read(u32 reg)
  70{
  71        return readb(base_addr + reg);
  72}
  73
  74static inline void udc_write(u32 value, u32 reg)
  75{
  76        writeb(value, base_addr + reg);
  77}
  78
  79static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
  80{
  81        writeb(value, base + reg);
  82}
  83
  84static struct s3c2410_udc_mach_info *udc_info;
  85
  86/*************************** DEBUG FUNCTION ***************************/
  87#define DEBUG_NORMAL    1
  88#define DEBUG_VERBOSE   2
  89
  90#ifdef CONFIG_USB_S3C2410_DEBUG
  91#define USB_S3C2410_DEBUG_LEVEL 0
  92
  93static uint32_t s3c2410_ticks = 0;
  94
  95static int dprintk(int level, const char *fmt, ...)
  96{
  97        static char printk_buf[1024];
  98        static long prevticks;
  99        static int invocation;
 100        va_list args;
 101        int len;
 102
 103        if (level > USB_S3C2410_DEBUG_LEVEL)
 104                return 0;
 105
 106        if (s3c2410_ticks != prevticks) {
 107                prevticks = s3c2410_ticks;
 108                invocation = 0;
 109        }
 110
 111        len = scnprintf(printk_buf,
 112                        sizeof(printk_buf), "%1lu.%02d USB: ",
 113                        prevticks, invocation++);
 114
 115        va_start(args, fmt);
 116        len = vscnprintf(printk_buf+len,
 117                        sizeof(printk_buf)-len, fmt, args);
 118        va_end(args);
 119
 120        return pr_debug("%s", printk_buf);
 121}
 122#else
 123static int dprintk(int level, const char *fmt, ...)
 124{
 125        return 0;
 126}
 127#endif
 128static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
 129{
 130        u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
 131        u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
 132        u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
 133        u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
 134
 135        addr_reg       = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
 136        pwr_reg        = udc_read(S3C2410_UDC_PWR_REG);
 137        ep_int_reg     = udc_read(S3C2410_UDC_EP_INT_REG);
 138        usb_int_reg    = udc_read(S3C2410_UDC_USB_INT_REG);
 139        ep_int_en_reg  = udc_read(S3C2410_UDC_EP_INT_EN_REG);
 140        usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
 141        udc_write(0, S3C2410_UDC_INDEX_REG);
 142        ep0_csr        = udc_read(S3C2410_UDC_IN_CSR1_REG);
 143        udc_write(1, S3C2410_UDC_INDEX_REG);
 144        ep1_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 145        ep1_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 146        ep1_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 147        ep1_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 148        udc_write(2, S3C2410_UDC_INDEX_REG);
 149        ep2_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 150        ep2_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 151        ep2_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 152        ep2_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 153
 154        seq_printf(m, "FUNC_ADDR_REG  : 0x%04X\n"
 155                 "PWR_REG        : 0x%04X\n"
 156                 "EP_INT_REG     : 0x%04X\n"
 157                 "USB_INT_REG    : 0x%04X\n"
 158                 "EP_INT_EN_REG  : 0x%04X\n"
 159                 "USB_INT_EN_REG : 0x%04X\n"
 160                 "EP0_CSR        : 0x%04X\n"
 161                 "EP1_I_CSR1     : 0x%04X\n"
 162                 "EP1_I_CSR2     : 0x%04X\n"
 163                 "EP1_O_CSR1     : 0x%04X\n"
 164                 "EP1_O_CSR2     : 0x%04X\n"
 165                 "EP2_I_CSR1     : 0x%04X\n"
 166                 "EP2_I_CSR2     : 0x%04X\n"
 167                 "EP2_O_CSR1     : 0x%04X\n"
 168                 "EP2_O_CSR2     : 0x%04X\n",
 169                        addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
 170                        ep_int_en_reg, usb_int_en_reg, ep0_csr,
 171                        ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
 172                        ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
 173                );
 174
 175        return 0;
 176}
 177
 178static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
 179                                         struct file *file)
 180{
 181        return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
 182}
 183
 184static const struct file_operations s3c2410_udc_debugfs_fops = {
 185        .open           = s3c2410_udc_debugfs_fops_open,
 186        .read           = seq_read,
 187        .llseek         = seq_lseek,
 188        .release        = single_release,
 189        .owner          = THIS_MODULE,
 190};
 191
 192/* io macros */
 193
 194static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
 195{
 196        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 197        udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
 198                        S3C2410_UDC_EP0_CSR_REG);
 199}
 200
 201static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
 202{
 203        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 204        writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
 205}
 206
 207static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
 208{
 209        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 210        udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
 211}
 212
 213static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
 214{
 215        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 216        udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
 217}
 218
 219static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
 220{
 221        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 222        udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
 223}
 224
 225inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
 226{
 227        udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 228        udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
 229}
 230
 231static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
 232{
 233        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 234
 235        udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
 236                                | S3C2410_UDC_EP0_CSR_DE),
 237                        S3C2410_UDC_EP0_CSR_REG);
 238}
 239
 240static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base)
 241{
 242        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 243        udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
 244                                | S3C2410_UDC_EP0_CSR_SSE),
 245                        S3C2410_UDC_EP0_CSR_REG);
 246}
 247
 248static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
 249{
 250        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 251        udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
 252                        | S3C2410_UDC_EP0_CSR_DE),
 253                S3C2410_UDC_EP0_CSR_REG);
 254}
 255
 256/*------------------------- I/O ----------------------------------*/
 257
 258/*
 259 *      s3c2410_udc_done
 260 */
 261static void s3c2410_udc_done(struct s3c2410_ep *ep,
 262                struct s3c2410_request *req, int status)
 263{
 264        unsigned halted = ep->halted;
 265
 266        list_del_init(&req->queue);
 267
 268        if (likely(req->req.status == -EINPROGRESS))
 269                req->req.status = status;
 270        else
 271                status = req->req.status;
 272
 273        ep->halted = 1;
 274        req->req.complete(&ep->ep, &req->req);
 275        ep->halted = halted;
 276}
 277
 278static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
 279                struct s3c2410_ep *ep, int status)
 280{
 281        /* Sanity check */
 282        if (&ep->queue == NULL)
 283                return;
 284
 285        while (!list_empty(&ep->queue)) {
 286                struct s3c2410_request *req;
 287                req = list_entry(ep->queue.next, struct s3c2410_request,
 288                                queue);
 289                s3c2410_udc_done(ep, req, status);
 290        }
 291}
 292
 293static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev)
 294{
 295        unsigned i;
 296
 297        /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
 298         * fifos, and pending transactions mustn't be continued in any case.
 299         */
 300
 301        for (i = 1; i < S3C2410_ENDPOINTS; i++)
 302                s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED);
 303}
 304
 305static inline int s3c2410_udc_fifo_count_out(void)
 306{
 307        int tmp;
 308
 309        tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
 310        tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
 311        return tmp;
 312}
 313
 314/*
 315 *      s3c2410_udc_write_packet
 316 */
 317static inline int s3c2410_udc_write_packet(int fifo,
 318                struct s3c2410_request *req,
 319                unsigned max)
 320{
 321        unsigned len = min(req->req.length - req->req.actual, max);
 322        u8 *buf = req->req.buf + req->req.actual;
 323
 324        prefetch(buf);
 325
 326        dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
 327                req->req.actual, req->req.length, len, req->req.actual + len);
 328
 329        req->req.actual += len;
 330
 331        udelay(5);
 332        writesb(base_addr + fifo, buf, len);
 333        return len;
 334}
 335
 336/*
 337 *      s3c2410_udc_write_fifo
 338 *
 339 * return:  0 = still running, 1 = completed, negative = errno
 340 */
 341static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
 342                struct s3c2410_request *req)
 343{
 344        unsigned        count;
 345        int             is_last;
 346        u32             idx;
 347        int             fifo_reg;
 348        u32             ep_csr;
 349
 350        idx = ep->bEndpointAddress & 0x7F;
 351        switch (idx) {
 352        default:
 353                idx = 0;
 354        case 0:
 355                fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 356                break;
 357        case 1:
 358                fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 359                break;
 360        case 2:
 361                fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 362                break;
 363        case 3:
 364                fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 365                break;
 366        case 4:
 367                fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 368                break;
 369        }
 370
 371        count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
 372
 373        /* last packet is often short (sometimes a zlp) */
 374        if (count != ep->ep.maxpacket)
 375                is_last = 1;
 376        else if (req->req.length != req->req.actual || req->req.zero)
 377                is_last = 0;
 378        else
 379                is_last = 2;
 380
 381        /* Only ep0 debug messages are interesting */
 382        if (idx == 0)
 383                dprintk(DEBUG_NORMAL,
 384                        "Written ep%d %d.%d of %d b [last %d,z %d]\n",
 385                        idx, count, req->req.actual, req->req.length,
 386                        is_last, req->req.zero);
 387
 388        if (is_last) {
 389                /* The order is important. It prevents sending 2 packets
 390                 * at the same time */
 391
 392                if (idx == 0) {
 393                        /* Reset signal => no need to say 'data sent' */
 394                        if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 395                                        & S3C2410_UDC_USBINT_RESET))
 396                                s3c2410_udc_set_ep0_de_in(base_addr);
 397                        ep->dev->ep0state = EP0_IDLE;
 398                } else {
 399                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 400                        ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 401                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 402                        udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 403                                        S3C2410_UDC_IN_CSR1_REG);
 404                }
 405
 406                s3c2410_udc_done(ep, req, 0);
 407                is_last = 1;
 408        } else {
 409                if (idx == 0) {
 410                        /* Reset signal => no need to say 'data sent' */
 411                        if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 412                                        & S3C2410_UDC_USBINT_RESET))
 413                                s3c2410_udc_set_ep0_ipr(base_addr);
 414                } else {
 415                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 416                        ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 417                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 418                        udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 419                                        S3C2410_UDC_IN_CSR1_REG);
 420                }
 421        }
 422
 423        return is_last;
 424}
 425
 426static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
 427                struct s3c2410_request *req, unsigned avail)
 428{
 429        unsigned len;
 430
 431        len = min(req->req.length - req->req.actual, avail);
 432        req->req.actual += len;
 433
 434        readsb(fifo + base_addr, buf, len);
 435        return len;
 436}
 437
 438/*
 439 * return:  0 = still running, 1 = queue empty, negative = errno
 440 */
 441static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
 442                                 struct s3c2410_request *req)
 443{
 444        u8              *buf;
 445        u32             ep_csr;
 446        unsigned        bufferspace;
 447        int             is_last = 1;
 448        unsigned        avail;
 449        int             fifo_count = 0;
 450        u32             idx;
 451        int             fifo_reg;
 452
 453        idx = ep->bEndpointAddress & 0x7F;
 454
 455        switch (idx) {
 456        default:
 457                idx = 0;
 458        case 0:
 459                fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 460                break;
 461        case 1:
 462                fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 463                break;
 464        case 2:
 465                fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 466                break;
 467        case 3:
 468                fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 469                break;
 470        case 4:
 471                fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 472                break;
 473        }
 474
 475        if (!req->req.length)
 476                return 1;
 477
 478        buf = req->req.buf + req->req.actual;
 479        bufferspace = req->req.length - req->req.actual;
 480        if (!bufferspace) {
 481                dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
 482                return -1;
 483        }
 484
 485        udc_write(idx, S3C2410_UDC_INDEX_REG);
 486
 487        fifo_count = s3c2410_udc_fifo_count_out();
 488        dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
 489
 490        if (fifo_count > ep->ep.maxpacket)
 491                avail = ep->ep.maxpacket;
 492        else
 493                avail = fifo_count;
 494
 495        fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
 496
 497        /* checking this with ep0 is not accurate as we already
 498         * read a control request
 499         **/
 500        if (idx != 0 && fifo_count < ep->ep.maxpacket) {
 501                is_last = 1;
 502                /* overflowed this request?  flush extra data */
 503                if (fifo_count != avail)
 504                        req->req.status = -EOVERFLOW;
 505        } else {
 506                is_last = (req->req.length <= req->req.actual) ? 1 : 0;
 507        }
 508
 509        udc_write(idx, S3C2410_UDC_INDEX_REG);
 510        fifo_count = s3c2410_udc_fifo_count_out();
 511
 512        /* Only ep0 debug messages are interesting */
 513        if (idx == 0)
 514                dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
 515                        __func__, fifo_count, is_last);
 516
 517        if (is_last) {
 518                if (idx == 0) {
 519                        s3c2410_udc_set_ep0_de_out(base_addr);
 520                        ep->dev->ep0state = EP0_IDLE;
 521                } else {
 522                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 523                        ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 524                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 525                        udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 526                                        S3C2410_UDC_OUT_CSR1_REG);
 527                }
 528
 529                s3c2410_udc_done(ep, req, 0);
 530        } else {
 531                if (idx == 0) {
 532                        s3c2410_udc_clear_ep0_opr(base_addr);
 533                } else {
 534                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 535                        ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 536                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 537                        udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 538                                        S3C2410_UDC_OUT_CSR1_REG);
 539                }
 540        }
 541
 542        return is_last;
 543}
 544
 545static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
 546{
 547        unsigned char *outbuf = (unsigned char *)crq;
 548        int bytes_read = 0;
 549
 550        udc_write(0, S3C2410_UDC_INDEX_REG);
 551
 552        bytes_read = s3c2410_udc_fifo_count_out();
 553
 554        dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
 555
 556        if (bytes_read > sizeof(struct usb_ctrlrequest))
 557                bytes_read = sizeof(struct usb_ctrlrequest);
 558
 559        readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
 560
 561        dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
 562                bytes_read, crq->bRequest, crq->bRequestType,
 563                crq->wValue, crq->wIndex, crq->wLength);
 564
 565        return bytes_read;
 566}
 567
 568static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
 569                struct usb_ctrlrequest *crq)
 570{
 571        u16 status = 0;
 572        u8 ep_num = crq->wIndex & 0x7F;
 573        u8 is_in = crq->wIndex & USB_DIR_IN;
 574
 575        switch (crq->bRequestType & USB_RECIP_MASK) {
 576        case USB_RECIP_INTERFACE:
 577                break;
 578
 579        case USB_RECIP_DEVICE:
 580                status = dev->devstatus;
 581                break;
 582
 583        case USB_RECIP_ENDPOINT:
 584                if (ep_num > 4 || crq->wLength > 2)
 585                        return 1;
 586
 587                if (ep_num == 0) {
 588                        udc_write(0, S3C2410_UDC_INDEX_REG);
 589                        status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 590                        status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
 591                } else {
 592                        udc_write(ep_num, S3C2410_UDC_INDEX_REG);
 593                        if (is_in) {
 594                                status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 595                                status = status & S3C2410_UDC_ICSR1_SENDSTL;
 596                        } else {
 597                                status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 598                                status = status & S3C2410_UDC_OCSR1_SENDSTL;
 599                        }
 600                }
 601
 602                status = status ? 1 : 0;
 603                break;
 604
 605        default:
 606                return 1;
 607        }
 608
 609        /* Seems to be needed to get it working. ouch :( */
 610        udelay(5);
 611        udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
 612        udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
 613        s3c2410_udc_set_ep0_de_in(base_addr);
 614
 615        return 0;
 616}
 617/*------------------------- usb state machine -------------------------------*/
 618static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
 619
 620static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
 621                                        struct s3c2410_ep *ep,
 622                                        struct usb_ctrlrequest *crq,
 623                                        u32 ep0csr)
 624{
 625        int len, ret, tmp;
 626
 627        /* start control request? */
 628        if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
 629                return;
 630
 631        s3c2410_udc_nuke(dev, ep, -EPROTO);
 632
 633        len = s3c2410_udc_read_fifo_crq(crq);
 634        if (len != sizeof(*crq)) {
 635                dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
 636                        " wanted %d bytes got %d. Stalling out...\n",
 637                        sizeof(*crq), len);
 638                s3c2410_udc_set_ep0_ss(base_addr);
 639                return;
 640        }
 641
 642        dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
 643                crq->bRequest, crq->bRequestType, crq->wLength);
 644
 645        /* cope with automagic for some standard requests. */
 646        dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
 647                == USB_TYPE_STANDARD;
 648        dev->req_config = 0;
 649        dev->req_pending = 1;
 650
 651        switch (crq->bRequest) {
 652        case USB_REQ_SET_CONFIGURATION:
 653                dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
 654
 655                if (crq->bRequestType == USB_RECIP_DEVICE) {
 656                        dev->req_config = 1;
 657                        s3c2410_udc_set_ep0_de_out(base_addr);
 658                }
 659                break;
 660
 661        case USB_REQ_SET_INTERFACE:
 662                dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
 663
 664                if (crq->bRequestType == USB_RECIP_INTERFACE) {
 665                        dev->req_config = 1;
 666                        s3c2410_udc_set_ep0_de_out(base_addr);
 667                }
 668                break;
 669
 670        case USB_REQ_SET_ADDRESS:
 671                dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
 672
 673                if (crq->bRequestType == USB_RECIP_DEVICE) {
 674                        tmp = crq->wValue & 0x7F;
 675                        dev->address = tmp;
 676                        udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
 677                                        S3C2410_UDC_FUNC_ADDR_REG);
 678                        s3c2410_udc_set_ep0_de_out(base_addr);
 679                        return;
 680                }
 681                break;
 682
 683        case USB_REQ_GET_STATUS:
 684                dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
 685                s3c2410_udc_clear_ep0_opr(base_addr);
 686
 687                if (dev->req_std) {
 688                        if (!s3c2410_udc_get_status(dev, crq))
 689                                return;
 690                }
 691                break;
 692
 693        case USB_REQ_CLEAR_FEATURE:
 694                s3c2410_udc_clear_ep0_opr(base_addr);
 695
 696                if (crq->bRequestType != USB_RECIP_ENDPOINT)
 697                        break;
 698
 699                if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 700                        break;
 701
 702                s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
 703                s3c2410_udc_set_ep0_de_out(base_addr);
 704                return;
 705
 706        case USB_REQ_SET_FEATURE:
 707                s3c2410_udc_clear_ep0_opr(base_addr);
 708
 709                if (crq->bRequestType != USB_RECIP_ENDPOINT)
 710                        break;
 711
 712                if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 713                        break;
 714
 715                s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
 716                s3c2410_udc_set_ep0_de_out(base_addr);
 717                return;
 718
 719        default:
 720                s3c2410_udc_clear_ep0_opr(base_addr);
 721                break;
 722        }
 723
 724        if (crq->bRequestType & USB_DIR_IN)
 725                dev->ep0state = EP0_IN_DATA_PHASE;
 726        else
 727                dev->ep0state = EP0_OUT_DATA_PHASE;
 728
 729        if (!dev->driver)
 730                return;
 731
 732        /* deliver the request to the gadget driver */
 733        ret = dev->driver->setup(&dev->gadget, crq);
 734        if (ret < 0) {
 735                if (dev->req_config) {
 736                        dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
 737                                crq->bRequest, ret);
 738                        return;
 739                }
 740
 741                if (ret == -EOPNOTSUPP)
 742                        dprintk(DEBUG_NORMAL, "Operation not supported\n");
 743                else
 744                        dprintk(DEBUG_NORMAL,
 745                                "dev->driver->setup failed. (%d)\n", ret);
 746
 747                udelay(5);
 748                s3c2410_udc_set_ep0_ss(base_addr);
 749                s3c2410_udc_set_ep0_de_out(base_addr);
 750                dev->ep0state = EP0_IDLE;
 751                /* deferred i/o == no response yet */
 752        } else if (dev->req_pending) {
 753                dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
 754                dev->req_pending = 0;
 755        }
 756
 757        dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
 758}
 759
 760static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
 761{
 762        u32                     ep0csr;
 763        struct s3c2410_ep       *ep = &dev->ep[0];
 764        struct s3c2410_request  *req;
 765        struct usb_ctrlrequest  crq;
 766
 767        if (list_empty(&ep->queue))
 768                req = NULL;
 769        else
 770                req = list_entry(ep->queue.next, struct s3c2410_request, queue);
 771
 772        /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
 773         * S3C2410_UDC_EP0_CSR_REG when index is zero */
 774
 775        udc_write(0, S3C2410_UDC_INDEX_REG);
 776        ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 777
 778        dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
 779                ep0csr, ep0states[dev->ep0state]);
 780
 781        /* clear stall status */
 782        if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
 783                s3c2410_udc_nuke(dev, ep, -EPIPE);
 784                dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
 785                s3c2410_udc_clear_ep0_sst(base_addr);
 786                dev->ep0state = EP0_IDLE;
 787                return;
 788        }
 789
 790        /* clear setup end */
 791        if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
 792                dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
 793                s3c2410_udc_nuke(dev, ep, 0);
 794                s3c2410_udc_clear_ep0_se(base_addr);
 795                dev->ep0state = EP0_IDLE;
 796        }
 797
 798        switch (dev->ep0state) {
 799        case EP0_IDLE:
 800                s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
 801                break;
 802
 803        case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
 804                dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
 805                if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
 806                        s3c2410_udc_write_fifo(ep, req);
 807                break;
 808
 809        case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
 810                dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
 811                if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
 812                        s3c2410_udc_read_fifo(ep, req);
 813                break;
 814
 815        case EP0_END_XFER:
 816                dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
 817                dev->ep0state = EP0_IDLE;
 818                break;
 819
 820        case EP0_STALL:
 821                dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
 822                dev->ep0state = EP0_IDLE;
 823                break;
 824        }
 825}
 826
 827/*
 828 *      handle_ep - Manage I/O endpoints
 829 */
 830
 831static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
 832{
 833        struct s3c2410_request  *req;
 834        int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
 835        u32                     ep_csr1;
 836        u32                     idx;
 837
 838        if (likely(!list_empty(&ep->queue)))
 839                req = list_entry(ep->queue.next,
 840                                struct s3c2410_request, queue);
 841        else
 842                req = NULL;
 843
 844        idx = ep->bEndpointAddress & 0x7F;
 845
 846        if (is_in) {
 847                udc_write(idx, S3C2410_UDC_INDEX_REG);
 848                ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
 849                dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
 850                        idx, ep_csr1, req ? 1 : 0);
 851
 852                if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
 853                        dprintk(DEBUG_VERBOSE, "st\n");
 854                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 855                        udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
 856                                        S3C2410_UDC_IN_CSR1_REG);
 857                        return;
 858                }
 859
 860                if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
 861                        s3c2410_udc_write_fifo(ep, req);
 862        } else {
 863                udc_write(idx, S3C2410_UDC_INDEX_REG);
 864                ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 865                dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
 866
 867                if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
 868                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 869                        udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
 870                                        S3C2410_UDC_OUT_CSR1_REG);
 871                        return;
 872                }
 873
 874                if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
 875                        s3c2410_udc_read_fifo(ep, req);
 876        }
 877}
 878
 879#include <mach/regs-irq.h>
 880
 881/*
 882 *      s3c2410_udc_irq - interrupt handler
 883 */
 884static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
 885{
 886        struct s3c2410_udc *dev = _dev;
 887        int usb_status;
 888        int usbd_status;
 889        int pwr_reg;
 890        int ep0csr;
 891        int i;
 892        u32 idx, idx2;
 893        unsigned long flags;
 894
 895        spin_lock_irqsave(&dev->lock, flags);
 896
 897        /* Driver connected ? */
 898        if (!dev->driver) {
 899                /* Clear interrupts */
 900                udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
 901                                S3C2410_UDC_USB_INT_REG);
 902                udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
 903                                S3C2410_UDC_EP_INT_REG);
 904        }
 905
 906        /* Save index */
 907        idx = udc_read(S3C2410_UDC_INDEX_REG);
 908
 909        /* Read status registers */
 910        usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
 911        usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
 912        pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
 913
 914        udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 915        ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 916
 917        dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
 918                usb_status, usbd_status, pwr_reg, ep0csr);
 919
 920        /*
 921         * Now, handle interrupts. There's two types :
 922         * - Reset, Resume, Suspend coming -> usb_int_reg
 923         * - EP -> ep_int_reg
 924         */
 925
 926        /* RESET */
 927        if (usb_status & S3C2410_UDC_USBINT_RESET) {
 928                /* two kind of reset :
 929                 * - reset start -> pwr reg = 8
 930                 * - reset end   -> pwr reg = 0
 931                 **/
 932                dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
 933                        ep0csr, pwr_reg);
 934
 935                dev->gadget.speed = USB_SPEED_UNKNOWN;
 936                udc_write(0x00, S3C2410_UDC_INDEX_REG);
 937                udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
 938                                S3C2410_UDC_MAXP_REG);
 939                dev->address = 0;
 940
 941                dev->ep0state = EP0_IDLE;
 942                dev->gadget.speed = USB_SPEED_FULL;
 943
 944                /* clear interrupt */
 945                udc_write(S3C2410_UDC_USBINT_RESET,
 946                                S3C2410_UDC_USB_INT_REG);
 947
 948                udc_write(idx, S3C2410_UDC_INDEX_REG);
 949                spin_unlock_irqrestore(&dev->lock, flags);
 950                return IRQ_HANDLED;
 951        }
 952
 953        /* RESUME */
 954        if (usb_status & S3C2410_UDC_USBINT_RESUME) {
 955                dprintk(DEBUG_NORMAL, "USB resume\n");
 956
 957                /* clear interrupt */
 958                udc_write(S3C2410_UDC_USBINT_RESUME,
 959                                S3C2410_UDC_USB_INT_REG);
 960
 961                if (dev->gadget.speed != USB_SPEED_UNKNOWN
 962                                && dev->driver
 963                                && dev->driver->resume)
 964                        dev->driver->resume(&dev->gadget);
 965        }
 966
 967        /* SUSPEND */
 968        if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
 969                dprintk(DEBUG_NORMAL, "USB suspend\n");
 970
 971                /* clear interrupt */
 972                udc_write(S3C2410_UDC_USBINT_SUSPEND,
 973                                S3C2410_UDC_USB_INT_REG);
 974
 975                if (dev->gadget.speed != USB_SPEED_UNKNOWN
 976                                && dev->driver
 977                                && dev->driver->suspend)
 978                        dev->driver->suspend(&dev->gadget);
 979
 980                dev->ep0state = EP0_IDLE;
 981        }
 982
 983        /* EP */
 984        /* control traffic */
 985        /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
 986         * generate an interrupt
 987         */
 988        if (usbd_status & S3C2410_UDC_INT_EP0) {
 989                dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
 990                /* Clear the interrupt bit by setting it to 1 */
 991                udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
 992                s3c2410_udc_handle_ep0(dev);
 993        }
 994
 995        /* endpoint data transfers */
 996        for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 997                u32 tmp = 1 << i;
 998                if (usbd_status & tmp) {
 999                        dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
1000
1001                        /* Clear the interrupt bit by setting it to 1 */
1002                        udc_write(tmp, S3C2410_UDC_EP_INT_REG);
1003                        s3c2410_udc_handle_ep(&dev->ep[i]);
1004                }
1005        }
1006
1007        /* what else causes this interrupt? a receive! who is it? */
1008        if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
1009                for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1010                        idx2 = udc_read(S3C2410_UDC_INDEX_REG);
1011                        udc_write(i, S3C2410_UDC_INDEX_REG);
1012
1013                        if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
1014                                s3c2410_udc_handle_ep(&dev->ep[i]);
1015
1016                        /* restore index */
1017                        udc_write(idx2, S3C2410_UDC_INDEX_REG);
1018                }
1019        }
1020
1021        dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
1022
1023        /* Restore old index */
1024        udc_write(idx, S3C2410_UDC_INDEX_REG);
1025
1026        spin_unlock_irqrestore(&dev->lock, flags);
1027
1028        return IRQ_HANDLED;
1029}
1030/*------------------------- s3c2410_ep_ops ----------------------------------*/
1031
1032static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1033{
1034        return container_of(ep, struct s3c2410_ep, ep);
1035}
1036
1037static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1038{
1039        return container_of(gadget, struct s3c2410_udc, gadget);
1040}
1041
1042static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1043{
1044        return container_of(req, struct s3c2410_request, req);
1045}
1046
1047/*
1048 *      s3c2410_udc_ep_enable
1049 */
1050static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1051                                 const struct usb_endpoint_descriptor *desc)
1052{
1053        struct s3c2410_udc      *dev;
1054        struct s3c2410_ep       *ep;
1055        u32                     max, tmp;
1056        unsigned long           flags;
1057        u32                     csr1, csr2;
1058        u32                     int_en_reg;
1059
1060        ep = to_s3c2410_ep(_ep);
1061
1062        if (!_ep || !desc
1063                        || _ep->name == ep0name
1064                        || desc->bDescriptorType != USB_DT_ENDPOINT)
1065                return -EINVAL;
1066
1067        dev = ep->dev;
1068        if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1069                return -ESHUTDOWN;
1070
1071        max = usb_endpoint_maxp(desc) & 0x1fff;
1072
1073        local_irq_save(flags);
1074        _ep->maxpacket = max & 0x7ff;
1075        ep->ep.desc = desc;
1076        ep->halted = 0;
1077        ep->bEndpointAddress = desc->bEndpointAddress;
1078
1079        /* set max packet */
1080        udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1081        udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1082
1083        /* set type, direction, address; reset fifo counters */
1084        if (desc->bEndpointAddress & USB_DIR_IN) {
1085                csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1086                csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1087
1088                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1089                udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1090                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1091                udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1092        } else {
1093                /* don't flush in fifo or it will cause endpoint interrupt */
1094                csr1 = S3C2410_UDC_ICSR1_CLRDT;
1095                csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1096
1097                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1098                udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1099                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1100                udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1101
1102                csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1103                csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1104
1105                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1106                udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1107                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1108                udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1109        }
1110
1111        /* enable irqs */
1112        int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1113        udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1114
1115        /* print some debug message */
1116        tmp = desc->bEndpointAddress;
1117        dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1118                 _ep->name, ep->num, tmp,
1119                 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1120
1121        local_irq_restore(flags);
1122        s3c2410_udc_set_halt(_ep, 0);
1123
1124        return 0;
1125}
1126
1127/*
1128 * s3c2410_udc_ep_disable
1129 */
1130static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1131{
1132        struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1133        unsigned long flags;
1134        u32 int_en_reg;
1135
1136        if (!_ep || !ep->ep.desc) {
1137                dprintk(DEBUG_NORMAL, "%s not enabled\n",
1138                        _ep ? ep->ep.name : NULL);
1139                return -EINVAL;
1140        }
1141
1142        local_irq_save(flags);
1143
1144        dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1145
1146        ep->ep.desc = NULL;
1147        ep->halted = 1;
1148
1149        s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1150
1151        /* disable irqs */
1152        int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1153        udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1154
1155        local_irq_restore(flags);
1156
1157        dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1158
1159        return 0;
1160}
1161
1162/*
1163 * s3c2410_udc_alloc_request
1164 */
1165static struct usb_request *
1166s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1167{
1168        struct s3c2410_request *req;
1169
1170        dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1171
1172        if (!_ep)
1173                return NULL;
1174
1175        req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1176        if (!req)
1177                return NULL;
1178
1179        INIT_LIST_HEAD(&req->queue);
1180        return &req->req;
1181}
1182
1183/*
1184 * s3c2410_udc_free_request
1185 */
1186static void
1187s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1188{
1189        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1190        struct s3c2410_request  *req = to_s3c2410_req(_req);
1191
1192        dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1193
1194        if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1195                return;
1196
1197        WARN_ON(!list_empty(&req->queue));
1198        kfree(req);
1199}
1200
1201/*
1202 *      s3c2410_udc_queue
1203 */
1204static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1205                gfp_t gfp_flags)
1206{
1207        struct s3c2410_request  *req = to_s3c2410_req(_req);
1208        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1209        struct s3c2410_udc      *dev;
1210        u32                     ep_csr = 0;
1211        int                     fifo_count = 0;
1212        unsigned long           flags;
1213
1214        if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1215                dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1216                return -EINVAL;
1217        }
1218
1219        dev = ep->dev;
1220        if (unlikely(!dev->driver
1221                        || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1222                return -ESHUTDOWN;
1223        }
1224
1225        local_irq_save(flags);
1226
1227        if (unlikely(!_req || !_req->complete
1228                        || !_req->buf || !list_empty(&req->queue))) {
1229                if (!_req)
1230                        dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1231                else {
1232                        dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1233                                __func__, !_req->complete, !_req->buf,
1234                                !list_empty(&req->queue));
1235                }
1236
1237                local_irq_restore(flags);
1238                return -EINVAL;
1239        }
1240
1241        _req->status = -EINPROGRESS;
1242        _req->actual = 0;
1243
1244        dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1245                 __func__, ep->bEndpointAddress, _req->length);
1246
1247        if (ep->bEndpointAddress) {
1248                udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1249
1250                ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1251                                ? S3C2410_UDC_IN_CSR1_REG
1252                                : S3C2410_UDC_OUT_CSR1_REG);
1253                fifo_count = s3c2410_udc_fifo_count_out();
1254        } else {
1255                udc_write(0, S3C2410_UDC_INDEX_REG);
1256                ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1257                fifo_count = s3c2410_udc_fifo_count_out();
1258        }
1259
1260        /* kickstart this i/o queue? */
1261        if (list_empty(&ep->queue) && !ep->halted) {
1262                if (ep->bEndpointAddress == 0 /* ep0 */) {
1263                        switch (dev->ep0state) {
1264                        case EP0_IN_DATA_PHASE:
1265                                if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1266                                                && s3c2410_udc_write_fifo(ep,
1267                                                        req)) {
1268                                        dev->ep0state = EP0_IDLE;
1269                                        req = NULL;
1270                                }
1271                                break;
1272
1273                        case EP0_OUT_DATA_PHASE:
1274                                if ((!_req->length)
1275                                        || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1276                                                && s3c2410_udc_read_fifo(ep,
1277                                                        req))) {
1278                                        dev->ep0state = EP0_IDLE;
1279                                        req = NULL;
1280                                }
1281                                break;
1282
1283                        default:
1284                                local_irq_restore(flags);
1285                                return -EL2HLT;
1286                        }
1287                } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1288                                && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1289                                && s3c2410_udc_write_fifo(ep, req)) {
1290                        req = NULL;
1291                } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1292                                && fifo_count
1293                                && s3c2410_udc_read_fifo(ep, req)) {
1294                        req = NULL;
1295                }
1296        }
1297
1298        /* pio or dma irq handler advances the queue. */
1299        if (likely(req))
1300                list_add_tail(&req->queue, &ep->queue);
1301
1302        local_irq_restore(flags);
1303
1304        dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1305        return 0;
1306}
1307
1308/*
1309 *      s3c2410_udc_dequeue
1310 */
1311static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1312{
1313        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1314        struct s3c2410_udc      *udc;
1315        int                     retval = -EINVAL;
1316        unsigned long           flags;
1317        struct s3c2410_request  *req = NULL;
1318
1319        dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1320
1321        if (!the_controller->driver)
1322                return -ESHUTDOWN;
1323
1324        if (!_ep || !_req)
1325                return retval;
1326
1327        udc = to_s3c2410_udc(ep->gadget);
1328
1329        local_irq_save(flags);
1330
1331        list_for_each_entry(req, &ep->queue, queue) {
1332                if (&req->req == _req) {
1333                        list_del_init(&req->queue);
1334                        _req->status = -ECONNRESET;
1335                        retval = 0;
1336                        break;
1337                }
1338        }
1339
1340        if (retval == 0) {
1341                dprintk(DEBUG_VERBOSE,
1342                        "dequeued req %p from %s, len %d buf %p\n",
1343                        req, _ep->name, _req->length, _req->buf);
1344
1345                s3c2410_udc_done(ep, req, -ECONNRESET);
1346        }
1347
1348        local_irq_restore(flags);
1349        return retval;
1350}
1351
1352/*
1353 * s3c2410_udc_set_halt
1354 */
1355static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1356{
1357        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1358        u32                     ep_csr = 0;
1359        unsigned long           flags;
1360        u32                     idx;
1361
1362        if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1363                dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1364                return -EINVAL;
1365        }
1366
1367        local_irq_save(flags);
1368
1369        idx = ep->bEndpointAddress & 0x7F;
1370
1371        if (idx == 0) {
1372                s3c2410_udc_set_ep0_ss(base_addr);
1373                s3c2410_udc_set_ep0_de_out(base_addr);
1374        } else {
1375                udc_write(idx, S3C2410_UDC_INDEX_REG);
1376                ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1377                                ? S3C2410_UDC_IN_CSR1_REG
1378                                : S3C2410_UDC_OUT_CSR1_REG);
1379
1380                if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1381                        if (value)
1382                                udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1383                                        S3C2410_UDC_IN_CSR1_REG);
1384                        else {
1385                                ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1386                                udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1387                                ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1388                                udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1389                        }
1390                } else {
1391                        if (value)
1392                                udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1393                                        S3C2410_UDC_OUT_CSR1_REG);
1394                        else {
1395                                ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1396                                udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1397                                ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1398                                udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1399                        }
1400                }
1401        }
1402
1403        ep->halted = value ? 1 : 0;
1404        local_irq_restore(flags);
1405
1406        return 0;
1407}
1408
1409static const struct usb_ep_ops s3c2410_ep_ops = {
1410        .enable         = s3c2410_udc_ep_enable,
1411        .disable        = s3c2410_udc_ep_disable,
1412
1413        .alloc_request  = s3c2410_udc_alloc_request,
1414        .free_request   = s3c2410_udc_free_request,
1415
1416        .queue          = s3c2410_udc_queue,
1417        .dequeue        = s3c2410_udc_dequeue,
1418
1419        .set_halt       = s3c2410_udc_set_halt,
1420};
1421
1422/*------------------------- usb_gadget_ops ----------------------------------*/
1423
1424/*
1425 *      s3c2410_udc_get_frame
1426 */
1427static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1428{
1429        int tmp;
1430
1431        dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1432
1433        tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1434        tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1435        return tmp;
1436}
1437
1438/*
1439 *      s3c2410_udc_wakeup
1440 */
1441static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1442{
1443        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1444        return 0;
1445}
1446
1447/*
1448 *      s3c2410_udc_set_selfpowered
1449 */
1450static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1451{
1452        struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1453
1454        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1455
1456        if (value)
1457                udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1458        else
1459                udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1460
1461        return 0;
1462}
1463
1464static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1465static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1466
1467static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1468{
1469        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1470
1471        if (udc_info && (udc_info->udc_command ||
1472                gpio_is_valid(udc_info->pullup_pin))) {
1473
1474                if (is_on)
1475                        s3c2410_udc_enable(udc);
1476                else {
1477                        if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1478                                if (udc->driver && udc->driver->disconnect)
1479                                        udc->driver->disconnect(&udc->gadget);
1480
1481                        }
1482                        s3c2410_udc_disable(udc);
1483                }
1484        } else {
1485                return -EOPNOTSUPP;
1486        }
1487
1488        return 0;
1489}
1490
1491static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1492{
1493        struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1494
1495        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1496
1497        udc->vbus = (is_active != 0);
1498        s3c2410_udc_set_pullup(udc, is_active);
1499        return 0;
1500}
1501
1502static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1503{
1504        struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1505
1506        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1507
1508        s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
1509        return 0;
1510}
1511
1512static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1513{
1514        struct s3c2410_udc      *dev = _dev;
1515        unsigned int            value;
1516
1517        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1518
1519        value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1520        if (udc_info->vbus_pin_inverted)
1521                value = !value;
1522
1523        if (value != dev->vbus)
1524                s3c2410_udc_vbus_session(&dev->gadget, value);
1525
1526        return IRQ_HANDLED;
1527}
1528
1529static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1530{
1531        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1532
1533        if (udc_info && udc_info->vbus_draw) {
1534                udc_info->vbus_draw(ma);
1535                return 0;
1536        }
1537
1538        return -ENOTSUPP;
1539}
1540
1541static int s3c2410_udc_start(struct usb_gadget *g,
1542                struct usb_gadget_driver *driver);
1543static int s3c2410_udc_stop(struct usb_gadget *g,
1544                struct usb_gadget_driver *driver);
1545
1546static const struct usb_gadget_ops s3c2410_ops = {
1547        .get_frame              = s3c2410_udc_get_frame,
1548        .wakeup                 = s3c2410_udc_wakeup,
1549        .set_selfpowered        = s3c2410_udc_set_selfpowered,
1550        .pullup                 = s3c2410_udc_pullup,
1551        .vbus_session           = s3c2410_udc_vbus_session,
1552        .vbus_draw              = s3c2410_vbus_draw,
1553        .udc_start              = s3c2410_udc_start,
1554        .udc_stop               = s3c2410_udc_stop,
1555};
1556
1557static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1558{
1559        if (!udc_info)
1560                return;
1561
1562        if (udc_info->udc_command) {
1563                udc_info->udc_command(cmd);
1564        } else if (gpio_is_valid(udc_info->pullup_pin)) {
1565                int value;
1566
1567                switch (cmd) {
1568                case S3C2410_UDC_P_ENABLE:
1569                        value = 1;
1570                        break;
1571                case S3C2410_UDC_P_DISABLE:
1572                        value = 0;
1573                        break;
1574                default:
1575                        return;
1576                }
1577                value ^= udc_info->pullup_pin_inverted;
1578
1579                gpio_set_value(udc_info->pullup_pin, value);
1580        }
1581}
1582
1583/*------------------------- gadget driver handling---------------------------*/
1584/*
1585 * s3c2410_udc_disable
1586 */
1587static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1588{
1589        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1590
1591        /* Disable all interrupts */
1592        udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1593        udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1594
1595        /* Clear the interrupt registers */
1596        udc_write(S3C2410_UDC_USBINT_RESET
1597                                | S3C2410_UDC_USBINT_RESUME
1598                                | S3C2410_UDC_USBINT_SUSPEND,
1599                        S3C2410_UDC_USB_INT_REG);
1600
1601        udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1602
1603        /* Good bye, cruel world */
1604        s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1605
1606        /* Set speed to unknown */
1607        dev->gadget.speed = USB_SPEED_UNKNOWN;
1608}
1609
1610/*
1611 * s3c2410_udc_reinit
1612 */
1613static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1614{
1615        u32 i;
1616
1617        /* device/ep0 records init */
1618        INIT_LIST_HEAD(&dev->gadget.ep_list);
1619        INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1620        dev->ep0state = EP0_IDLE;
1621
1622        for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1623                struct s3c2410_ep *ep = &dev->ep[i];
1624
1625                if (i != 0)
1626                        list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1627
1628                ep->dev = dev;
1629                ep->ep.desc = NULL;
1630                ep->halted = 0;
1631                INIT_LIST_HEAD(&ep->queue);
1632        }
1633}
1634
1635/*
1636 * s3c2410_udc_enable
1637 */
1638static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1639{
1640        int i;
1641
1642        dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1643
1644        /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1645        dev->gadget.speed = USB_SPEED_FULL;
1646
1647        /* Set MAXP for all endpoints */
1648        for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1649                udc_write(i, S3C2410_UDC_INDEX_REG);
1650                udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1651                                S3C2410_UDC_MAXP_REG);
1652        }
1653
1654        /* Set default power state */
1655        udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1656
1657        /* Enable reset and suspend interrupt interrupts */
1658        udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1659                        S3C2410_UDC_USB_INT_EN_REG);
1660
1661        /* Enable ep0 interrupt */
1662        udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1663
1664        /* time to say "hello, world" */
1665        s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1666}
1667
1668static int s3c2410_udc_start(struct usb_gadget *g,
1669                struct usb_gadget_driver *driver)
1670{
1671        struct s3c2410_udc *udc = to_s3c2410(g);
1672
1673        dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1674
1675        /* Hook the driver */
1676        udc->driver = driver;
1677
1678        /* Enable udc */
1679        s3c2410_udc_enable(udc);
1680
1681        return 0;
1682}
1683
1684static int s3c2410_udc_stop(struct usb_gadget *g,
1685                struct usb_gadget_driver *driver)
1686{
1687        struct s3c2410_udc *udc = to_s3c2410(g);
1688
1689        udc->driver = NULL;
1690
1691        /* Disable udc */
1692        s3c2410_udc_disable(udc);
1693
1694        return 0;
1695}
1696
1697/*---------------------------------------------------------------------------*/
1698static struct s3c2410_udc memory = {
1699        .gadget = {
1700                .ops            = &s3c2410_ops,
1701                .ep0            = &memory.ep[0].ep,
1702                .name           = gadget_name,
1703                .dev = {
1704                        .init_name      = "gadget",
1705                },
1706        },
1707
1708        /* control endpoint */
1709        .ep[0] = {
1710                .num            = 0,
1711                .ep = {
1712                        .name           = ep0name,
1713                        .ops            = &s3c2410_ep_ops,
1714                        .maxpacket      = EP0_FIFO_SIZE,
1715                },
1716                .dev            = &memory,
1717        },
1718
1719        /* first group of endpoints */
1720        .ep[1] = {
1721                .num            = 1,
1722                .ep = {
1723                        .name           = "ep1-bulk",
1724                        .ops            = &s3c2410_ep_ops,
1725                        .maxpacket      = EP_FIFO_SIZE,
1726                },
1727                .dev            = &memory,
1728                .fifo_size      = EP_FIFO_SIZE,
1729                .bEndpointAddress = 1,
1730                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1731        },
1732        .ep[2] = {
1733                .num            = 2,
1734                .ep = {
1735                        .name           = "ep2-bulk",
1736                        .ops            = &s3c2410_ep_ops,
1737                        .maxpacket      = EP_FIFO_SIZE,
1738                },
1739                .dev            = &memory,
1740                .fifo_size      = EP_FIFO_SIZE,
1741                .bEndpointAddress = 2,
1742                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1743        },
1744        .ep[3] = {
1745                .num            = 3,
1746                .ep = {
1747                        .name           = "ep3-bulk",
1748                        .ops            = &s3c2410_ep_ops,
1749                        .maxpacket      = EP_FIFO_SIZE,
1750                },
1751                .dev            = &memory,
1752                .fifo_size      = EP_FIFO_SIZE,
1753                .bEndpointAddress = 3,
1754                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1755        },
1756        .ep[4] = {
1757                .num            = 4,
1758                .ep = {
1759                        .name           = "ep4-bulk",
1760                        .ops            = &s3c2410_ep_ops,
1761                        .maxpacket      = EP_FIFO_SIZE,
1762                },
1763                .dev            = &memory,
1764                .fifo_size      = EP_FIFO_SIZE,
1765                .bEndpointAddress = 4,
1766                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1767        }
1768
1769};
1770
1771/*
1772 *      probe - binds to the platform device
1773 */
1774static int s3c2410_udc_probe(struct platform_device *pdev)
1775{
1776        struct s3c2410_udc *udc = &memory;
1777        struct device *dev = &pdev->dev;
1778        int retval;
1779        int irq;
1780
1781        dev_dbg(dev, "%s()\n", __func__);
1782
1783        usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1784        if (IS_ERR(usb_bus_clock)) {
1785                dev_err(dev, "failed to get usb bus clock source\n");
1786                return PTR_ERR(usb_bus_clock);
1787        }
1788
1789        clk_enable(usb_bus_clock);
1790
1791        udc_clock = clk_get(NULL, "usb-device");
1792        if (IS_ERR(udc_clock)) {
1793                dev_err(dev, "failed to get udc clock source\n");
1794                return PTR_ERR(udc_clock);
1795        }
1796
1797        clk_enable(udc_clock);
1798
1799        mdelay(10);
1800
1801        dev_dbg(dev, "got and enabled clocks\n");
1802
1803        if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1804                dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1805                memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1806                memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1807                memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1808                memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1809        }
1810
1811        spin_lock_init(&udc->lock);
1812        udc_info = pdev->dev.platform_data;
1813
1814        rsrc_start = S3C2410_PA_USBDEV;
1815        rsrc_len   = S3C24XX_SZ_USBDEV;
1816
1817        if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1818                return -EBUSY;
1819
1820        base_addr = ioremap(rsrc_start, rsrc_len);
1821        if (!base_addr) {
1822                retval = -ENOMEM;
1823                goto err_mem;
1824        }
1825
1826        the_controller = udc;
1827        platform_set_drvdata(pdev, udc);
1828
1829        s3c2410_udc_disable(udc);
1830        s3c2410_udc_reinit(udc);
1831
1832        /* irq setup after old hardware state is cleaned up */
1833        retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1834                             0, gadget_name, udc);
1835
1836        if (retval != 0) {
1837                dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1838                retval = -EBUSY;
1839                goto err_map;
1840        }
1841
1842        dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1843
1844        if (udc_info && udc_info->vbus_pin > 0) {
1845                retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1846                if (retval < 0) {
1847                        dev_err(dev, "cannot claim vbus pin\n");
1848                        goto err_int;
1849                }
1850
1851                irq = gpio_to_irq(udc_info->vbus_pin);
1852                if (irq < 0) {
1853                        dev_err(dev, "no irq for gpio vbus pin\n");
1854                        retval = irq;
1855                        goto err_gpio_claim;
1856                }
1857
1858                retval = request_irq(irq, s3c2410_udc_vbus_irq,
1859                                     IRQF_TRIGGER_RISING
1860                                     | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1861                                     gadget_name, udc);
1862
1863                if (retval != 0) {
1864                        dev_err(dev, "can't get vbus irq %d, err %d\n",
1865                                irq, retval);
1866                        retval = -EBUSY;
1867                        goto err_gpio_claim;
1868                }
1869
1870                dev_dbg(dev, "got irq %i\n", irq);
1871        } else {
1872                udc->vbus = 1;
1873        }
1874
1875        if (udc_info && !udc_info->udc_command &&
1876                gpio_is_valid(udc_info->pullup_pin)) {
1877
1878                retval = gpio_request_one(udc_info->pullup_pin,
1879                                udc_info->vbus_pin_inverted ?
1880                                GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1881                                "udc pullup");
1882                if (retval)
1883                        goto err_vbus_irq;
1884        }
1885
1886        retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1887        if (retval)
1888                goto err_add_udc;
1889
1890        if (s3c2410_udc_debugfs_root) {
1891                udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1892                                s3c2410_udc_debugfs_root,
1893                                udc, &s3c2410_udc_debugfs_fops);
1894                if (!udc->regs_info)
1895                        dev_warn(dev, "debugfs file creation failed\n");
1896        }
1897
1898        dev_dbg(dev, "probe ok\n");
1899
1900        return 0;
1901
1902err_add_udc:
1903        if (udc_info && !udc_info->udc_command &&
1904                        gpio_is_valid(udc_info->pullup_pin))
1905                gpio_free(udc_info->pullup_pin);
1906err_vbus_irq:
1907        if (udc_info && udc_info->vbus_pin > 0)
1908                free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1909err_gpio_claim:
1910        if (udc_info && udc_info->vbus_pin > 0)
1911                gpio_free(udc_info->vbus_pin);
1912err_int:
1913        free_irq(IRQ_USBD, udc);
1914err_map:
1915        iounmap(base_addr);
1916err_mem:
1917        release_mem_region(rsrc_start, rsrc_len);
1918
1919        return retval;
1920}
1921
1922/*
1923 *      s3c2410_udc_remove
1924 */
1925static int s3c2410_udc_remove(struct platform_device *pdev)
1926{
1927        struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1928        unsigned int irq;
1929
1930        dev_dbg(&pdev->dev, "%s()\n", __func__);
1931
1932        if (udc->driver)
1933                return -EBUSY;
1934
1935        usb_del_gadget_udc(&udc->gadget);
1936        debugfs_remove(udc->regs_info);
1937
1938        if (udc_info && !udc_info->udc_command &&
1939                gpio_is_valid(udc_info->pullup_pin))
1940                gpio_free(udc_info->pullup_pin);
1941
1942        if (udc_info && udc_info->vbus_pin > 0) {
1943                irq = gpio_to_irq(udc_info->vbus_pin);
1944                free_irq(irq, udc);
1945        }
1946
1947        free_irq(IRQ_USBD, udc);
1948
1949        iounmap(base_addr);
1950        release_mem_region(rsrc_start, rsrc_len);
1951
1952        if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1953                clk_disable(udc_clock);
1954                clk_put(udc_clock);
1955                udc_clock = NULL;
1956        }
1957
1958        if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1959                clk_disable(usb_bus_clock);
1960                clk_put(usb_bus_clock);
1961                usb_bus_clock = NULL;
1962        }
1963
1964        dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1965        return 0;
1966}
1967
1968#ifdef CONFIG_PM
1969static int
1970s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1971{
1972        s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1973
1974        return 0;
1975}
1976
1977static int s3c2410_udc_resume(struct platform_device *pdev)
1978{
1979        s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1980
1981        return 0;
1982}
1983#else
1984#define s3c2410_udc_suspend     NULL
1985#define s3c2410_udc_resume      NULL
1986#endif
1987
1988static const struct platform_device_id s3c_udc_ids[] = {
1989        { "s3c2410-usbgadget", },
1990        { "s3c2440-usbgadget", },
1991        { }
1992};
1993MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1994
1995static struct platform_driver udc_driver_24x0 = {
1996        .driver         = {
1997                .name   = "s3c24x0-usbgadget",
1998                .owner  = THIS_MODULE,
1999        },
2000        .probe          = s3c2410_udc_probe,
2001        .remove         = s3c2410_udc_remove,
2002        .suspend        = s3c2410_udc_suspend,
2003        .resume         = s3c2410_udc_resume,
2004        .id_table       = s3c_udc_ids,
2005};
2006
2007static int __init udc_init(void)
2008{
2009        int retval;
2010
2011        dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2012
2013        s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2014        if (IS_ERR(s3c2410_udc_debugfs_root)) {
2015                pr_err("%s: debugfs dir creation failed %ld\n",
2016                        gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2017                s3c2410_udc_debugfs_root = NULL;
2018        }
2019
2020        retval = platform_driver_register(&udc_driver_24x0);
2021        if (retval)
2022                goto err;
2023
2024        return 0;
2025
2026err:
2027        debugfs_remove(s3c2410_udc_debugfs_root);
2028        return retval;
2029}
2030
2031static void __exit udc_exit(void)
2032{
2033        platform_driver_unregister(&udc_driver_24x0);
2034        debugfs_remove(s3c2410_udc_debugfs_root);
2035}
2036
2037module_init(udc_init);
2038module_exit(udc_exit);
2039
2040MODULE_AUTHOR(DRIVER_AUTHOR);
2041MODULE_DESCRIPTION(DRIVER_DESC);
2042MODULE_VERSION(DRIVER_VERSION);
2043MODULE_LICENSE("GPL");
2044