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10#include <linux/kernel_stat.h>
11#include <linux/interrupt.h>
12#include <linux/seq_file.h>
13#include <linux/proc_fs.h>
14#include <linux/profile.h>
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/ftrace.h>
18#include <linux/errno.h>
19#include <linux/slab.h>
20#include <linux/cpu.h>
21#include <asm/irq_regs.h>
22#include <asm/cputime.h>
23#include <asm/lowcore.h>
24#include <asm/irq.h>
25#include "entry.h"
26
27DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
28EXPORT_PER_CPU_SYMBOL_GPL(irq_stat);
29
30struct irq_class {
31 int irq;
32 char *name;
33 char *desc;
34};
35
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38
39
40
41
42
43
44
45
46static const struct irq_class irqclass_main_desc[NR_IRQS] = {
47 {.irq = EXTERNAL_INTERRUPT, .name = "EXT"},
48 {.irq = IO_INTERRUPT, .name = "I/O"},
49};
50
51
52
53
54
55
56static const struct irq_class irqclass_sub_desc[NR_ARCH_IRQS] = {
57 {.irq = IRQEXT_CLK, .name = "CLK", .desc = "[EXT] Clock Comparator"},
58 {.irq = IRQEXT_EXC, .name = "EXC", .desc = "[EXT] External Call"},
59 {.irq = IRQEXT_EMS, .name = "EMS", .desc = "[EXT] Emergency Signal"},
60 {.irq = IRQEXT_TMR, .name = "TMR", .desc = "[EXT] CPU Timer"},
61 {.irq = IRQEXT_TLA, .name = "TAL", .desc = "[EXT] Timing Alert"},
62 {.irq = IRQEXT_PFL, .name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
63 {.irq = IRQEXT_DSD, .name = "DSD", .desc = "[EXT] DASD Diag"},
64 {.irq = IRQEXT_VRT, .name = "VRT", .desc = "[EXT] Virtio"},
65 {.irq = IRQEXT_SCP, .name = "SCP", .desc = "[EXT] Service Call"},
66 {.irq = IRQEXT_IUC, .name = "IUC", .desc = "[EXT] IUCV"},
67 {.irq = IRQEXT_CMS, .name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
68 {.irq = IRQEXT_CMC, .name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
69 {.irq = IRQEXT_CMR, .name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
70 {.irq = IRQEXT_FTP, .name = "FTP", .desc = "[EXT] HMC FTP Service"},
71 {.irq = IRQIO_CIO, .name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
72 {.irq = IRQIO_QAI, .name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
73 {.irq = IRQIO_DAS, .name = "DAS", .desc = "[I/O] DASD"},
74 {.irq = IRQIO_C15, .name = "C15", .desc = "[I/O] 3215"},
75 {.irq = IRQIO_C70, .name = "C70", .desc = "[I/O] 3270"},
76 {.irq = IRQIO_TAP, .name = "TAP", .desc = "[I/O] Tape"},
77 {.irq = IRQIO_VMR, .name = "VMR", .desc = "[I/O] Unit Record Devices"},
78 {.irq = IRQIO_LCS, .name = "LCS", .desc = "[I/O] LCS"},
79 {.irq = IRQIO_CLW, .name = "CLW", .desc = "[I/O] CLAW"},
80 {.irq = IRQIO_CTC, .name = "CTC", .desc = "[I/O] CTC"},
81 {.irq = IRQIO_APB, .name = "APB", .desc = "[I/O] AP Bus"},
82 {.irq = IRQIO_ADM, .name = "ADM", .desc = "[I/O] EADM Subchannel"},
83 {.irq = IRQIO_CSC, .name = "CSC", .desc = "[I/O] CHSC Subchannel"},
84 {.irq = IRQIO_PCI, .name = "PCI", .desc = "[I/O] PCI Interrupt" },
85 {.irq = IRQIO_MSI, .name = "MSI", .desc = "[I/O] MSI Interrupt" },
86 {.irq = IRQIO_VIR, .name = "VIR", .desc = "[I/O] Virtual I/O Devices"},
87 {.irq = IRQIO_VAI, .name = "VAI", .desc = "[I/O] Virtual I/O Devices AI"},
88 {.irq = NMI_NMI, .name = "NMI", .desc = "[NMI] Machine Check"},
89 {.irq = CPU_RST, .name = "RST", .desc = "[CPU] CPU Restart"},
90};
91
92
93
94
95int show_interrupts(struct seq_file *p, void *v)
96{
97 int index = *(loff_t *) v;
98 int cpu, irq;
99
100 get_online_cpus();
101 if (index == 0) {
102 seq_puts(p, " ");
103 for_each_online_cpu(cpu)
104 seq_printf(p, "CPU%d ", cpu);
105 seq_putc(p, '\n');
106 }
107 if (index < NR_IRQS) {
108 seq_printf(p, "%s: ", irqclass_main_desc[index].name);
109 irq = irqclass_main_desc[index].irq;
110 for_each_online_cpu(cpu)
111 seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[irq]);
112 seq_putc(p, '\n');
113 goto skip_arch_irqs;
114 }
115 for (index = 0; index < NR_ARCH_IRQS; index++) {
116 seq_printf(p, "%s: ", irqclass_sub_desc[index].name);
117 irq = irqclass_sub_desc[index].irq;
118 for_each_online_cpu(cpu) {
119 seq_printf(p, "%10u ", per_cpu(irq_stat, cpu).irqs[irq]);
120 }
121 if (irqclass_sub_desc[index].desc)
122 seq_printf(p, " %s", irqclass_sub_desc[index].desc);
123 seq_putc(p, '\n');
124 }
125skip_arch_irqs:
126 put_online_cpus();
127 return 0;
128}
129
130
131
132
133asmlinkage void do_softirq(void)
134{
135 unsigned long flags, old, new;
136
137 if (in_interrupt())
138 return;
139
140 local_irq_save(flags);
141
142 if (local_softirq_pending()) {
143
144 asm volatile("la %0,0(15)" : "=a" (old));
145
146 new = S390_lowcore.async_stack;
147 if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
148
149 new -= STACK_FRAME_OVERHEAD;
150 ((struct stack_frame *) new)->back_chain = old;
151
152#ifdef CONFIG_64BIT
153 asm volatile(" la 15,0(%0)\n"
154 " brasl 14,__do_softirq\n"
155 " la 15,0(%1)\n"
156 : : "a" (new), "a" (old)
157 : "0", "1", "2", "3", "4", "5", "14",
158 "cc", "memory" );
159#else
160 asm volatile(" la 15,0(%0)\n"
161 " basr 14,%2\n"
162 " la 15,0(%1)\n"
163 : : "a" (new), "a" (old),
164 "a" (__do_softirq)
165 : "0", "1", "2", "3", "4", "5", "14",
166 "cc", "memory" );
167#endif
168 } else {
169
170 __do_softirq();
171 }
172 }
173
174 local_irq_restore(flags);
175}
176
177#ifdef CONFIG_PROC_FS
178void init_irq_proc(void)
179{
180 if (proc_mkdir("irq", NULL))
181 create_prof_cpu_mask();
182}
183#endif
184
185
186
187
188
189static struct list_head ext_int_hash[256];
190
191struct ext_int_info {
192 ext_int_handler_t handler;
193 u16 code;
194 struct list_head entry;
195 struct rcu_head rcu;
196};
197
198
199DEFINE_SPINLOCK(ext_int_hash_lock);
200
201static void __init init_external_interrupts(void)
202{
203 int idx;
204
205 for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
206 INIT_LIST_HEAD(&ext_int_hash[idx]);
207}
208
209static inline int ext_hash(u16 code)
210{
211 return (code + (code >> 9)) & 0xff;
212}
213
214int register_external_irq(u16 code, ext_int_handler_t handler)
215{
216 struct ext_int_info *p;
217 unsigned long flags;
218 int index;
219
220 p = kmalloc(sizeof(*p), GFP_ATOMIC);
221 if (!p)
222 return -ENOMEM;
223 p->code = code;
224 p->handler = handler;
225 index = ext_hash(code);
226
227 spin_lock_irqsave(&ext_int_hash_lock, flags);
228 list_add_rcu(&p->entry, &ext_int_hash[index]);
229 spin_unlock_irqrestore(&ext_int_hash_lock, flags);
230 return 0;
231}
232EXPORT_SYMBOL(register_external_irq);
233
234int unregister_external_irq(u16 code, ext_int_handler_t handler)
235{
236 struct ext_int_info *p;
237 unsigned long flags;
238 int index = ext_hash(code);
239
240 spin_lock_irqsave(&ext_int_hash_lock, flags);
241 list_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
242 if (p->code == code && p->handler == handler) {
243 list_del_rcu(&p->entry);
244 kfree_rcu(p, rcu);
245 }
246 }
247 spin_unlock_irqrestore(&ext_int_hash_lock, flags);
248 return 0;
249}
250EXPORT_SYMBOL(unregister_external_irq);
251
252void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
253 unsigned int param32, unsigned long param64)
254{
255 struct pt_regs *old_regs;
256 struct ext_int_info *p;
257 int index;
258
259 old_regs = set_irq_regs(regs);
260 irq_enter();
261 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) {
262
263 clock_comparator_work();
264 }
265 kstat_incr_irqs_this_cpu(EXTERNAL_INTERRUPT, NULL);
266 if (ext_code.code != EXT_IRQ_CLK_COMP)
267 __get_cpu_var(s390_idle).nohz_delay = 1;
268
269 index = ext_hash(ext_code.code);
270 rcu_read_lock();
271 list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
272 if (likely(p->code == ext_code.code))
273 p->handler(ext_code, param32, param64);
274 rcu_read_unlock();
275 irq_exit();
276 set_irq_regs(old_regs);
277}
278
279void __init init_IRQ(void)
280{
281 init_external_interrupts();
282}
283
284static DEFINE_SPINLOCK(irq_subclass_lock);
285static unsigned char irq_subclass_refcount[64];
286
287void irq_subclass_register(enum irq_subclass subclass)
288{
289 spin_lock(&irq_subclass_lock);
290 if (!irq_subclass_refcount[subclass])
291 ctl_set_bit(0, subclass);
292 irq_subclass_refcount[subclass]++;
293 spin_unlock(&irq_subclass_lock);
294}
295EXPORT_SYMBOL(irq_subclass_register);
296
297void irq_subclass_unregister(enum irq_subclass subclass)
298{
299 spin_lock(&irq_subclass_lock);
300 irq_subclass_refcount[subclass]--;
301 if (!irq_subclass_refcount[subclass])
302 ctl_clear_bit(0, subclass);
303 spin_unlock(&irq_subclass_lock);
304}
305EXPORT_SYMBOL(irq_subclass_unregister);
306
307#ifdef CONFIG_SMP
308void synchronize_irq(unsigned int irq)
309{
310
311
312
313
314}
315EXPORT_SYMBOL_GPL(synchronize_irq);
316#endif
317
318#ifndef CONFIG_PCI
319
320
321
322int request_irq(unsigned int irq, irq_handler_t handler,
323 unsigned long irqflags, const char *devname, void *dev_id)
324{
325 return -EINVAL;
326}
327EXPORT_SYMBOL_GPL(request_irq);
328
329const void *free_irq(unsigned int irq, void *dev_id)
330{
331 WARN_ON(1);
332 return NULL;
333}
334EXPORT_SYMBOL_GPL(free_irq);
335
336void enable_irq(unsigned int irq)
337{
338 WARN_ON(1);
339}
340EXPORT_SYMBOL_GPL(enable_irq);
341
342void disable_irq(unsigned int irq)
343{
344 WARN_ON(1);
345}
346EXPORT_SYMBOL_GPL(disable_irq);
347
348#endif
349
350void disable_irq_nosync(unsigned int irq)
351{
352 disable_irq(irq);
353}
354EXPORT_SYMBOL_GPL(disable_irq_nosync);
355
356unsigned long probe_irq_on(void)
357{
358 return 0;
359}
360EXPORT_SYMBOL_GPL(probe_irq_on);
361
362int probe_irq_off(unsigned long val)
363{
364 return 0;
365}
366EXPORT_SYMBOL_GPL(probe_irq_off);
367
368unsigned int probe_irq_mask(unsigned long val)
369{
370 return val;
371}
372EXPORT_SYMBOL_GPL(probe_irq_mask);
373
