LXR linux/arch/sparc/kernel/dtlb

   1/* DTLB ** ICACHE line 1: Context 0 check and TSB load  */
   2        ldxa    [%g0] ASI_DMMU_TSB_8KB_PTR, %g1 ! Get TSB 8K pointer
   3        ldxa    [%g0] ASI_DMMU, %g6             ! Get TAG TARGET
   4        srlx    %g6, 48, %g5                    ! Get context
   5        sllx    %g6, 22, %g6                    ! Zero out context
   6        brz,pn  %g5, kvmap_dtlb                 ! Context 0 processing
   7         srlx   %g6, 22, %g6                    ! Delay slot
   8        TSB_LOAD_QUAD(%g1, %g4)                 ! Load TSB entry
   9        cmp     %g4, %g6                        ! Compare TAG
  10
  11/* DTLB ** ICACHE line 2: TSB compare and TLB load      */
  12        bne,pn  %xcc, tsb_miss_dtlb             ! Miss
  13         mov    FAULT_CODE_DTLB, %g3
  14        stxa    %g5, [%g0] ASI_DTLB_DATA_IN     ! Load TLB
  15        retry                                   ! Trap done
  16        nop
  17        nop
  18        nop
  19        nop
  20
  21/* DTLB ** ICACHE line 3:                               */
  22        nop
  23        nop
  24        nop
  25        nop
  26        nop
  27        nop
  28        nop
  29        nop
  30
  31/* DTLB ** ICACHE line 4:                               */
  32        nop
  33        nop
  34        nop
  35        nop
  36        nop
  37        nop
  38        nop
  39        nop
  40