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26#include <linux/init.h>
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/errno.h>
30#include <linux/acpi.h>
31#include <linux/pci.h>
32#include <linux/mfd/core.h>
33
34#define SMBASE 0x40
35#define SMBUS_IO_SIZE 64
36
37#define GPIOBASE 0x44
38#define GPIO_IO_SIZE 64
39#define GPIO_IO_SIZE_CENTERTON 128
40
41#define WDTBASE 0x84
42#define WDT_IO_SIZE 64
43
44static struct resource smbus_sch_resource = {
45 .flags = IORESOURCE_IO,
46};
47
48static struct resource gpio_sch_resource = {
49 .flags = IORESOURCE_IO,
50};
51
52static struct resource wdt_sch_resource = {
53 .flags = IORESOURCE_IO,
54};
55
56static struct mfd_cell lpc_sch_cells[3];
57
58static struct mfd_cell isch_smbus_cell = {
59 .name = "isch_smbus",
60 .num_resources = 1,
61 .resources = &smbus_sch_resource,
62};
63
64static struct mfd_cell sch_gpio_cell = {
65 .name = "sch_gpio",
66 .num_resources = 1,
67 .resources = &gpio_sch_resource,
68};
69
70static struct mfd_cell wdt_sch_cell = {
71 .name = "ie6xx_wdt",
72 .num_resources = 1,
73 .resources = &wdt_sch_resource,
74};
75
76static const struct pci_device_id lpc_sch_ids[] = {
77 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
78 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) },
79 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB) },
80 { 0, }
81};
82MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
83
84static int lpc_sch_probe(struct pci_dev *dev,
85 const struct pci_device_id *id)
86{
87 unsigned int base_addr_cfg;
88 unsigned short base_addr;
89 int i, cells = 0;
90 int ret;
91
92 pci_read_config_dword(dev, SMBASE, &base_addr_cfg);
93 base_addr = 0;
94 if (!(base_addr_cfg & (1 << 31)))
95 dev_warn(&dev->dev, "Decode of the SMBus I/O range disabled\n");
96 else
97 base_addr = (unsigned short)base_addr_cfg;
98
99 if (base_addr == 0) {
100 dev_warn(&dev->dev, "I/O space for SMBus uninitialized\n");
101 } else {
102 lpc_sch_cells[cells++] = isch_smbus_cell;
103 smbus_sch_resource.start = base_addr;
104 smbus_sch_resource.end = base_addr + SMBUS_IO_SIZE - 1;
105 }
106
107 pci_read_config_dword(dev, GPIOBASE, &base_addr_cfg);
108 base_addr = 0;
109 if (!(base_addr_cfg & (1 << 31)))
110 dev_warn(&dev->dev, "Decode of the GPIO I/O range disabled\n");
111 else
112 base_addr = (unsigned short)base_addr_cfg;
113
114 if (base_addr == 0) {
115 dev_warn(&dev->dev, "I/O space for GPIO uninitialized\n");
116 } else {
117 lpc_sch_cells[cells++] = sch_gpio_cell;
118 gpio_sch_resource.start = base_addr;
119 if (id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB)
120 gpio_sch_resource.end = base_addr + GPIO_IO_SIZE_CENTERTON - 1;
121 else
122 gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1;
123 }
124
125 if (id->device == PCI_DEVICE_ID_INTEL_ITC_LPC
126 || id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB) {
127 pci_read_config_dword(dev, WDTBASE, &base_addr_cfg);
128 base_addr = 0;
129 if (!(base_addr_cfg & (1 << 31)))
130 dev_warn(&dev->dev, "Decode of the WDT I/O range disabled\n");
131 else
132 base_addr = (unsigned short)base_addr_cfg;
133 if (base_addr == 0)
134 dev_warn(&dev->dev, "I/O space for WDT uninitialized\n");
135 else {
136 lpc_sch_cells[cells++] = wdt_sch_cell;
137 wdt_sch_resource.start = base_addr;
138 wdt_sch_resource.end = base_addr + WDT_IO_SIZE - 1;
139 }
140 }
141
142 if (WARN_ON(cells > ARRAY_SIZE(lpc_sch_cells))) {
143 dev_err(&dev->dev, "Cell count exceeds array size");
144 return -ENODEV;
145 }
146
147 if (cells == 0) {
148 dev_err(&dev->dev, "All decode registers disabled.\n");
149 return -ENODEV;
150 }
151
152 for (i = 0; i < cells; i++)
153 lpc_sch_cells[i].id = id->device;
154
155 ret = mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
156 if (ret)
157 mfd_remove_devices(&dev->dev);
158
159 return ret;
160}
161
162static void lpc_sch_remove(struct pci_dev *dev)
163{
164 mfd_remove_devices(&dev->dev);
165}
166
167static struct pci_driver lpc_sch_driver = {
168 .name = "lpc_sch",
169 .id_table = lpc_sch_ids,
170 .probe = lpc_sch_probe,
171 .remove = lpc_sch_remove,
172};
173
174module_pci_driver(lpc_sch_driver);
175
176MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
177MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
178MODULE_LICENSE("GPL");
179
