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7#include <linux/init.h>
8#include <linux/pci.h>
9#include <linux/slab.h>
10#include <linux/module.h>
11#include <linux/proc_fs.h>
12#include <linux/seq_file.h>
13#include <linux/capability.h>
14#include <linux/security.h>
15#include <asm/uaccess.h>
16#include <asm/byteorder.h>
17#include "pci.h"
18
19static int proc_initialized;
20
21static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
22{
23 loff_t new = -1;
24 struct inode *inode = file_inode(file);
25
26 mutex_lock(&inode->i_mutex);
27 switch (whence) {
28 case 0:
29 new = off;
30 break;
31 case 1:
32 new = file->f_pos + off;
33 break;
34 case 2:
35 new = inode->i_size + off;
36 break;
37 }
38 if (new < 0 || new > inode->i_size)
39 new = -EINVAL;
40 else
41 file->f_pos = new;
42 mutex_unlock(&inode->i_mutex);
43 return new;
44}
45
46static ssize_t proc_bus_pci_read(struct file *file, char __user *buf,
47 size_t nbytes, loff_t *ppos)
48{
49 struct pci_dev *dev = PDE_DATA(file_inode(file));
50 unsigned int pos = *ppos;
51 unsigned int cnt, size;
52
53
54
55
56
57
58
59 if (capable(CAP_SYS_ADMIN))
60 size = dev->cfg_size;
61 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
62 size = 128;
63 else
64 size = 64;
65
66 if (pos >= size)
67 return 0;
68 if (nbytes >= size)
69 nbytes = size;
70 if (pos + nbytes > size)
71 nbytes = size - pos;
72 cnt = nbytes;
73
74 if (!access_ok(VERIFY_WRITE, buf, cnt))
75 return -EINVAL;
76
77 pci_config_pm_runtime_get(dev);
78
79 if ((pos & 1) && cnt) {
80 unsigned char val;
81 pci_user_read_config_byte(dev, pos, &val);
82 __put_user(val, buf);
83 buf++;
84 pos++;
85 cnt--;
86 }
87
88 if ((pos & 3) && cnt > 2) {
89 unsigned short val;
90 pci_user_read_config_word(dev, pos, &val);
91 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
92 buf += 2;
93 pos += 2;
94 cnt -= 2;
95 }
96
97 while (cnt >= 4) {
98 unsigned int val;
99 pci_user_read_config_dword(dev, pos, &val);
100 __put_user(cpu_to_le32(val), (__le32 __user *) buf);
101 buf += 4;
102 pos += 4;
103 cnt -= 4;
104 }
105
106 if (cnt >= 2) {
107 unsigned short val;
108 pci_user_read_config_word(dev, pos, &val);
109 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
110 buf += 2;
111 pos += 2;
112 cnt -= 2;
113 }
114
115 if (cnt) {
116 unsigned char val;
117 pci_user_read_config_byte(dev, pos, &val);
118 __put_user(val, buf);
119 buf++;
120 pos++;
121 cnt--;
122 }
123
124 pci_config_pm_runtime_put(dev);
125
126 *ppos = pos;
127 return nbytes;
128}
129
130static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
131 size_t nbytes, loff_t *ppos)
132{
133 struct inode *ino = file_inode(file);
134 struct pci_dev *dev = PDE_DATA(ino);
135 int pos = *ppos;
136 int size = dev->cfg_size;
137 int cnt;
138
139 if (get_securelevel() > 0)
140 return -EPERM;
141
142 if (pos >= size)
143 return 0;
144 if (nbytes >= size)
145 nbytes = size;
146 if (pos + nbytes > size)
147 nbytes = size - pos;
148 cnt = nbytes;
149
150 if (!access_ok(VERIFY_READ, buf, cnt))
151 return -EINVAL;
152
153 pci_config_pm_runtime_get(dev);
154
155 if ((pos & 1) && cnt) {
156 unsigned char val;
157 __get_user(val, buf);
158 pci_user_write_config_byte(dev, pos, val);
159 buf++;
160 pos++;
161 cnt--;
162 }
163
164 if ((pos & 3) && cnt > 2) {
165 __le16 val;
166 __get_user(val, (__le16 __user *) buf);
167 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
168 buf += 2;
169 pos += 2;
170 cnt -= 2;
171 }
172
173 while (cnt >= 4) {
174 __le32 val;
175 __get_user(val, (__le32 __user *) buf);
176 pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
177 buf += 4;
178 pos += 4;
179 cnt -= 4;
180 }
181
182 if (cnt >= 2) {
183 __le16 val;
184 __get_user(val, (__le16 __user *) buf);
185 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
186 buf += 2;
187 pos += 2;
188 cnt -= 2;
189 }
190
191 if (cnt) {
192 unsigned char val;
193 __get_user(val, buf);
194 pci_user_write_config_byte(dev, pos, val);
195 buf++;
196 pos++;
197 cnt--;
198 }
199
200 pci_config_pm_runtime_put(dev);
201
202 *ppos = pos;
203 i_size_write(ino, dev->cfg_size);
204 return nbytes;
205}
206
207struct pci_filp_private {
208 enum pci_mmap_state mmap_state;
209 int write_combine;
210};
211
212static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
213 unsigned long arg)
214{
215 struct pci_dev *dev = PDE_DATA(file_inode(file));
216#ifdef HAVE_PCI_MMAP
217 struct pci_filp_private *fpriv = file->private_data;
218#endif
219 int ret = 0;
220
221 if (get_securelevel() > 0)
222 return -EPERM;
223
224 switch (cmd) {
225 case PCIIOC_CONTROLLER:
226 ret = pci_domain_nr(dev->bus);
227 break;
228
229#ifdef HAVE_PCI_MMAP
230 case PCIIOC_MMAP_IS_IO:
231 fpriv->mmap_state = pci_mmap_io;
232 break;
233
234 case PCIIOC_MMAP_IS_MEM:
235 fpriv->mmap_state = pci_mmap_mem;
236 break;
237
238 case PCIIOC_WRITE_COMBINE:
239 if (arg)
240 fpriv->write_combine = 1;
241 else
242 fpriv->write_combine = 0;
243 break;
244
245#endif
246
247 default:
248 ret = -EINVAL;
249 break;
250 }
251
252 return ret;
253}
254
255#ifdef HAVE_PCI_MMAP
256static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
257{
258 struct pci_dev *dev = PDE_DATA(file_inode(file));
259 struct pci_filp_private *fpriv = file->private_data;
260 int i, ret;
261
262 if (!capable(CAP_SYS_RAWIO) || (get_securelevel() > 0))
263 return -EPERM;
264
265
266 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
267 if (pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS))
268 break;
269 }
270
271 if (i >= PCI_ROM_RESOURCE)
272 return -ENODEV;
273
274 ret = pci_mmap_page_range(dev, vma,
275 fpriv->mmap_state,
276 fpriv->write_combine);
277 if (ret < 0)
278 return ret;
279
280 return 0;
281}
282
283static int proc_bus_pci_open(struct inode *inode, struct file *file)
284{
285 struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
286
287 if (!fpriv)
288 return -ENOMEM;
289
290 fpriv->mmap_state = pci_mmap_io;
291 fpriv->write_combine = 0;
292
293 file->private_data = fpriv;
294
295 return 0;
296}
297
298static int proc_bus_pci_release(struct inode *inode, struct file *file)
299{
300 kfree(file->private_data);
301 file->private_data = NULL;
302
303 return 0;
304}
305#endif
306
307static const struct file_operations proc_bus_pci_operations = {
308 .owner = THIS_MODULE,
309 .llseek = proc_bus_pci_lseek,
310 .read = proc_bus_pci_read,
311 .write = proc_bus_pci_write,
312 .unlocked_ioctl = proc_bus_pci_ioctl,
313 .compat_ioctl = proc_bus_pci_ioctl,
314#ifdef HAVE_PCI_MMAP
315 .open = proc_bus_pci_open,
316 .release = proc_bus_pci_release,
317 .mmap = proc_bus_pci_mmap,
318#ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
319 .get_unmapped_area = get_pci_unmapped_area,
320#endif
321#endif
322};
323
324
325static void *pci_seq_start(struct seq_file *m, loff_t *pos)
326{
327 struct pci_dev *dev = NULL;
328 loff_t n = *pos;
329
330 for_each_pci_dev(dev) {
331 if (!n--)
332 break;
333 }
334 return dev;
335}
336
337static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
338{
339 struct pci_dev *dev = v;
340
341 (*pos)++;
342 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
343 return dev;
344}
345
346static void pci_seq_stop(struct seq_file *m, void *v)
347{
348 if (v) {
349 struct pci_dev *dev = v;
350 pci_dev_put(dev);
351 }
352}
353
354static int show_device(struct seq_file *m, void *v)
355{
356 const struct pci_dev *dev = v;
357 const struct pci_driver *drv;
358 int i;
359
360 if (dev == NULL)
361 return 0;
362
363 drv = pci_dev_driver(dev);
364 seq_printf(m, "%02x%02x\t%04x%04x\t%x",
365 dev->bus->number,
366 dev->devfn,
367 dev->vendor,
368 dev->device,
369 dev->irq);
370
371
372 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
373 resource_size_t start, end;
374 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
375 seq_printf(m, "\t%16llx",
376 (unsigned long long)(start |
377 (dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
378 }
379 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
380 resource_size_t start, end;
381 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
382 seq_printf(m, "\t%16llx",
383 dev->resource[i].start < dev->resource[i].end ?
384 (unsigned long long)(end - start) + 1 : 0);
385 }
386 seq_putc(m, '\t');
387 if (drv)
388 seq_printf(m, "%s", drv->name);
389 seq_putc(m, '\n');
390 return 0;
391}
392
393static const struct seq_operations proc_bus_pci_devices_op = {
394 .start = pci_seq_start,
395 .next = pci_seq_next,
396 .stop = pci_seq_stop,
397 .show = show_device
398};
399
400static struct proc_dir_entry *proc_bus_pci_dir;
401
402int pci_proc_attach_device(struct pci_dev *dev)
403{
404 struct pci_bus *bus = dev->bus;
405 struct proc_dir_entry *e;
406 char name[16];
407
408 if (!proc_initialized)
409 return -EACCES;
410
411 if (!bus->procdir) {
412 if (pci_proc_domain(bus)) {
413 sprintf(name, "%04x:%02x", pci_domain_nr(bus),
414 bus->number);
415 } else {
416 sprintf(name, "%02x", bus->number);
417 }
418 bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
419 if (!bus->procdir)
420 return -ENOMEM;
421 }
422
423 sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
424 e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
425 &proc_bus_pci_operations, dev);
426 if (!e)
427 return -ENOMEM;
428 proc_set_size(e, dev->cfg_size);
429 dev->procent = e;
430
431 return 0;
432}
433
434int pci_proc_detach_device(struct pci_dev *dev)
435{
436 proc_remove(dev->procent);
437 dev->procent = NULL;
438 return 0;
439}
440
441int pci_proc_detach_bus(struct pci_bus *bus)
442{
443 proc_remove(bus->procdir);
444 return 0;
445}
446
447static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
448{
449 return seq_open(file, &proc_bus_pci_devices_op);
450}
451
452static const struct file_operations proc_bus_pci_dev_operations = {
453 .owner = THIS_MODULE,
454 .open = proc_bus_pci_dev_open,
455 .read = seq_read,
456 .llseek = seq_lseek,
457 .release = seq_release,
458};
459
460static int __init pci_proc_init(void)
461{
462 struct pci_dev *dev = NULL;
463 proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
464 proc_create("devices", 0, proc_bus_pci_dir,
465 &proc_bus_pci_dev_operations);
466 proc_initialized = 1;
467 for_each_pci_dev(dev)
468 pci_proc_attach_device(dev);
469
470 return 0;
471}
472device_initcall(pci_proc_init);
473
