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48#include <linux/module.h>
49#include <linux/reboot.h>
50#include <linux/spinlock.h>
51#include <linux/pci_ids.h>
52#include <linux/interrupt.h>
53#include <linux/moduleparam.h>
54#include <linux/errno.h>
55#include <linux/types.h>
56#include <linux/delay.h>
57#include <linux/dma-mapping.h>
58#include <linux/timer.h>
59#include <linux/slab.h>
60#include <linux/pci.h>
61#include <linux/aer.h>
62#include <asm/dma.h>
63#include <asm/io.h>
64#include <asm/uaccess.h>
65#include <scsi/scsi_host.h>
66#include <scsi/scsi.h>
67#include <scsi/scsi_cmnd.h>
68#include <scsi/scsi_tcq.h>
69#include <scsi/scsi_device.h>
70#include <scsi/scsi_transport.h>
71#include <scsi/scsicam.h>
72#include "arcmsr.h"
73MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>");
74MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter");
75MODULE_LICENSE("Dual BSD/GPL");
76MODULE_VERSION(ARCMSR_DRIVER_VERSION);
77
78#define ARCMSR_SLEEPTIME 10
79#define ARCMSR_RETRYCOUNT 12
80
81wait_queue_head_t wait_q;
82static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
83 struct scsi_cmnd *cmd);
84static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
85static int arcmsr_abort(struct scsi_cmnd *);
86static int arcmsr_bus_reset(struct scsi_cmnd *);
87static int arcmsr_bios_param(struct scsi_device *sdev,
88 struct block_device *bdev, sector_t capacity, int *info);
89static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
90static int arcmsr_probe(struct pci_dev *pdev,
91 const struct pci_device_id *id);
92static void arcmsr_remove(struct pci_dev *pdev);
93static void arcmsr_shutdown(struct pci_dev *pdev);
94static void arcmsr_iop_init(struct AdapterControlBlock *acb);
95static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
96static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
97static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
98static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
99static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
100static void arcmsr_request_device_map(unsigned long pacb);
101static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb);
102static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb);
103static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb);
104static void arcmsr_message_isr_bh_fn(struct work_struct *work);
105static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
106static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
107static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB);
108static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
109static const char *arcmsr_info(struct Scsi_Host *);
110static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
111static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
112 int queue_depth, int reason)
113{
114 if (reason != SCSI_QDEPTH_DEFAULT)
115 return -EOPNOTSUPP;
116
117 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
118 queue_depth = ARCMSR_MAX_CMD_PERLUN;
119 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
120 return queue_depth;
121}
122
123static struct scsi_host_template arcmsr_scsi_host_template = {
124 .module = THIS_MODULE,
125 .name = "ARCMSR ARECA SATA/SAS RAID Controller"
126 ARCMSR_DRIVER_VERSION,
127 .info = arcmsr_info,
128 .queuecommand = arcmsr_queue_command,
129 .eh_abort_handler = arcmsr_abort,
130 .eh_bus_reset_handler = arcmsr_bus_reset,
131 .bios_param = arcmsr_bios_param,
132 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
133 .can_queue = ARCMSR_MAX_FREECCB_NUM,
134 .this_id = ARCMSR_SCSI_INITIATOR_ID,
135 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
136 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
137 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
138 .use_clustering = ENABLE_CLUSTERING,
139 .shost_attrs = arcmsr_host_attrs,
140 .no_write_same = 1,
141};
142static struct pci_device_id arcmsr_device_id_table[] = {
143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
160 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
161 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)},
162 {0, 0},
163};
164MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
165static struct pci_driver arcmsr_pci_driver = {
166 .name = "arcmsr",
167 .id_table = arcmsr_device_id_table,
168 .probe = arcmsr_probe,
169 .remove = arcmsr_remove,
170 .shutdown = arcmsr_shutdown,
171};
172
173
174
175
176
177static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb)
178{
179 switch (acb->adapter_type) {
180 case ACB_ADAPTER_TYPE_A:
181 case ACB_ADAPTER_TYPE_C:
182 break;
183 case ACB_ADAPTER_TYPE_B:{
184 dma_free_coherent(&acb->pdev->dev,
185 sizeof(struct MessageUnit_B),
186 acb->pmuB, acb->dma_coherent_handle_hbb_mu);
187 }
188 }
189}
190
191static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
192{
193 struct pci_dev *pdev = acb->pdev;
194 switch (acb->adapter_type){
195 case ACB_ADAPTER_TYPE_A:{
196 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
197 if (!acb->pmuA) {
198 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
199 return false;
200 }
201 break;
202 }
203 case ACB_ADAPTER_TYPE_B:{
204 void __iomem *mem_base0, *mem_base1;
205 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
206 if (!mem_base0) {
207 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
208 return false;
209 }
210 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
211 if (!mem_base1) {
212 iounmap(mem_base0);
213 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
214 return false;
215 }
216 acb->mem_base0 = mem_base0;
217 acb->mem_base1 = mem_base1;
218 break;
219 }
220 case ACB_ADAPTER_TYPE_C:{
221 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
222 if (!acb->pmuC) {
223 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
224 return false;
225 }
226 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
227 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);
228 return true;
229 }
230 break;
231 }
232 }
233 return true;
234}
235
236static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
237{
238 switch (acb->adapter_type) {
239 case ACB_ADAPTER_TYPE_A:{
240 iounmap(acb->pmuA);
241 }
242 break;
243 case ACB_ADAPTER_TYPE_B:{
244 iounmap(acb->mem_base0);
245 iounmap(acb->mem_base1);
246 }
247
248 break;
249 case ACB_ADAPTER_TYPE_C:{
250 iounmap(acb->pmuC);
251 }
252 }
253}
254
255static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
256{
257 irqreturn_t handle_state;
258 struct AdapterControlBlock *acb = dev_id;
259
260 handle_state = arcmsr_interrupt(acb);
261 return handle_state;
262}
263
264static int arcmsr_bios_param(struct scsi_device *sdev,
265 struct block_device *bdev, sector_t capacity, int *geom)
266{
267 int ret, heads, sectors, cylinders, total_capacity;
268 unsigned char *buffer;
269
270 buffer = scsi_bios_ptable(bdev);
271 if (buffer) {
272 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
273 kfree(buffer);
274 if (ret != -1)
275 return ret;
276 }
277 total_capacity = capacity;
278 heads = 64;
279 sectors = 32;
280 cylinders = total_capacity / (heads * sectors);
281 if (cylinders > 1024) {
282 heads = 255;
283 sectors = 63;
284 cylinders = total_capacity / (heads * sectors);
285 }
286 geom[0] = heads;
287 geom[1] = sectors;
288 geom[2] = cylinders;
289 return 0;
290}
291
292static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
293{
294 struct pci_dev *pdev = acb->pdev;
295 u16 dev_id;
296 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
297 acb->dev_id = dev_id;
298 switch (dev_id) {
299 case 0x1880: {
300 acb->adapter_type = ACB_ADAPTER_TYPE_C;
301 }
302 break;
303 case 0x1201: {
304 acb->adapter_type = ACB_ADAPTER_TYPE_B;
305 }
306 break;
307
308 default: acb->adapter_type = ACB_ADAPTER_TYPE_A;
309 }
310}
311
312static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
313{
314 struct MessageUnit_A __iomem *reg = acb->pmuA;
315 int i;
316
317 for (i = 0; i < 2000; i++) {
318 if (readl(®->outbound_intstatus) &
319 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
320 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
321 ®->outbound_intstatus);
322 return true;
323 }
324 msleep(10);
325 }
326
327 return false;
328}
329
330static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
331{
332 struct MessageUnit_B *reg = acb->pmuB;
333 int i;
334
335 for (i = 0; i < 2000; i++) {
336 if (readl(reg->iop2drv_doorbell)
337 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
338 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
339 reg->iop2drv_doorbell);
340 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
341 reg->drv2iop_doorbell);
342 return true;
343 }
344 msleep(10);
345 }
346
347 return false;
348}
349
350static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB)
351{
352 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
353 int i;
354
355 for (i = 0; i < 2000; i++) {
356 if (readl(&phbcmu->outbound_doorbell)
357 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
358 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
359 &phbcmu->outbound_doorbell_clear);
360 return true;
361 }
362 msleep(10);
363 }
364
365 return false;
366}
367
368static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
369{
370 struct MessageUnit_A __iomem *reg = acb->pmuA;
371 int retry_count = 30;
372 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0);
373 do {
374 if (arcmsr_hba_wait_msgint_ready(acb))
375 break;
376 else {
377 retry_count--;
378 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
379 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
380 }
381 } while (retry_count != 0);
382}
383
384static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
385{
386 struct MessageUnit_B *reg = acb->pmuB;
387 int retry_count = 30;
388 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
389 do {
390 if (arcmsr_hbb_wait_msgint_ready(acb))
391 break;
392 else {
393 retry_count--;
394 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
395 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
396 }
397 } while (retry_count != 0);
398}
399
400static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB)
401{
402 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
403 int retry_count = 30;
404 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0);
405 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
406 do {
407 if (arcmsr_hbc_wait_msgint_ready(pACB)) {
408 break;
409 } else {
410 retry_count--;
411 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
412 timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
413 }
414 } while (retry_count != 0);
415 return;
416}
417static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
418{
419 switch (acb->adapter_type) {
420
421 case ACB_ADAPTER_TYPE_A: {
422 arcmsr_flush_hba_cache(acb);
423 }
424 break;
425
426 case ACB_ADAPTER_TYPE_B: {
427 arcmsr_flush_hbb_cache(acb);
428 }
429 break;
430 case ACB_ADAPTER_TYPE_C: {
431 arcmsr_flush_hbc_cache(acb);
432 }
433 }
434}
435
436static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
437{
438 struct pci_dev *pdev = acb->pdev;
439 void *dma_coherent;
440 dma_addr_t dma_coherent_handle;
441 struct CommandControlBlock *ccb_tmp;
442 int i = 0, j = 0;
443 dma_addr_t cdb_phyaddr;
444 unsigned long roundup_ccbsize;
445 unsigned long max_xfer_len;
446 unsigned long max_sg_entrys;
447 uint32_t firm_config_version;
448
449 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
450 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
451 acb->devstate[i][j] = ARECA_RAID_GONE;
452
453 max_xfer_len = ARCMSR_MAX_XFER_LEN;
454 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
455 firm_config_version = acb->firm_cfg_version;
456 if((firm_config_version & 0xFF) >= 3){
457 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;
458 max_sg_entrys = (max_xfer_len/4096);
459 }
460 acb->host->max_sectors = max_xfer_len/512;
461 acb->host->sg_tablesize = max_sg_entrys;
462 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
463 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM;
464 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
465 if(!dma_coherent){
466 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
467 return -ENOMEM;
468 }
469 acb->dma_coherent = dma_coherent;
470 acb->dma_coherent_handle = dma_coherent_handle;
471 memset(dma_coherent, 0, acb->uncache_size);
472 ccb_tmp = dma_coherent;
473 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
474 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){
475 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
476 ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5));
477 acb->pccb_pool[i] = ccb_tmp;
478 ccb_tmp->acb = acb;
479 INIT_LIST_HEAD(&ccb_tmp->list);
480 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
481 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
482 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
483 }
484 return 0;
485}
486
487static void arcmsr_message_isr_bh_fn(struct work_struct *work)
488{
489 struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh);
490 switch (acb->adapter_type) {
491 case ACB_ADAPTER_TYPE_A: {
492
493 struct MessageUnit_A __iomem *reg = acb->pmuA;
494 char *acb_dev_map = (char *)acb->device_map;
495 uint32_t __iomem *signature = (uint32_t __iomem*) (®->message_rwbuffer[0]);
496 char __iomem *devicemap = (char __iomem*) (®->message_rwbuffer[21]);
497 int target, lun;
498 struct scsi_device *psdev;
499 char diff;
500
501 atomic_inc(&acb->rq_map_token);
502 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
503 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
504 diff = (*acb_dev_map)^readb(devicemap);
505 if (diff != 0) {
506 char temp;
507 *acb_dev_map = readb(devicemap);
508 temp =*acb_dev_map;
509 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
510 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
511 scsi_add_device(acb->host, 0, target, lun);
512 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
513 psdev = scsi_device_lookup(acb->host, 0, target, lun);
514 if (psdev != NULL ) {
515 scsi_remove_device(psdev);
516 scsi_device_put(psdev);
517 }
518 }
519 temp >>= 1;
520 diff >>= 1;
521 }
522 }
523 devicemap++;
524 acb_dev_map++;
525 }
526 }
527 break;
528 }
529
530 case ACB_ADAPTER_TYPE_B: {
531 struct MessageUnit_B *reg = acb->pmuB;
532 char *acb_dev_map = (char *)acb->device_map;
533 uint32_t __iomem *signature = (uint32_t __iomem*)(®->message_rwbuffer[0]);
534 char __iomem *devicemap = (char __iomem*)(®->message_rwbuffer[21]);
535 int target, lun;
536 struct scsi_device *psdev;
537 char diff;
538
539 atomic_inc(&acb->rq_map_token);
540 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
541 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
542 diff = (*acb_dev_map)^readb(devicemap);
543 if (diff != 0) {
544 char temp;
545 *acb_dev_map = readb(devicemap);
546 temp =*acb_dev_map;
547 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
548 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
549 scsi_add_device(acb->host, 0, target, lun);
550 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
551 psdev = scsi_device_lookup(acb->host, 0, target, lun);
552 if (psdev != NULL ) {
553 scsi_remove_device(psdev);
554 scsi_device_put(psdev);
555 }
556 }
557 temp >>= 1;
558 diff >>= 1;
559 }
560 }
561 devicemap++;
562 acb_dev_map++;
563 }
564 }
565 }
566 break;
567 case ACB_ADAPTER_TYPE_C: {
568 struct MessageUnit_C *reg = acb->pmuC;
569 char *acb_dev_map = (char *)acb->device_map;
570 uint32_t __iomem *signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]);
571 char __iomem *devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]);
572 int target, lun;
573 struct scsi_device *psdev;
574 char diff;
575
576 atomic_inc(&acb->rq_map_token);
577 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
578 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) {
579 diff = (*acb_dev_map)^readb(devicemap);
580 if (diff != 0) {
581 char temp;
582 *acb_dev_map = readb(devicemap);
583 temp = *acb_dev_map;
584 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
585 if ((temp & 0x01) == 1 && (diff & 0x01) == 1) {
586 scsi_add_device(acb->host, 0, target, lun);
587 } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) {
588 psdev = scsi_device_lookup(acb->host, 0, target, lun);
589 if (psdev != NULL) {
590 scsi_remove_device(psdev);
591 scsi_device_put(psdev);
592 }
593 }
594 temp >>= 1;
595 diff >>= 1;
596 }
597 }
598 devicemap++;
599 acb_dev_map++;
600 }
601 }
602 }
603 }
604}
605
606static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
607{
608 struct Scsi_Host *host;
609 struct AdapterControlBlock *acb;
610 uint8_t bus,dev_fun;
611 int error;
612 error = pci_enable_device(pdev);
613 if(error){
614 return -ENODEV;
615 }
616 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
617 if(!host){
618 goto pci_disable_dev;
619 }
620 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
621 if(error){
622 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
623 if(error){
624 printk(KERN_WARNING
625 "scsi%d: No suitable DMA mask available\n",
626 host->host_no);
627 goto scsi_host_release;
628 }
629 }
630 init_waitqueue_head(&wait_q);
631 bus = pdev->bus->number;
632 dev_fun = pdev->devfn;
633 acb = (struct AdapterControlBlock *) host->hostdata;
634 memset(acb,0,sizeof(struct AdapterControlBlock));
635 acb->pdev = pdev;
636 acb->host = host;
637 host->max_lun = ARCMSR_MAX_TARGETLUN;
638 host->max_id = ARCMSR_MAX_TARGETID;
639 host->max_cmd_len = 16;
640 host->can_queue = ARCMSR_MAX_FREECCB_NUM;
641 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
642 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
643 host->unique_id = (bus << 8) | dev_fun;
644 pci_set_drvdata(pdev, host);
645 pci_set_master(pdev);
646 error = pci_request_regions(pdev, "arcmsr");
647 if(error){
648 goto scsi_host_release;
649 }
650 spin_lock_init(&acb->eh_lock);
651 spin_lock_init(&acb->ccblist_lock);
652 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
653 ACB_F_MESSAGE_RQBUFFER_CLEARED |
654 ACB_F_MESSAGE_WQBUFFER_READED);
655 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
656 INIT_LIST_HEAD(&acb->ccb_free_list);
657 arcmsr_define_adapter_type(acb);
658 error = arcmsr_remap_pciregion(acb);
659 if(!error){
660 goto pci_release_regs;
661 }
662 error = arcmsr_get_firmware_spec(acb);
663 if(!error){
664 goto unmap_pci_region;
665 }
666 error = arcmsr_alloc_ccb_pool(acb);
667 if(error){
668 goto free_hbb_mu;
669 }
670 arcmsr_iop_init(acb);
671 error = scsi_add_host(host, &pdev->dev);
672 if(error){
673 goto free_ccb_pool;
674 }
675 error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb);
676 if(error){
677 goto scsi_host_remove;
678 }
679 host->irq = pdev->irq;
680 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
681 atomic_set(&acb->rq_map_token, 16);
682 atomic_set(&acb->ante_token_value, 16);
683 acb->fw_flag = FW_NORMAL;
684 init_timer(&acb->eternal_timer);
685 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
686 acb->eternal_timer.data = (unsigned long) acb;
687 acb->eternal_timer.function = &arcmsr_request_device_map;
688 add_timer(&acb->eternal_timer);
689 if(arcmsr_alloc_sysfs_attr(acb))
690 goto out_free_sysfs;
691 scsi_scan_host(host);
692 return 0;
693out_free_sysfs:
694 del_timer_sync(&acb->eternal_timer);
695 flush_work(&acb->arcmsr_do_message_isr_bh);
696 free_irq(pdev->irq, acb);
697scsi_host_remove:
698 scsi_remove_host(host);
699free_ccb_pool:
700 arcmsr_stop_adapter_bgrb(acb);
701 arcmsr_flush_adapter_cache(acb);
702 arcmsr_free_ccb_pool(acb);
703free_hbb_mu:
704 arcmsr_free_hbb_mu(acb);
705unmap_pci_region:
706 arcmsr_unmap_pciregion(acb);
707pci_release_regs:
708 pci_release_regions(pdev);
709scsi_host_release:
710 scsi_host_put(host);
711pci_disable_dev:
712 pci_disable_device(pdev);
713 return -ENODEV;
714}
715
716static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
717{
718 struct MessageUnit_A __iomem *reg = acb->pmuA;
719 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0);
720 if (!arcmsr_hba_wait_msgint_ready(acb)) {
721 printk(KERN_NOTICE
722 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
723 , acb->host->host_no);
724 return false;
725 }
726 return true;
727}
728
729static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
730{
731 struct MessageUnit_B *reg = acb->pmuB;
732
733 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
734 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
735 printk(KERN_NOTICE
736 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
737 , acb->host->host_no);
738 return false;
739 }
740 return true;
741}
742static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB)
743{
744 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
745 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0);
746 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
747 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
748 printk(KERN_NOTICE
749 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
750 , pACB->host->host_no);
751 return false;
752 }
753 return true;
754}
755static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
756{
757 uint8_t rtnval = 0;
758 switch (acb->adapter_type) {
759 case ACB_ADAPTER_TYPE_A: {
760 rtnval = arcmsr_abort_hba_allcmd(acb);
761 }
762 break;
763
764 case ACB_ADAPTER_TYPE_B: {
765 rtnval = arcmsr_abort_hbb_allcmd(acb);
766 }
767 break;
768
769 case ACB_ADAPTER_TYPE_C: {
770 rtnval = arcmsr_abort_hbc_allcmd(acb);
771 }
772 }
773 return rtnval;
774}
775
776static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb)
777{
778 struct MessageUnit_B *reg = pacb->pmuB;
779 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
780 if (!arcmsr_hbb_wait_msgint_ready(pacb)) {
781 printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no);
782 return false;
783 }
784 return true;
785}
786
787static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
788{
789 struct scsi_cmnd *pcmd = ccb->pcmd;
790
791 scsi_dma_unmap(pcmd);
792}
793
794static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
795{
796 struct AdapterControlBlock *acb = ccb->acb;
797 struct scsi_cmnd *pcmd = ccb->pcmd;
798 unsigned long flags;
799 atomic_dec(&acb->ccboutstandingcount);
800 arcmsr_pci_unmap_dma(ccb);
801 ccb->startdone = ARCMSR_CCB_DONE;
802 spin_lock_irqsave(&acb->ccblist_lock, flags);
803 list_add_tail(&ccb->list, &acb->ccb_free_list);
804 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
805 pcmd->scsi_done(pcmd);
806}
807
808static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
809{
810
811 struct scsi_cmnd *pcmd = ccb->pcmd;
812 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
813 pcmd->result = DID_OK << 16;
814 if (sensebuffer) {
815 int sense_data_length =
816 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
817 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
818 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
819 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
820 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
821 sensebuffer->Valid = 1;
822 }
823}
824
825static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
826{
827 u32 orig_mask = 0;
828 switch (acb->adapter_type) {
829 case ACB_ADAPTER_TYPE_A : {
830 struct MessageUnit_A __iomem *reg = acb->pmuA;
831 orig_mask = readl(®->outbound_intmask);
832 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
833 ®->outbound_intmask);
834 }
835 break;
836 case ACB_ADAPTER_TYPE_B : {
837 struct MessageUnit_B *reg = acb->pmuB;
838 orig_mask = readl(reg->iop2drv_doorbell_mask);
839 writel(0, reg->iop2drv_doorbell_mask);
840 }
841 break;
842 case ACB_ADAPTER_TYPE_C:{
843 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
844
845 orig_mask = readl(®->host_int_mask);
846 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask);
847 }
848 break;
849 }
850 return orig_mask;
851}
852
853static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
854 struct CommandControlBlock *ccb, bool error)
855{
856 uint8_t id, lun;
857 id = ccb->pcmd->device->id;
858 lun = ccb->pcmd->device->lun;
859 if (!error) {
860 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
861 acb->devstate[id][lun] = ARECA_RAID_GOOD;
862 ccb->pcmd->result = DID_OK << 16;
863 arcmsr_ccb_complete(ccb);
864 }else{
865 switch (ccb->arcmsr_cdb.DeviceStatus) {
866 case ARCMSR_DEV_SELECT_TIMEOUT: {
867 acb->devstate[id][lun] = ARECA_RAID_GONE;
868 ccb->pcmd->result = DID_NO_CONNECT << 16;
869 arcmsr_ccb_complete(ccb);
870 }
871 break;
872
873 case ARCMSR_DEV_ABORTED:
874
875 case ARCMSR_DEV_INIT_FAIL: {
876 acb->devstate[id][lun] = ARECA_RAID_GONE;
877 ccb->pcmd->result = DID_BAD_TARGET << 16;
878 arcmsr_ccb_complete(ccb);
879 }
880 break;
881
882 case ARCMSR_DEV_CHECK_CONDITION: {
883 acb->devstate[id][lun] = ARECA_RAID_GOOD;
884 arcmsr_report_sense_info(ccb);
885 arcmsr_ccb_complete(ccb);
886 }
887 break;
888
889 default:
890 printk(KERN_NOTICE
891 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
892 but got unknown DeviceStatus = 0x%x \n"
893 , acb->host->host_no
894 , id
895 , lun
896 , ccb->arcmsr_cdb.DeviceStatus);
897 acb->devstate[id][lun] = ARECA_RAID_GONE;
898 ccb->pcmd->result = DID_NO_CONNECT << 16;
899 arcmsr_ccb_complete(ccb);
900 break;
901 }
902 }
903}
904
905static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
906{
907 int id, lun;
908 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
909 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
910 struct scsi_cmnd *abortcmd = pCCB->pcmd;
911 if (abortcmd) {
912 id = abortcmd->device->id;
913 lun = abortcmd->device->lun;
914 abortcmd->result |= DID_ABORT << 16;
915 arcmsr_ccb_complete(pCCB);
916 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
917 acb->host->host_no, pCCB);
918 }
919 return;
920 }
921 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
922 done acb = '0x%p'"
923 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
924 " ccboutstandingcount = %d \n"
925 , acb->host->host_no
926 , acb
927 , pCCB
928 , pCCB->acb
929 , pCCB->startdone
930 , atomic_read(&acb->ccboutstandingcount));
931 return;
932 }
933 arcmsr_report_ccb_state(acb, pCCB, error);
934}
935
936static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
937{
938 int i = 0;
939 uint32_t flag_ccb;
940 struct ARCMSR_CDB *pARCMSR_CDB;
941 bool error;
942 struct CommandControlBlock *pCCB;
943 switch (acb->adapter_type) {
944
945 case ACB_ADAPTER_TYPE_A: {
946 struct MessageUnit_A __iomem *reg = acb->pmuA;
947 uint32_t outbound_intstatus;
948 outbound_intstatus = readl(®->outbound_intstatus) &
949 acb->outbound_int_enable;
950
951 writel(outbound_intstatus, ®->outbound_intstatus);
952 while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF)
953 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
954 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
955 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
956 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
957 arcmsr_drain_donequeue(acb, pCCB, error);
958 }
959 }
960 break;
961
962 case ACB_ADAPTER_TYPE_B: {
963 struct MessageUnit_B *reg = acb->pmuB;
964
965 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
966 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
967 if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) {
968 writel(0, ®->done_qbuffer[i]);
969 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));
970 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
971 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
972 arcmsr_drain_donequeue(acb, pCCB, error);
973 }
974 reg->post_qbuffer[i] = 0;
975 }
976 reg->doneq_index = 0;
977 reg->postq_index = 0;
978 }
979 break;
980 case ACB_ADAPTER_TYPE_C: {
981 struct MessageUnit_C *reg = acb->pmuC;
982 struct ARCMSR_CDB *pARCMSR_CDB;
983 uint32_t flag_ccb, ccb_cdb_phy;
984 bool error;
985 struct CommandControlBlock *pCCB;
986 while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
987
988 flag_ccb = readl(®->outbound_queueport_low);
989 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
990 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);
991 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
992 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
993 arcmsr_drain_donequeue(acb, pCCB, error);
994 }
995 }
996 }
997}
998static void arcmsr_remove(struct pci_dev *pdev)
999{
1000 struct Scsi_Host *host = pci_get_drvdata(pdev);
1001 struct AdapterControlBlock *acb =
1002 (struct AdapterControlBlock *) host->hostdata;
1003 int poll_count = 0;
1004 arcmsr_free_sysfs_attr(acb);
1005 scsi_remove_host(host);
1006 flush_work(&acb->arcmsr_do_message_isr_bh);
1007 del_timer_sync(&acb->eternal_timer);
1008 arcmsr_disable_outbound_ints(acb);
1009 arcmsr_stop_adapter_bgrb(acb);
1010 arcmsr_flush_adapter_cache(acb);
1011 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1012 acb->acb_flags &= ~ACB_F_IOP_INITED;
1013
1014 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){
1015 if (!atomic_read(&acb->ccboutstandingcount))
1016 break;
1017 arcmsr_interrupt(acb);
1018 msleep(25);
1019 }
1020
1021 if (atomic_read(&acb->ccboutstandingcount)) {
1022 int i;
1023
1024 arcmsr_abort_allcmd(acb);
1025 arcmsr_done4abort_postqueue(acb);
1026 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
1027 struct CommandControlBlock *ccb = acb->pccb_pool[i];
1028 if (ccb->startdone == ARCMSR_CCB_START) {
1029 ccb->startdone = ARCMSR_CCB_ABORTED;
1030 ccb->pcmd->result = DID_ABORT << 16;
1031 arcmsr_ccb_complete(ccb);
1032 }
1033 }
1034 }
1035 free_irq(pdev->irq, acb);
1036 arcmsr_free_ccb_pool(acb);
1037 arcmsr_free_hbb_mu(acb);
1038 arcmsr_unmap_pciregion(acb);
1039 pci_release_regions(pdev);
1040 scsi_host_put(host);
1041 pci_disable_device(pdev);
1042 pci_set_drvdata(pdev, NULL);
1043}
1044
1045static void arcmsr_shutdown(struct pci_dev *pdev)
1046{
1047 struct Scsi_Host *host = pci_get_drvdata(pdev);
1048 struct AdapterControlBlock *acb =
1049 (struct AdapterControlBlock *)host->hostdata;
1050 del_timer_sync(&acb->eternal_timer);
1051 arcmsr_disable_outbound_ints(acb);
1052 flush_work(&acb->arcmsr_do_message_isr_bh);
1053 arcmsr_stop_adapter_bgrb(acb);
1054 arcmsr_flush_adapter_cache(acb);
1055}
1056
1057static int arcmsr_module_init(void)
1058{
1059 int error = 0;
1060 error = pci_register_driver(&arcmsr_pci_driver);
1061 return error;
1062}
1063
1064static void arcmsr_module_exit(void)
1065{
1066 pci_unregister_driver(&arcmsr_pci_driver);
1067}
1068module_init(arcmsr_module_init);
1069module_exit(arcmsr_module_exit);
1070
1071static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1072 u32 intmask_org)
1073{
1074 u32 mask;
1075 switch (acb->adapter_type) {
1076
1077 case ACB_ADAPTER_TYPE_A: {
1078 struct MessageUnit_A __iomem *reg = acb->pmuA;
1079 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1080 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1081 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1082 writel(mask, ®->outbound_intmask);
1083 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1084 }
1085 break;
1086
1087 case ACB_ADAPTER_TYPE_B: {
1088 struct MessageUnit_B *reg = acb->pmuB;
1089 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1090 ARCMSR_IOP2DRV_DATA_READ_OK |
1091 ARCMSR_IOP2DRV_CDB_DONE |
1092 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1093 writel(mask, reg->iop2drv_doorbell_mask);
1094 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1095 }
1096 break;
1097 case ACB_ADAPTER_TYPE_C: {
1098 struct MessageUnit_C *reg = acb->pmuC;
1099 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1100 writel(intmask_org & mask, ®->host_int_mask);
1101 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1102 }
1103 }
1104}
1105
1106static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1107 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1108{
1109 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1110 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1111 __le32 address_lo, address_hi;
1112 int arccdbsize = 0x30;
1113 __le32 length = 0;
1114 int i;
1115 struct scatterlist *sg;
1116 int nseg;
1117 ccb->pcmd = pcmd;
1118 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1119 arcmsr_cdb->TargetID = pcmd->device->id;
1120 arcmsr_cdb->LUN = pcmd->device->lun;
1121 arcmsr_cdb->Function = 1;
1122 arcmsr_cdb->Context = 0;
1123 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1124
1125 nseg = scsi_dma_map(pcmd);
1126 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1127 return FAILED;
1128 scsi_for_each_sg(pcmd, sg, nseg, i) {
1129
1130 length = cpu_to_le32(sg_dma_len(sg));
1131 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1132 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1133 if (address_hi == 0) {
1134 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1135
1136 pdma_sg->address = address_lo;
1137 pdma_sg->length = length;
1138 psge += sizeof (struct SG32ENTRY);
1139 arccdbsize += sizeof (struct SG32ENTRY);
1140 } else {
1141 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1142
1143 pdma_sg->addresshigh = address_hi;
1144 pdma_sg->address = address_lo;
1145 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1146 psge += sizeof (struct SG64ENTRY);
1147 arccdbsize += sizeof (struct SG64ENTRY);
1148 }
1149 }
1150 arcmsr_cdb->sgcount = (uint8_t)nseg;
1151 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1152 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1153 if ( arccdbsize > 256)
1154 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1155 if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1156 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1157 ccb->arc_cdb_size = arccdbsize;
1158 return SUCCESS;
1159}
1160
1161static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1162{
1163 uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern;
1164 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1165 atomic_inc(&acb->ccboutstandingcount);
1166 ccb->startdone = ARCMSR_CCB_START;
1167 switch (acb->adapter_type) {
1168 case ACB_ADAPTER_TYPE_A: {
1169 struct MessageUnit_A __iomem *reg = acb->pmuA;
1170
1171 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1172 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1173 ®->inbound_queueport);
1174 else {
1175 writel(cdb_phyaddr_pattern, ®->inbound_queueport);
1176 }
1177 }
1178 break;
1179
1180 case ACB_ADAPTER_TYPE_B: {
1181 struct MessageUnit_B *reg = acb->pmuB;
1182 uint32_t ending_index, index = reg->postq_index;
1183
1184 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1185 writel(0, ®->post_qbuffer[ending_index]);
1186 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1187 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
1188 ®->post_qbuffer[index]);
1189 } else {
1190 writel(cdb_phyaddr_pattern, ®->post_qbuffer[index]);
1191 }
1192 index++;
1193 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1194 reg->postq_index = index;
1195 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1196 }
1197 break;
1198 case ACB_ADAPTER_TYPE_C: {
1199 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1200 uint32_t ccb_post_stamp, arc_cdb_size;
1201
1202 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1203 ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1);
1204 if (acb->cdb_phyaddr_hi32) {
1205 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1206 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1207 } else {
1208 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1209 }
1210 }
1211 }
1212}
1213
1214static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
1215{
1216 struct MessageUnit_A __iomem *reg = acb->pmuA;
1217 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1218 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0);
1219 if (!arcmsr_hba_wait_msgint_ready(acb)) {
1220 printk(KERN_NOTICE
1221 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1222 , acb->host->host_no);
1223 }
1224}
1225
1226static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1227{
1228 struct MessageUnit_B *reg = acb->pmuB;
1229 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1230 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1231
1232 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
1233 printk(KERN_NOTICE
1234 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1235 , acb->host->host_no);
1236 }
1237}
1238
1239static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB)
1240{
1241 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1242 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1243 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0);
1244 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
1245 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
1246 printk(KERN_NOTICE
1247 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1248 , pACB->host->host_no);
1249 }
1250 return;
1251}
1252static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1253{
1254 switch (acb->adapter_type) {
1255 case ACB_ADAPTER_TYPE_A: {
1256 arcmsr_stop_hba_bgrb(acb);
1257 }
1258 break;
1259
1260 case ACB_ADAPTER_TYPE_B: {
1261 arcmsr_stop_hbb_bgrb(acb);
1262 }
1263 break;
1264 case ACB_ADAPTER_TYPE_C: {
1265 arcmsr_stop_hbc_bgrb(acb);
1266 }
1267 }
1268}
1269
1270static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1271{
1272 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
1273}
1274
1275void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1276{
1277 switch (acb->adapter_type) {
1278 case ACB_ADAPTER_TYPE_A: {
1279 struct MessageUnit_A __iomem *reg = acb->pmuA;
1280 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell);
1281 }
1282 break;
1283
1284 case ACB_ADAPTER_TYPE_B: {
1285 struct MessageUnit_B *reg = acb->pmuB;
1286 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
1287 }
1288 break;
1289 case ACB_ADAPTER_TYPE_C: {
1290 struct MessageUnit_C __iomem *reg = acb->pmuC;
1291 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell);
1292 }
1293 }
1294}
1295
1296static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1297{
1298 switch (acb->adapter_type) {
1299 case ACB_ADAPTER_TYPE_A: {
1300 struct MessageUnit_A __iomem *reg = acb->pmuA;
1301
1302
1303
1304
1305 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell);
1306 }
1307 break;
1308
1309 case ACB_ADAPTER_TYPE_B: {
1310 struct MessageUnit_B *reg = acb->pmuB;
1311
1312
1313
1314
1315 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
1316 }
1317 break;
1318 case ACB_ADAPTER_TYPE_C: {
1319 struct MessageUnit_C __iomem *reg = acb->pmuC;
1320
1321
1322
1323
1324 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell);
1325 }
1326 break;
1327 }
1328}
1329
1330struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
1331{
1332 struct QBUFFER __iomem *qbuffer = NULL;
1333 switch (acb->adapter_type) {
1334
1335 case ACB_ADAPTER_TYPE_A: {
1336 struct MessageUnit_A __iomem *reg = acb->pmuA;
1337 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer;
1338 }
1339 break;
1340
1341 case ACB_ADAPTER_TYPE_B: {
1342 struct MessageUnit_B *reg = acb->pmuB;
1343 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1344 }
1345 break;
1346 case ACB_ADAPTER_TYPE_C: {
1347 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1348 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1349 }
1350 }
1351 return qbuffer;
1352}
1353
1354static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
1355{
1356 struct QBUFFER __iomem *pqbuffer = NULL;
1357 switch (acb->adapter_type) {
1358
1359 case ACB_ADAPTER_TYPE_A: {
1360 struct MessageUnit_A __iomem *reg = acb->pmuA;
1361 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer;
1362 }
1363 break;
1364
1365 case ACB_ADAPTER_TYPE_B: {
1366 struct MessageUnit_B *reg = acb->pmuB;
1367 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
1368 }
1369 break;
1370 case ACB_ADAPTER_TYPE_C: {
1371 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
1372 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer;
1373 }
1374
1375 }
1376 return pqbuffer;
1377}
1378
1379static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1380{
1381 struct QBUFFER __iomem *prbuffer;
1382 struct QBUFFER *pQbuffer;
1383 uint8_t __iomem *iop_data;
1384 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
1385 rqbuf_lastindex = acb->rqbuf_lastindex;
1386 rqbuf_firstindex = acb->rqbuf_firstindex;
1387 prbuffer = arcmsr_get_iop_rqbuffer(acb);
1388 iop_data = (uint8_t __iomem *)prbuffer->data;
1389 iop_len = prbuffer->data_len;
1390 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1);
1391
1392 if (my_empty_len >= iop_len)
1393 {
1394 while (iop_len > 0) {
1395 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
1396 memcpy(pQbuffer, iop_data, 1);
1397 rqbuf_lastindex++;
1398 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1399 iop_data++;
1400 iop_len--;
1401 }
1402 acb->rqbuf_lastindex = rqbuf_lastindex;
1403 arcmsr_iop_message_read(acb);
1404 }
1405
1406 else {
1407 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1408 }
1409}
1410
1411static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1412{
1413 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
1414 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
1415 uint8_t *pQbuffer;
1416 struct QBUFFER __iomem *pwbuffer;
1417 uint8_t __iomem *iop_data;
1418 int32_t allxfer_len = 0;
1419
1420 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1421 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1422 iop_data = (uint8_t __iomem *)pwbuffer->data;
1423
1424 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
1425 (allxfer_len < 124)) {
1426 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1427 memcpy(iop_data, pQbuffer, 1);
1428 acb->wqbuf_firstindex++;
1429 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1430 iop_data++;
1431 allxfer_len++;
1432 }
1433 pwbuffer->data_len = allxfer_len;
1434
1435 arcmsr_iop_message_wrote(acb);
1436 }
1437
1438 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
1439 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1440 }
1441}
1442
1443static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
1444{
1445 uint32_t outbound_doorbell;
1446 struct MessageUnit_A __iomem *reg = acb->pmuA;
1447 outbound_doorbell = readl(®->outbound_doorbell);
1448 writel(outbound_doorbell, ®->outbound_doorbell);
1449 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1450 arcmsr_iop2drv_data_wrote_handle(acb);
1451 }
1452
1453 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
1454 arcmsr_iop2drv_data_read_handle(acb);
1455 }
1456}
1457static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB)
1458{
1459 uint32_t outbound_doorbell;
1460 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1461
1462
1463
1464
1465
1466
1467
1468 outbound_doorbell = readl(®->outbound_doorbell);
1469 writel(outbound_doorbell, ®->outbound_doorbell_clear);
1470 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
1471 arcmsr_iop2drv_data_wrote_handle(pACB);
1472 }
1473 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) {
1474 arcmsr_iop2drv_data_read_handle(pACB);
1475 }
1476 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
1477 arcmsr_hbc_message_isr(pACB);
1478 }
1479 return;
1480}
1481static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1482{
1483 uint32_t flag_ccb;
1484 struct MessageUnit_A __iomem *reg = acb->pmuA;
1485 struct ARCMSR_CDB *pARCMSR_CDB;
1486 struct CommandControlBlock *pCCB;
1487 bool error;
1488 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) {
1489 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
1490 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1491 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1492 arcmsr_drain_donequeue(acb, pCCB, error);
1493 }
1494}
1495static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1496{
1497 uint32_t index;
1498 uint32_t flag_ccb;
1499 struct MessageUnit_B *reg = acb->pmuB;
1500 struct ARCMSR_CDB *pARCMSR_CDB;
1501 struct CommandControlBlock *pCCB;
1502 bool error;
1503 index = reg->doneq_index;
1504 while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) {
1505 writel(0, ®->done_qbuffer[index]);
1506 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));
1507 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1508 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1509 arcmsr_drain_donequeue(acb, pCCB, error);
1510 index++;
1511 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1512 reg->doneq_index = index;
1513 }
1514}
1515
1516static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
1517{
1518 struct MessageUnit_C *phbcmu;
1519 struct ARCMSR_CDB *arcmsr_cdb;
1520 struct CommandControlBlock *ccb;
1521 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
1522 int error;
1523
1524 phbcmu = (struct MessageUnit_C *)acb->pmuC;
1525
1526
1527
1528 while (readl(&phbcmu->host_int_status) &
1529 ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){
1530
1531 flag_ccb = readl(&phbcmu->outbound_queueport_low);
1532 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1533 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1534 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
1535 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1536
1537 arcmsr_drain_donequeue(acb, ccb, error);
1538 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
1539 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell);
1540 break;
1541 }
1542 throttling++;
1543 }
1544}
1545
1546
1547
1548
1549
1550
1551
1552
1553static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb)
1554{
1555 struct MessageUnit_A *reg = acb->pmuA;
1556
1557 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus);
1558 schedule_work(&acb->arcmsr_do_message_isr_bh);
1559}
1560static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb)
1561{
1562 struct MessageUnit_B *reg = acb->pmuB;
1563
1564
1565 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
1566 schedule_work(&acb->arcmsr_do_message_isr_bh);
1567}
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb)
1578{
1579 struct MessageUnit_C *reg = acb->pmuC;
1580
1581 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);
1582 schedule_work(&acb->arcmsr_do_message_isr_bh);
1583}
1584
1585static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
1586{
1587 uint32_t outbound_intstatus;
1588 struct MessageUnit_A __iomem *reg = acb->pmuA;
1589 outbound_intstatus = readl(®->outbound_intstatus) &
1590 acb->outbound_int_enable;
1591 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
1592 return 1;
1593 }
1594 writel(outbound_intstatus, ®->outbound_intstatus);
1595 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
1596 arcmsr_hba_doorbell_isr(acb);
1597 }
1598 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
1599 arcmsr_hba_postqueue_isr(acb);
1600 }
1601 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
1602
1603 arcmsr_hba_message_isr(acb);
1604 }
1605 return 0;
1606}
1607
1608static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
1609{
1610 uint32_t outbound_doorbell;
1611 struct MessageUnit_B *reg = acb->pmuB;
1612 outbound_doorbell = readl(reg->iop2drv_doorbell) &
1613 acb->outbound_int_enable;
1614 if (!outbound_doorbell)
1615 return 1;
1616
1617 writel(~outbound_doorbell, reg->iop2drv_doorbell);
1618
1619
1620 readl(reg->iop2drv_doorbell);
1621 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
1622 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
1623 arcmsr_iop2drv_data_wrote_handle(acb);
1624 }
1625 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
1626 arcmsr_iop2drv_data_read_handle(acb);
1627 }
1628 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
1629 arcmsr_hbb_postqueue_isr(acb);
1630 }
1631 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
1632
1633 arcmsr_hbb_message_isr(acb);
1634 }
1635 return 0;
1636}
1637
1638static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB)
1639{
1640 uint32_t host_interrupt_status;
1641 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
1642
1643
1644
1645
1646
1647 host_interrupt_status = readl(&phbcmu->host_int_status);
1648 if (!host_interrupt_status) {
1649
1650 return 1;
1651 }
1652
1653 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) {
1654 arcmsr_hbc_doorbell_isr(pACB);
1655 }
1656
1657 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
1658 arcmsr_hbc_postqueue_isr(pACB);
1659 }
1660 return 0;
1661}
1662static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
1663{
1664 switch (acb->adapter_type) {
1665 case ACB_ADAPTER_TYPE_A: {
1666 if (arcmsr_handle_hba_isr(acb)) {
1667 return IRQ_NONE;
1668 }
1669 }
1670 break;
1671
1672 case ACB_ADAPTER_TYPE_B: {
1673 if (arcmsr_handle_hbb_isr(acb)) {
1674 return IRQ_NONE;
1675 }
1676 }
1677 break;
1678 case ACB_ADAPTER_TYPE_C: {
1679 if (arcmsr_handle_hbc_isr(acb)) {
1680 return IRQ_NONE;
1681 }
1682 }
1683 }
1684 return IRQ_HANDLED;
1685}
1686
1687static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
1688{
1689 if (acb) {
1690
1691 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
1692 uint32_t intmask_org;
1693 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1694 intmask_org = arcmsr_disable_outbound_ints(acb);
1695 arcmsr_stop_adapter_bgrb(acb);
1696 arcmsr_flush_adapter_cache(acb);
1697 arcmsr_enable_outbound_ints(acb, intmask_org);
1698 }
1699 }
1700}
1701
1702void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
1703{
1704 int32_t wqbuf_firstindex, wqbuf_lastindex;
1705 uint8_t *pQbuffer;
1706 struct QBUFFER __iomem *pwbuffer;
1707 uint8_t __iomem *iop_data;
1708 int32_t allxfer_len = 0;
1709 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1710 iop_data = (uint8_t __iomem *)pwbuffer->data;
1711 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1712 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1713 wqbuf_firstindex = acb->wqbuf_firstindex;
1714 wqbuf_lastindex = acb->wqbuf_lastindex;
1715 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
1716 pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
1717 memcpy(iop_data, pQbuffer, 1);
1718 wqbuf_firstindex++;
1719 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1720 iop_data++;
1721 allxfer_len++;
1722 }
1723 acb->wqbuf_firstindex = wqbuf_firstindex;
1724 pwbuffer->data_len = allxfer_len;
1725 arcmsr_iop_message_wrote(acb);
1726 }
1727}
1728
1729static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
1730 struct scsi_cmnd *cmd)
1731{
1732 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
1733 int retvalue = 0, transfer_len = 0;
1734 char *buffer;
1735 struct scatterlist *sg;
1736 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
1737 (uint32_t ) cmd->cmnd[6] << 16 |
1738 (uint32_t ) cmd->cmnd[7] << 8 |
1739 (uint32_t ) cmd->cmnd[8];
1740
1741 sg = scsi_sglist(cmd);
1742 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
1743 if (scsi_sg_count(cmd) > 1) {
1744 retvalue = ARCMSR_MESSAGE_FAIL;
1745 goto message_out;
1746 }
1747 transfer_len += sg->length;
1748
1749 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
1750 retvalue = ARCMSR_MESSAGE_FAIL;
1751 goto message_out;
1752 }
1753 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
1754 switch(controlcode) {
1755
1756 case ARCMSR_MESSAGE_READ_RQBUFFER: {
1757 unsigned char *ver_addr;
1758 uint8_t *pQbuffer, *ptmpQbuffer;
1759 int32_t allxfer_len = 0;
1760
1761 ver_addr = kmalloc(1032, GFP_ATOMIC);
1762 if (!ver_addr) {
1763 retvalue = ARCMSR_MESSAGE_FAIL;
1764 goto message_out;
1765 }
1766
1767 ptmpQbuffer = ver_addr;
1768 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
1769 && (allxfer_len < 1031)) {
1770 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
1771 memcpy(ptmpQbuffer, pQbuffer, 1);
1772 acb->rqbuf_firstindex++;
1773 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1774 ptmpQbuffer++;
1775 allxfer_len++;
1776 }
1777 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1778
1779 struct QBUFFER __iomem *prbuffer;
1780 uint8_t __iomem *iop_data;
1781 int32_t iop_len;
1782
1783 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1784 prbuffer = arcmsr_get_iop_rqbuffer(acb);
1785 iop_data = prbuffer->data;
1786 iop_len = readl(&prbuffer->data_len);
1787 while (iop_len > 0) {
1788 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
1789 acb->rqbuf_lastindex++;
1790 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1791 iop_data++;
1792 iop_len--;
1793 }
1794 arcmsr_iop_message_read(acb);
1795 }
1796 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
1797 pcmdmessagefld->cmdmessage.Length = allxfer_len;
1798 if(acb->fw_flag == FW_DEADLOCK) {
1799 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1800 }else{
1801 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1802 }
1803 kfree(ver_addr);
1804 }
1805 break;
1806
1807 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
1808 unsigned char *ver_addr;
1809 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
1810 uint8_t *pQbuffer, *ptmpuserbuffer;
1811
1812 ver_addr = kmalloc(1032, GFP_ATOMIC);
1813 if (!ver_addr) {
1814 retvalue = ARCMSR_MESSAGE_FAIL;
1815 goto message_out;
1816 }
1817 if(acb->fw_flag == FW_DEADLOCK) {
1818 pcmdmessagefld->cmdmessage.ReturnCode =
1819 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1820 }else{
1821 pcmdmessagefld->cmdmessage.ReturnCode =
1822 ARCMSR_MESSAGE_RETURNCODE_OK;
1823 }
1824 ptmpuserbuffer = ver_addr;
1825 user_len = pcmdmessagefld->cmdmessage.Length;
1826 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
1827 wqbuf_lastindex = acb->wqbuf_lastindex;
1828 wqbuf_firstindex = acb->wqbuf_firstindex;
1829 if (wqbuf_lastindex != wqbuf_firstindex) {
1830 struct SENSE_DATA *sensebuffer =
1831 (struct SENSE_DATA *)cmd->sense_buffer;
1832 arcmsr_post_ioctldata2iop(acb);
1833
1834 sensebuffer->ErrorCode = 0x70;
1835 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1836 sensebuffer->AdditionalSenseLength = 0x0A;
1837 sensebuffer->AdditionalSenseCode = 0x20;
1838 sensebuffer->Valid = 1;
1839 retvalue = ARCMSR_MESSAGE_FAIL;
1840 } else {
1841 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
1842 &(ARCMSR_MAX_QBUFFER - 1);
1843 if (my_empty_len >= user_len) {
1844 while (user_len > 0) {
1845 pQbuffer =
1846 &acb->wqbuffer[acb->wqbuf_lastindex];
1847 memcpy(pQbuffer, ptmpuserbuffer, 1);
1848 acb->wqbuf_lastindex++;
1849 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1850 ptmpuserbuffer++;
1851 user_len--;
1852 }
1853 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
1854 acb->acb_flags &=
1855 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
1856 arcmsr_post_ioctldata2iop(acb);
1857 }
1858 } else {
1859
1860 struct SENSE_DATA *sensebuffer =
1861 (struct SENSE_DATA *)cmd->sense_buffer;
1862 sensebuffer->ErrorCode = 0x70;
1863 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1864 sensebuffer->AdditionalSenseLength = 0x0A;
1865 sensebuffer->AdditionalSenseCode = 0x20;
1866 sensebuffer->Valid = 1;
1867 retvalue = ARCMSR_MESSAGE_FAIL;
1868 }
1869 }
1870 kfree(ver_addr);
1871 }
1872 break;
1873
1874 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
1875 uint8_t *pQbuffer = acb->rqbuffer;
1876 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1877 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1878 arcmsr_iop_message_read(acb);
1879 }
1880 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
1881 acb->rqbuf_firstindex = 0;
1882 acb->rqbuf_lastindex = 0;
1883 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1884 if(acb->fw_flag == FW_DEADLOCK) {
1885 pcmdmessagefld->cmdmessage.ReturnCode =
1886 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1887 }else{
1888 pcmdmessagefld->cmdmessage.ReturnCode =
1889 ARCMSR_MESSAGE_RETURNCODE_OK;
1890 }
1891 }
1892 break;
1893
1894 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
1895 uint8_t *pQbuffer = acb->wqbuffer;
1896 if(acb->fw_flag == FW_DEADLOCK) {
1897 pcmdmessagefld->cmdmessage.ReturnCode =
1898 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1899 }else{
1900 pcmdmessagefld->cmdmessage.ReturnCode =
1901 ARCMSR_MESSAGE_RETURNCODE_OK;
1902 }
1903
1904 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1905 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1906 arcmsr_iop_message_read(acb);
1907 }
1908 acb->acb_flags |=
1909 (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1910 ACB_F_MESSAGE_WQBUFFER_READED);
1911 acb->wqbuf_firstindex = 0;
1912 acb->wqbuf_lastindex = 0;
1913 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1914 }
1915 break;
1916
1917 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
1918 uint8_t *pQbuffer;
1919
1920 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1921 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1922 arcmsr_iop_message_read(acb);
1923 }
1924 acb->acb_flags |=
1925 (ACB_F_MESSAGE_WQBUFFER_CLEARED
1926 | ACB_F_MESSAGE_RQBUFFER_CLEARED
1927 | ACB_F_MESSAGE_WQBUFFER_READED);
1928 acb->rqbuf_firstindex = 0;
1929 acb->rqbuf_lastindex = 0;
1930 acb->wqbuf_firstindex = 0;
1931 acb->wqbuf_lastindex = 0;
1932 pQbuffer = acb->rqbuffer;
1933 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1934 pQbuffer = acb->wqbuffer;
1935 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1936 if(acb->fw_flag == FW_DEADLOCK) {
1937 pcmdmessagefld->cmdmessage.ReturnCode =
1938 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1939 }else{
1940 pcmdmessagefld->cmdmessage.ReturnCode =
1941 ARCMSR_MESSAGE_RETURNCODE_OK;
1942 }
1943 }
1944 break;
1945
1946 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
1947 if(acb->fw_flag == FW_DEADLOCK) {
1948 pcmdmessagefld->cmdmessage.ReturnCode =
1949 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1950 }else{
1951 pcmdmessagefld->cmdmessage.ReturnCode =
1952 ARCMSR_MESSAGE_RETURNCODE_3F;
1953 }
1954 break;
1955 }
1956 case ARCMSR_MESSAGE_SAY_HELLO: {
1957 int8_t *hello_string = "Hello! I am ARCMSR";
1958 if(acb->fw_flag == FW_DEADLOCK) {
1959 pcmdmessagefld->cmdmessage.ReturnCode =
1960 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1961 }else{
1962 pcmdmessagefld->cmdmessage.ReturnCode =
1963 ARCMSR_MESSAGE_RETURNCODE_OK;
1964 }
1965 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
1966 , (int16_t)strlen(hello_string));
1967 }
1968 break;
1969
1970 case ARCMSR_MESSAGE_SAY_GOODBYE:
1971 if(acb->fw_flag == FW_DEADLOCK) {
1972 pcmdmessagefld->cmdmessage.ReturnCode =
1973 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1974 }
1975 arcmsr_iop_parking(acb);
1976 break;
1977
1978 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
1979 if(acb->fw_flag == FW_DEADLOCK) {
1980 pcmdmessagefld->cmdmessage.ReturnCode =
1981 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1982 }
1983 arcmsr_flush_adapter_cache(acb);
1984 break;
1985
1986 default:
1987 retvalue = ARCMSR_MESSAGE_FAIL;
1988 }
1989 message_out:
1990 sg = scsi_sglist(cmd);
1991 kunmap_atomic(buffer - sg->offset);
1992 return retvalue;
1993}
1994
1995static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
1996{
1997 struct list_head *head = &acb->ccb_free_list;
1998 struct CommandControlBlock *ccb = NULL;
1999 unsigned long flags;
2000 spin_lock_irqsave(&acb->ccblist_lock, flags);
2001 if (!list_empty(head)) {
2002 ccb = list_entry(head->next, struct CommandControlBlock, list);
2003 list_del_init(&ccb->list);
2004 }else{
2005 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2006 return 0;
2007 }
2008 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2009 return ccb;
2010}
2011
2012static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2013 struct scsi_cmnd *cmd)
2014{
2015 switch (cmd->cmnd[0]) {
2016 case INQUIRY: {
2017 unsigned char inqdata[36];
2018 char *buffer;
2019 struct scatterlist *sg;
2020
2021 if (cmd->device->lun) {
2022 cmd->result = (DID_TIME_OUT << 16);
2023 cmd->scsi_done(cmd);
2024 return;
2025 }
2026 inqdata[0] = TYPE_PROCESSOR;
2027
2028 inqdata[1] = 0;
2029
2030 inqdata[2] = 0;
2031
2032 inqdata[4] = 31;
2033
2034 strncpy(&inqdata[8], "Areca ", 8);
2035
2036 strncpy(&inqdata[16], "RAID controller ", 16);
2037
2038 strncpy(&inqdata[32], "R001", 4);
2039
2040 sg = scsi_sglist(cmd);
2041 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2042
2043 memcpy(buffer, inqdata, sizeof(inqdata));
2044 sg = scsi_sglist(cmd);
2045 kunmap_atomic(buffer - sg->offset);
2046
2047 cmd->scsi_done(cmd);
2048 }
2049 break;
2050 case WRITE_BUFFER:
2051 case READ_BUFFER: {
2052 if (arcmsr_iop_message_xfer(acb, cmd))
2053 cmd->result = (DID_ERROR << 16);
2054 cmd->scsi_done(cmd);
2055 }
2056 break;
2057 default:
2058 cmd->scsi_done(cmd);
2059 }
2060}
2061
2062static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
2063 void (* done)(struct scsi_cmnd *))
2064{
2065 struct Scsi_Host *host = cmd->device->host;
2066 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
2067 struct CommandControlBlock *ccb;
2068 int target = cmd->device->id;
2069 int lun = cmd->device->lun;
2070 uint8_t scsicmd = cmd->cmnd[0];
2071 cmd->scsi_done = done;
2072 cmd->host_scribble = NULL;
2073 cmd->result = 0;
2074 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){
2075 if(acb->devstate[target][lun] == ARECA_RAID_GONE) {
2076 cmd->result = (DID_NO_CONNECT << 16);
2077 }
2078 cmd->scsi_done(cmd);
2079 return 0;
2080 }
2081 if (target == 16) {
2082
2083 arcmsr_handle_virtual_command(acb, cmd);
2084 return 0;
2085 }
2086 if (atomic_read(&acb->ccboutstandingcount) >=
2087 ARCMSR_MAX_OUTSTANDING_CMD)
2088 return SCSI_MLQUEUE_HOST_BUSY;
2089 ccb = arcmsr_get_freeccb(acb);
2090 if (!ccb)
2091 return SCSI_MLQUEUE_HOST_BUSY;
2092 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
2093 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
2094 cmd->scsi_done(cmd);
2095 return 0;
2096 }
2097 arcmsr_post_ccb(acb, ccb);
2098 return 0;
2099}
2100
2101static DEF_SCSI_QCMD(arcmsr_queue_command)
2102
2103static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
2104{
2105 struct MessageUnit_A __iomem *reg = acb->pmuA;
2106 char *acb_firm_model = acb->firm_model;
2107 char *acb_firm_version = acb->firm_version;
2108 char *acb_device_map = acb->device_map;
2109 char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]);
2110 char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]);
2111 char __iomem *iop_device_map = (char __iomem *)(®->message_rwbuffer[21]);
2112 int count;
2113 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
2114 if (!arcmsr_hba_wait_msgint_ready(acb)) {
2115 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2116 miscellaneous data' timeout \n", acb->host->host_no);
2117 return false;
2118 }
2119 count = 8;
2120 while (count){
2121 *acb_firm_model = readb(iop_firm_model);
2122 acb_firm_model++;
2123 iop_firm_model++;
2124 count--;
2125 }
2126
2127 count = 16;
2128 while (count){
2129 *acb_firm_version = readb(iop_firm_version);
2130 acb_firm_version++;
2131 iop_firm_version++;
2132 count--;
2133 }
2134
2135 count=16;
2136 while(count){
2137 *acb_device_map = readb(iop_device_map);
2138 acb_device_map++;
2139 iop_device_map++;
2140 count--;
2141 }
2142 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2143 acb->host->host_no,
2144 acb->firm_version,
2145 acb->firm_model);
2146 acb->signature = readl(®->message_rwbuffer[0]);
2147 acb->firm_request_len = readl(®->message_rwbuffer[1]);
2148 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]);
2149 acb->firm_sdram_size = readl(®->message_rwbuffer[3]);
2150 acb->firm_hd_channels = readl(®->message_rwbuffer[4]);
2151 acb->firm_cfg_version = readl(®->message_rwbuffer[25]);
2152 return true;
2153}
2154static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
2155{
2156 struct MessageUnit_B *reg = acb->pmuB;
2157 struct pci_dev *pdev = acb->pdev;
2158 void *dma_coherent;
2159 dma_addr_t dma_coherent_handle;
2160 char *acb_firm_model = acb->firm_model;
2161 char *acb_firm_version = acb->firm_version;
2162 char *acb_device_map = acb->device_map;
2163 char __iomem *iop_firm_model;
2164
2165 char __iomem *iop_firm_version;
2166
2167 char __iomem *iop_device_map;
2168
2169 int count;
2170 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL);
2171 if (!dma_coherent){
2172 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no);
2173 return false;
2174 }
2175 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle;
2176 reg = (struct MessageUnit_B *)dma_coherent;
2177 acb->pmuB = reg;
2178 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL);
2179 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK);
2180 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL);
2181 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK);
2182 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER);
2183 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER);
2184 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER);
2185 iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]);
2186 iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]);
2187 iop_device_map = (char __iomem *)(®->message_rwbuffer[21]);
2188
2189 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
2190 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
2191 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2192 miscellaneous data' timeout \n", acb->host->host_no);
2193 return false;
2194 }
2195 count = 8;
2196 while (count){
2197 *acb_firm_model = readb(iop_firm_model);
2198 acb_firm_model++;
2199 iop_firm_model++;
2200 count--;
2201 }
2202 count = 16;
2203 while (count){
2204 *acb_firm_version = readb(iop_firm_version);
2205 acb_firm_version++;
2206 iop_firm_version++;
2207 count--;
2208 }
2209
2210 count = 16;
2211 while(count){
2212 *acb_device_map = readb(iop_device_map);
2213 acb_device_map++;
2214 iop_device_map++;
2215 count--;
2216 }
2217
2218 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2219 acb->host->host_no,
2220 acb->firm_version,
2221 acb->firm_model);
2222
2223 acb->signature = readl(®->message_rwbuffer[1]);
2224
2225 acb->firm_request_len = readl(®->message_rwbuffer[2]);
2226
2227 acb->firm_numbers_queue = readl(®->message_rwbuffer[3]);
2228
2229 acb->firm_sdram_size = readl(®->message_rwbuffer[4]);
2230
2231 acb->firm_hd_channels = readl(®->message_rwbuffer[5]);
2232
2233 acb->firm_cfg_version = readl(®->message_rwbuffer[25]);
2234
2235 return true;
2236}
2237
2238static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB)
2239{
2240 uint32_t intmask_org, Index, firmware_state = 0;
2241 struct MessageUnit_C *reg = pACB->pmuC;
2242 char *acb_firm_model = pACB->firm_model;
2243 char *acb_firm_version = pACB->firm_version;
2244 char *iop_firm_model = (char *)(®->msgcode_rwbuffer[15]);
2245 char *iop_firm_version = (char *)(®->msgcode_rwbuffer[17]);
2246 int count;
2247
2248 intmask_org = readl(®->host_int_mask);
2249 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask);
2250
2251 do {
2252 firmware_state = readl(®->outbound_msgaddr1);
2253 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2254
2255 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
2256 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
2257
2258 for (Index = 0; Index < 2000; Index++) {
2259 if (readl(®->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
2260 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);
2261 break;
2262 }
2263 udelay(10);
2264 }
2265 if (Index >= 2000) {
2266 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2267 miscellaneous data' timeout \n", pACB->host->host_no);
2268 return false;
2269 }
2270 count = 8;
2271 while (count) {
2272 *acb_firm_model = readb(iop_firm_model);
2273 acb_firm_model++;
2274 iop_firm_model++;
2275 count--;
2276 }
2277 count = 16;
2278 while (count) {
2279 *acb_firm_version = readb(iop_firm_version);
2280 acb_firm_version++;
2281 iop_firm_version++;
2282 count--;
2283 }
2284 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2285 pACB->host->host_no,
2286 pACB->firm_version,
2287 pACB->firm_model);
2288 pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]);
2289 pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]);
2290 pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]);
2291 pACB->firm_hd_channels = readl(®->msgcode_rwbuffer[4]);
2292 pACB->firm_cfg_version = readl(®->msgcode_rwbuffer[25]);
2293
2294 return true;
2295}
2296static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
2297{
2298 if (acb->adapter_type == ACB_ADAPTER_TYPE_A)
2299 return arcmsr_get_hba_config(acb);
2300 else if (acb->adapter_type == ACB_ADAPTER_TYPE_B)
2301 return arcmsr_get_hbb_config(acb);
2302 else
2303 return arcmsr_get_hbc_config(acb);
2304}
2305
2306static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
2307 struct CommandControlBlock *poll_ccb)
2308{
2309 struct MessageUnit_A __iomem *reg = acb->pmuA;
2310 struct CommandControlBlock *ccb;
2311 struct ARCMSR_CDB *arcmsr_cdb;
2312 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
2313 int rtn;
2314 bool error;
2315 polling_hba_ccb_retry:
2316 poll_count++;
2317 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable;
2318 writel(outbound_intstatus, ®->outbound_intstatus);
2319 while (1) {
2320 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) {
2321 if (poll_ccb_done){
2322 rtn = SUCCESS;
2323 break;
2324 }else {
2325 msleep(25);
2326 if (poll_count > 100){
2327 rtn = FAILED;
2328 break;
2329 }
2330 goto polling_hba_ccb_retry;
2331 }
2332 }
2333 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2334 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2335 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2336 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2337 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2338 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2339 " poll command abort successfully \n"
2340 , acb->host->host_no
2341 , ccb->pcmd->device->id
2342 , ccb->pcmd->device->lun
2343 , ccb);
2344 ccb->pcmd->result = DID_ABORT << 16;
2345 arcmsr_ccb_complete(ccb);
2346 continue;
2347 }
2348 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2349 " command done ccb = '0x%p'"
2350 "ccboutstandingcount = %d \n"
2351 , acb->host->host_no
2352 , ccb
2353 , atomic_read(&acb->ccboutstandingcount));
2354 continue;
2355 }
2356 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2357 arcmsr_report_ccb_state(acb, ccb, error);
2358 }
2359 return rtn;
2360}
2361
2362static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
2363 struct CommandControlBlock *poll_ccb)
2364{
2365 struct MessageUnit_B *reg = acb->pmuB;
2366 struct ARCMSR_CDB *arcmsr_cdb;
2367 struct CommandControlBlock *ccb;
2368 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
2369 int index, rtn;
2370 bool error;
2371 polling_hbb_ccb_retry:
2372
2373 poll_count++;
2374
2375 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2376 while(1){
2377 index = reg->doneq_index;
2378 if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) {
2379 if (poll_ccb_done){
2380 rtn = SUCCESS;
2381 break;
2382 }else {
2383 msleep(25);
2384 if (poll_count > 100){
2385 rtn = FAILED;
2386 break;
2387 }
2388 goto polling_hbb_ccb_retry;
2389 }
2390 }
2391 writel(0, ®->done_qbuffer[index]);
2392 index++;
2393
2394 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2395 reg->doneq_index = index;
2396
2397 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2398 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2399 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2400 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2401 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2402 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2403 " poll command abort successfully \n"
2404 ,acb->host->host_no
2405 ,ccb->pcmd->device->id
2406 ,ccb->pcmd->device->lun
2407 ,ccb);
2408 ccb->pcmd->result = DID_ABORT << 16;
2409 arcmsr_ccb_complete(ccb);
2410 continue;
2411 }
2412 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2413 " command done ccb = '0x%p'"
2414 "ccboutstandingcount = %d \n"
2415 , acb->host->host_no
2416 , ccb
2417 , atomic_read(&acb->ccboutstandingcount));
2418 continue;
2419 }
2420 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2421 arcmsr_report_ccb_state(acb, ccb, error);
2422 }
2423 return rtn;
2424}
2425
2426static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb)
2427{
2428 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2429 uint32_t flag_ccb, ccb_cdb_phy;
2430 struct ARCMSR_CDB *arcmsr_cdb;
2431 bool error;
2432 struct CommandControlBlock *pCCB;
2433 uint32_t poll_ccb_done = 0, poll_count = 0;
2434 int rtn;
2435polling_hbc_ccb_retry:
2436 poll_count++;
2437 while (1) {
2438 if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
2439 if (poll_ccb_done) {
2440 rtn = SUCCESS;
2441 break;
2442 } else {
2443 msleep(25);
2444 if (poll_count > 100) {
2445 rtn = FAILED;
2446 break;
2447 }
2448 goto polling_hbc_ccb_retry;
2449 }
2450 }
2451 flag_ccb = readl(®->outbound_queueport_low);
2452 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2453 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
2454 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2455 poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0;
2456
2457 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
2458 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
2459 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2460 " poll command abort successfully \n"
2461 , acb->host->host_no
2462 , pCCB->pcmd->device->id
2463 , pCCB->pcmd->device->lun
2464 , pCCB);
2465 pCCB->pcmd->result = DID_ABORT << 16;
2466 arcmsr_ccb_complete(pCCB);
2467 continue;
2468 }
2469 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2470 " command done ccb = '0x%p'"
2471 "ccboutstandingcount = %d \n"
2472 , acb->host->host_no
2473 , pCCB
2474 , atomic_read(&acb->ccboutstandingcount));
2475 continue;
2476 }
2477 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2478 arcmsr_report_ccb_state(acb, pCCB, error);
2479 }
2480 return rtn;
2481}
2482static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
2483 struct CommandControlBlock *poll_ccb)
2484{
2485 int rtn = 0;
2486 switch (acb->adapter_type) {
2487
2488 case ACB_ADAPTER_TYPE_A: {
2489 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb);
2490 }
2491 break;
2492
2493 case ACB_ADAPTER_TYPE_B: {
2494 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb);
2495 }
2496 break;
2497 case ACB_ADAPTER_TYPE_C: {
2498 rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb);
2499 }
2500 }
2501 return rtn;
2502}
2503
2504static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
2505{
2506 uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
2507 dma_addr_t dma_coherent_handle;
2508
2509
2510
2511
2512
2513
2514 dma_coherent_handle = acb->dma_coherent_handle;
2515 cdb_phyaddr = (uint32_t)(dma_coherent_handle);
2516 cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16);
2517 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
2518
2519
2520
2521
2522
2523 switch (acb->adapter_type) {
2524
2525 case ACB_ADAPTER_TYPE_A: {
2526 if (cdb_phyaddr_hi32 != 0) {
2527 struct MessageUnit_A __iomem *reg = acb->pmuA;
2528 uint32_t intmask_org;
2529 intmask_org = arcmsr_disable_outbound_ints(acb);
2530 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
2531 ®->message_rwbuffer[0]);
2532 writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]);
2533 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
2534 ®->inbound_msgaddr0);
2535 if (!arcmsr_hba_wait_msgint_ready(acb)) {
2536 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
2537 part physical address timeout\n",
2538 acb->host->host_no);
2539 return 1;
2540 }
2541 arcmsr_enable_outbound_ints(acb, intmask_org);
2542 }
2543 }
2544 break;
2545
2546 case ACB_ADAPTER_TYPE_B: {
2547 unsigned long post_queue_phyaddr;
2548 uint32_t __iomem *rwbuffer;
2549
2550 struct MessageUnit_B *reg = acb->pmuB;
2551 uint32_t intmask_org;
2552 intmask_org = arcmsr_disable_outbound_ints(acb);
2553 reg->postq_index = 0;
2554 reg->doneq_index = 0;
2555 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
2556 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
2557 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
2558 acb->host->host_no);
2559 return 1;
2560 }
2561 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu;
2562 rwbuffer = reg->message_rwbuffer;
2563
2564 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
2565
2566 writel(cdb_phyaddr_hi32, rwbuffer++);
2567
2568 writel(post_queue_phyaddr, rwbuffer++);
2569
2570 writel(post_queue_phyaddr + 1056, rwbuffer++);
2571
2572 writel(1056, rwbuffer);
2573
2574 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
2575 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
2576 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2577 timeout \n",acb->host->host_no);
2578 return 1;
2579 }
2580 arcmsr_hbb_enable_driver_mode(acb);
2581 arcmsr_enable_outbound_ints(acb, intmask_org);
2582 }
2583 break;
2584 case ACB_ADAPTER_TYPE_C: {
2585 if (cdb_phyaddr_hi32 != 0) {
2586 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2587
2588 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
2589 acb->adapter_index, cdb_phyaddr_hi32);
2590 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]);
2591 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]);
2592 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0);
2593 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
2594 if (!arcmsr_hbc_wait_msgint_ready(acb)) {
2595 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2596 timeout \n", acb->host->host_no);
2597 return 1;
2598 }
2599 }
2600 }
2601 }
2602 return 0;
2603}
2604
2605static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2606{
2607 uint32_t firmware_state = 0;
2608 switch (acb->adapter_type) {
2609
2610 case ACB_ADAPTER_TYPE_A: {
2611 struct MessageUnit_A __iomem *reg = acb->pmuA;
2612 do {
2613 firmware_state = readl(®->outbound_msgaddr1);
2614 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
2615 }
2616 break;
2617
2618 case ACB_ADAPTER_TYPE_B: {
2619 struct MessageUnit_B *reg = acb->pmuB;
2620 do {
2621 firmware_state = readl(reg->iop2drv_doorbell);
2622 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
2623 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2624 }
2625 break;
2626 case ACB_ADAPTER_TYPE_C: {
2627 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2628 do {
2629 firmware_state = readl(®->outbound_msgaddr1);
2630 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2631 }
2632 }
2633}
2634
2635static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb)
2636{
2637 struct MessageUnit_A __iomem *reg = acb->pmuA;
2638 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
2639 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2640 return;
2641 } else {
2642 acb->fw_flag = FW_NORMAL;
2643 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){
2644 atomic_set(&acb->rq_map_token, 16);
2645 }
2646 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
2647 if (atomic_dec_and_test(&acb->rq_map_token)) {
2648 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2649 return;
2650 }
2651 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
2652 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2653 }
2654 return;
2655}
2656
2657static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb)
2658{
2659 struct MessageUnit_B __iomem *reg = acb->pmuB;
2660 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
2661 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2662 return;
2663 } else {
2664 acb->fw_flag = FW_NORMAL;
2665 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
2666 atomic_set(&acb->rq_map_token, 16);
2667 }
2668 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
2669 if (atomic_dec_and_test(&acb->rq_map_token)) {
2670 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2671 return;
2672 }
2673 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
2674 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2675 }
2676 return;
2677}
2678
2679static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb)
2680{
2681 struct MessageUnit_C __iomem *reg = acb->pmuC;
2682 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
2683 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2684 return;
2685 } else {
2686 acb->fw_flag = FW_NORMAL;
2687 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
2688 atomic_set(&acb->rq_map_token, 16);
2689 }
2690 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
2691 if (atomic_dec_and_test(&acb->rq_map_token)) {
2692 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2693 return;
2694 }
2695 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
2696 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
2697 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2698 }
2699 return;
2700}
2701
2702static void arcmsr_request_device_map(unsigned long pacb)
2703{
2704 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb;
2705 switch (acb->adapter_type) {
2706 case ACB_ADAPTER_TYPE_A: {
2707 arcmsr_request_hba_device_map(acb);
2708 }
2709 break;
2710 case ACB_ADAPTER_TYPE_B: {
2711 arcmsr_request_hbb_device_map(acb);
2712 }
2713 break;
2714 case ACB_ADAPTER_TYPE_C: {
2715 arcmsr_request_hbc_device_map(acb);
2716 }
2717 }
2718}
2719
2720static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2721{
2722 struct MessageUnit_A __iomem *reg = acb->pmuA;
2723 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2724 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0);
2725 if (!arcmsr_hba_wait_msgint_ready(acb)) {
2726 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2727 rebulid' timeout \n", acb->host->host_no);
2728 }
2729}
2730
2731static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2732{
2733 struct MessageUnit_B *reg = acb->pmuB;
2734 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2735 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
2736 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
2737 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2738 rebulid' timeout \n",acb->host->host_no);
2739 }
2740}
2741
2742static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB)
2743{
2744 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
2745 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
2746 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
2747 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
2748 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
2749 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2750 rebulid' timeout \n", pACB->host->host_no);
2751 }
2752 return;
2753}
2754static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
2755{
2756 switch (acb->adapter_type) {
2757 case ACB_ADAPTER_TYPE_A:
2758 arcmsr_start_hba_bgrb(acb);
2759 break;
2760 case ACB_ADAPTER_TYPE_B:
2761 arcmsr_start_hbb_bgrb(acb);
2762 break;
2763 case ACB_ADAPTER_TYPE_C:
2764 arcmsr_start_hbc_bgrb(acb);
2765 }
2766}
2767
2768static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
2769{
2770 switch (acb->adapter_type) {
2771 case ACB_ADAPTER_TYPE_A: {
2772 struct MessageUnit_A __iomem *reg = acb->pmuA;
2773 uint32_t outbound_doorbell;
2774
2775 outbound_doorbell = readl(®->outbound_doorbell);
2776
2777 writel(outbound_doorbell, ®->outbound_doorbell);
2778 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell);
2779 }
2780 break;
2781
2782 case ACB_ADAPTER_TYPE_B: {
2783 struct MessageUnit_B *reg = acb->pmuB;
2784
2785 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2786 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
2787
2788 }
2789 break;
2790 case ACB_ADAPTER_TYPE_C: {
2791 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2792 uint32_t outbound_doorbell;
2793
2794 outbound_doorbell = readl(®->outbound_doorbell);
2795 writel(outbound_doorbell, ®->outbound_doorbell_clear);
2796 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell);
2797 }
2798 }
2799}
2800
2801static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
2802{
2803 switch (acb->adapter_type) {
2804 case ACB_ADAPTER_TYPE_A:
2805 return;
2806 case ACB_ADAPTER_TYPE_B:
2807 {
2808 struct MessageUnit_B *reg = acb->pmuB;
2809 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
2810 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
2811 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
2812 return;
2813 }
2814 }
2815 break;
2816 case ACB_ADAPTER_TYPE_C:
2817 return;
2818 }
2819 return;
2820}
2821
2822static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
2823{
2824 uint8_t value[64];
2825 int i, count = 0;
2826 struct MessageUnit_A __iomem *pmuA = acb->pmuA;
2827 struct MessageUnit_C __iomem *pmuC = acb->pmuC;
2828
2829
2830 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
2831 for (i = 0; i < 64; i++) {
2832 pci_read_config_byte(acb->pdev, i, &value[i]);
2833 }
2834
2835 if ((acb->dev_id == 0x1680)) {
2836 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
2837 } else if ((acb->dev_id == 0x1880)) {
2838 do {
2839 count++;
2840 writel(0xF, &pmuC->write_sequence);
2841 writel(0x4, &pmuC->write_sequence);
2842 writel(0xB, &pmuC->write_sequence);
2843 writel(0x2, &pmuC->write_sequence);
2844 writel(0x7, &pmuC->write_sequence);
2845 writel(0xD, &pmuC->write_sequence);
2846 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
2847 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
2848 } else {
2849 pci_write_config_byte(acb->pdev, 0x84, 0x20);
2850 }
2851 msleep(2000);
2852
2853 for (i = 0; i < 64; i++) {
2854 pci_write_config_byte(acb->pdev, i, value[i]);
2855 }
2856 msleep(1000);
2857 return;
2858}
2859static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2860{
2861 uint32_t intmask_org;
2862
2863 intmask_org = arcmsr_disable_outbound_ints(acb);
2864 arcmsr_wait_firmware_ready(acb);
2865 arcmsr_iop_confirm(acb);
2866
2867 arcmsr_start_adapter_bgrb(acb);
2868
2869 arcmsr_clear_doorbell_queue_buffer(acb);
2870 arcmsr_enable_eoi_mode(acb);
2871
2872 arcmsr_enable_outbound_ints(acb, intmask_org);
2873 acb->acb_flags |= ACB_F_IOP_INITED;
2874}
2875
2876static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
2877{
2878 struct CommandControlBlock *ccb;
2879 uint32_t intmask_org;
2880 uint8_t rtnval = 0x00;
2881 int i = 0;
2882 unsigned long flags;
2883
2884 if (atomic_read(&acb->ccboutstandingcount) != 0) {
2885
2886 intmask_org = arcmsr_disable_outbound_ints(acb);
2887
2888 rtnval = arcmsr_abort_allcmd(acb);
2889
2890 arcmsr_done4abort_postqueue(acb);
2891 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2892 ccb = acb->pccb_pool[i];
2893 if (ccb->startdone == ARCMSR_CCB_START) {
2894 scsi_dma_unmap(ccb->pcmd);
2895 ccb->startdone = ARCMSR_CCB_DONE;
2896 ccb->ccb_flags = 0;
2897 spin_lock_irqsave(&acb->ccblist_lock, flags);
2898 list_add_tail(&ccb->list, &acb->ccb_free_list);
2899 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2900 }
2901 }
2902 atomic_set(&acb->ccboutstandingcount, 0);
2903
2904 arcmsr_enable_outbound_ints(acb, intmask_org);
2905 return rtnval;
2906 }
2907 return rtnval;
2908}
2909
2910static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
2911{
2912 struct AdapterControlBlock *acb;
2913 uint32_t intmask_org, outbound_doorbell;
2914 int retry_count = 0;
2915 int rtn = FAILED;
2916 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
2917 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts);
2918 acb->num_resets++;
2919
2920 switch(acb->adapter_type){
2921 case ACB_ADAPTER_TYPE_A:{
2922 if (acb->acb_flags & ACB_F_BUS_RESET){
2923 long timeout;
2924 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
2925 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
2926 if (timeout) {
2927 return SUCCESS;
2928 }
2929 }
2930 acb->acb_flags |= ACB_F_BUS_RESET;
2931 if (!arcmsr_iop_reset(acb)) {
2932 struct MessageUnit_A __iomem *reg;
2933 reg = acb->pmuA;
2934 arcmsr_hardware_reset(acb);
2935 acb->acb_flags &= ~ACB_F_IOP_INITED;
2936sleep_again:
2937 ssleep(ARCMSR_SLEEPTIME);
2938 if ((readl(®->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) {
2939 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
2940 if (retry_count > ARCMSR_RETRYCOUNT) {
2941 acb->fw_flag = FW_DEADLOCK;
2942 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
2943 return FAILED;
2944 }
2945 retry_count++;
2946 goto sleep_again;
2947 }
2948 acb->acb_flags |= ACB_F_IOP_INITED;
2949
2950 intmask_org = arcmsr_disable_outbound_ints(acb);
2951 arcmsr_get_firmware_spec(acb);
2952 arcmsr_start_adapter_bgrb(acb);
2953
2954 outbound_doorbell = readl(®->outbound_doorbell);
2955 writel(outbound_doorbell, ®->outbound_doorbell);
2956 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell);
2957
2958 arcmsr_enable_outbound_ints(acb, intmask_org);
2959 atomic_set(&acb->rq_map_token, 16);
2960 atomic_set(&acb->ante_token_value, 16);
2961 acb->fw_flag = FW_NORMAL;
2962 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2963 acb->acb_flags &= ~ACB_F_BUS_RESET;
2964 rtn = SUCCESS;
2965 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
2966 } else {
2967 acb->acb_flags &= ~ACB_F_BUS_RESET;
2968 atomic_set(&acb->rq_map_token, 16);
2969 atomic_set(&acb->ante_token_value, 16);
2970 acb->fw_flag = FW_NORMAL;
2971 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
2972 rtn = SUCCESS;
2973 }
2974 break;
2975 }
2976 case ACB_ADAPTER_TYPE_B:{
2977 acb->acb_flags |= ACB_F_BUS_RESET;
2978 if (!arcmsr_iop_reset(acb)) {
2979 acb->acb_flags &= ~ACB_F_BUS_RESET;
2980 rtn = FAILED;
2981 } else {
2982 acb->acb_flags &= ~ACB_F_BUS_RESET;
2983 atomic_set(&acb->rq_map_token, 16);
2984 atomic_set(&acb->ante_token_value, 16);
2985 acb->fw_flag = FW_NORMAL;
2986 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2987 rtn = SUCCESS;
2988 }
2989 break;
2990 }
2991 case ACB_ADAPTER_TYPE_C:{
2992 if (acb->acb_flags & ACB_F_BUS_RESET) {
2993 long timeout;
2994 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
2995 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
2996 if (timeout) {
2997 return SUCCESS;
2998 }
2999 }
3000 acb->acb_flags |= ACB_F_BUS_RESET;
3001 if (!arcmsr_iop_reset(acb)) {
3002 struct MessageUnit_C __iomem *reg;
3003 reg = acb->pmuC;
3004 arcmsr_hardware_reset(acb);
3005 acb->acb_flags &= ~ACB_F_IOP_INITED;
3006sleep:
3007 ssleep(ARCMSR_SLEEPTIME);
3008 if ((readl(®->host_diagnostic) & 0x04) != 0) {
3009 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
3010 if (retry_count > ARCMSR_RETRYCOUNT) {
3011 acb->fw_flag = FW_DEADLOCK;
3012 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
3013 return FAILED;
3014 }
3015 retry_count++;
3016 goto sleep;
3017 }
3018 acb->acb_flags |= ACB_F_IOP_INITED;
3019
3020 intmask_org = arcmsr_disable_outbound_ints(acb);
3021 arcmsr_get_firmware_spec(acb);
3022 arcmsr_start_adapter_bgrb(acb);
3023
3024 outbound_doorbell = readl(®->outbound_doorbell);
3025 writel(outbound_doorbell, ®->outbound_doorbell_clear);
3026 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell);
3027
3028 arcmsr_enable_outbound_ints(acb, intmask_org);
3029 atomic_set(&acb->rq_map_token, 16);
3030 atomic_set(&acb->ante_token_value, 16);
3031 acb->fw_flag = FW_NORMAL;
3032 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3033 acb->acb_flags &= ~ACB_F_BUS_RESET;
3034 rtn = SUCCESS;
3035 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
3036 } else {
3037 acb->acb_flags &= ~ACB_F_BUS_RESET;
3038 atomic_set(&acb->rq_map_token, 16);
3039 atomic_set(&acb->ante_token_value, 16);
3040 acb->fw_flag = FW_NORMAL;
3041 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
3042 rtn = SUCCESS;
3043 }
3044 break;
3045 }
3046 }
3047 return rtn;
3048}
3049
3050static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
3051 struct CommandControlBlock *ccb)
3052{
3053 int rtn;
3054 rtn = arcmsr_polling_ccbdone(acb, ccb);
3055 return rtn;
3056}
3057
3058static int arcmsr_abort(struct scsi_cmnd *cmd)
3059{
3060 struct AdapterControlBlock *acb =
3061 (struct AdapterControlBlock *)cmd->device->host->hostdata;
3062 int i = 0;
3063 int rtn = FAILED;
3064 printk(KERN_NOTICE
3065 "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
3066 acb->host->host_no, cmd->device->id, cmd->device->lun);
3067 acb->acb_flags |= ACB_F_ABORT;
3068 acb->num_aborts++;
3069
3070
3071
3072
3073
3074
3075 if (!atomic_read(&acb->ccboutstandingcount))
3076 return rtn;
3077
3078 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3079 struct CommandControlBlock *ccb = acb->pccb_pool[i];
3080 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
3081 ccb->startdone = ARCMSR_CCB_ABORTED;
3082 rtn = arcmsr_abort_one_cmd(acb, ccb);
3083 break;
3084 }
3085 }
3086 acb->acb_flags &= ~ACB_F_ABORT;
3087 return rtn;
3088}
3089
3090static const char *arcmsr_info(struct Scsi_Host *host)
3091{
3092 struct AdapterControlBlock *acb =
3093 (struct AdapterControlBlock *) host->hostdata;
3094 static char buf[256];
3095 char *type;
3096 int raid6 = 1;
3097 switch (acb->pdev->device) {
3098 case PCI_DEVICE_ID_ARECA_1110:
3099 case PCI_DEVICE_ID_ARECA_1200:
3100 case PCI_DEVICE_ID_ARECA_1202:
3101 case PCI_DEVICE_ID_ARECA_1210:
3102 raid6 = 0;
3103
3104 case PCI_DEVICE_ID_ARECA_1120:
3105 case PCI_DEVICE_ID_ARECA_1130:
3106 case PCI_DEVICE_ID_ARECA_1160:
3107 case PCI_DEVICE_ID_ARECA_1170:
3108 case PCI_DEVICE_ID_ARECA_1201:
3109 case PCI_DEVICE_ID_ARECA_1220:
3110 case PCI_DEVICE_ID_ARECA_1230:
3111 case PCI_DEVICE_ID_ARECA_1260:
3112 case PCI_DEVICE_ID_ARECA_1270:
3113 case PCI_DEVICE_ID_ARECA_1280:
3114 type = "SATA";
3115 break;
3116 case PCI_DEVICE_ID_ARECA_1380:
3117 case PCI_DEVICE_ID_ARECA_1381:
3118 case PCI_DEVICE_ID_ARECA_1680:
3119 case PCI_DEVICE_ID_ARECA_1681:
3120 case PCI_DEVICE_ID_ARECA_1880:
3121 type = "SAS";
3122 break;
3123 default:
3124 type = "X-TYPE";
3125 break;
3126 }
3127 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
3128 type, raid6 ? "( RAID6 capable)" : "",
3129 ARCMSR_DRIVER_VERSION);
3130 return buf;
3131}
3132
