LXR linux/include/uapi/rdma/qedr-abi.h

   1/* QLogic qedr NIC Driver
   2 * Copyright (c) 2015-2016  QLogic Corporation
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and /or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 */
  32#ifndef __QEDR_USER_H__
  33#define __QEDR_USER_H__
  34
  35#include <linux/types.h>
  36
  37#define QEDR_ABI_VERSION                (8)
  38
  39/* user kernel communication data structures. */
  40
  41struct qedr_alloc_ucontext_resp {
  42        __aligned_u64 db_pa;
  43        __u32 db_size;
  44
  45        __u32 max_send_wr;
  46        __u32 max_recv_wr;
  47        __u32 max_srq_wr;
  48        __u32 sges_per_send_wr;
  49        __u32 sges_per_recv_wr;
  50        __u32 sges_per_srq_wr;
  51        __u32 max_cqes;
  52        __u8 dpm_enabled;
  53        __u8 wids_enabled;
  54        __u16 wid_count;
  55        __u32 reserved;
  56};
  57
  58struct qedr_alloc_pd_ureq {
  59        __aligned_u64 rsvd1;
  60};
  61
  62struct qedr_alloc_pd_uresp {
  63        __u32 pd_id;
  64        __u32 reserved;
  65};
  66
  67struct qedr_create_cq_ureq {
  68        __aligned_u64 addr;
  69        __aligned_u64 len;
  70};
  71
  72struct qedr_create_cq_uresp {
  73        __u32 db_offset;
  74        __u16 icid;
  75        __u16 reserved;
  76};
  77
  78struct qedr_create_qp_ureq {
  79        __u32 qp_handle_hi;
  80        __u32 qp_handle_lo;
  81
  82        /* SQ */
  83        /* user space virtual address of SQ buffer */
  84        __aligned_u64 sq_addr;
  85
  86        /* length of SQ buffer */
  87        __aligned_u64 sq_len;
  88
  89        /* RQ */
  90        /* user space virtual address of RQ buffer */
  91        __aligned_u64 rq_addr;
  92
  93        /* length of RQ buffer */
  94        __aligned_u64 rq_len;
  95};
  96
  97struct qedr_create_qp_uresp {
  98        __u32 qp_id;
  99        __u32 atomic_supported;
 100
 101        /* SQ */
 102        __u32 sq_db_offset;
 103        __u16 sq_icid;
 104
 105        /* RQ */
 106        __u32 rq_db_offset;
 107        __u16 rq_icid;
 108
 109        __u32 rq_db2_offset;
 110        __u32 reserved;
 111};
 112
 113struct qedr_create_srq_ureq {
 114        /* user space virtual address of producer pair */
 115        __aligned_u64 prod_pair_addr;
 116
 117        /* user space virtual address of SRQ buffer */
 118        __aligned_u64 srq_addr;
 119
 120        /* length of SRQ buffer */
 121        __aligned_u64 srq_len;
 122};
 123
 124struct qedr_create_srq_uresp {
 125        __u16 srq_id;
 126        __u16 reserved0;
 127        __u32 reserved1;
 128};
 129
 130#endif /* __QEDR_USER_H__ */
 131