LXR linux/sound/pci/oxygen/oxygen

   1/*
   2 * C-Media CMI8788 driver - helper functions
   3 *
   4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5 *
   6 *
   7 *  This driver is free software; you can redistribute it and/or modify
   8 *  it under the terms of the GNU General Public License, version 2.
   9 *
  10 *  This driver is distributed in the hope that it will be useful,
  11 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 *  GNU General Public License for more details.
  14 *
  15 *  You should have received a copy of the GNU General Public License
  16 *  along with this driver; if not, write to the Free Software
  17 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18 */
  19
  20#include <linux/delay.h>
  21#include <linux/sched.h>
  22#include <linux/export.h>
  23#include <linux/io.h>
  24#include <sound/core.h>
  25#include <sound/mpu401.h>
  26#include "oxygen.h"
  27
  28u8 oxygen_read8(struct oxygen *chip, unsigned int reg)
  29{
  30        return inb(chip->addr + reg);
  31}
  32EXPORT_SYMBOL(oxygen_read8);
  33
  34u16 oxygen_read16(struct oxygen *chip, unsigned int reg)
  35{
  36        return inw(chip->addr + reg);
  37}
  38EXPORT_SYMBOL(oxygen_read16);
  39
  40u32 oxygen_read32(struct oxygen *chip, unsigned int reg)
  41{
  42        return inl(chip->addr + reg);
  43}
  44EXPORT_SYMBOL(oxygen_read32);
  45
  46void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value)
  47{
  48        outb(value, chip->addr + reg);
  49        chip->saved_registers._8[reg] = value;
  50}
  51EXPORT_SYMBOL(oxygen_write8);
  52
  53void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value)
  54{
  55        outw(value, chip->addr + reg);
  56        chip->saved_registers._16[reg / 2] = cpu_to_le16(value);
  57}
  58EXPORT_SYMBOL(oxygen_write16);
  59
  60void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value)
  61{
  62        outl(value, chip->addr + reg);
  63        chip->saved_registers._32[reg / 4] = cpu_to_le32(value);
  64}
  65EXPORT_SYMBOL(oxygen_write32);
  66
  67void oxygen_write8_masked(struct oxygen *chip, unsigned int reg,
  68                          u8 value, u8 mask)
  69{
  70        u8 tmp = inb(chip->addr + reg);
  71        tmp &= ~mask;
  72        tmp |= value & mask;
  73        outb(tmp, chip->addr + reg);
  74        chip->saved_registers._8[reg] = tmp;
  75}
  76EXPORT_SYMBOL(oxygen_write8_masked);
  77
  78void oxygen_write16_masked(struct oxygen *chip, unsigned int reg,
  79                           u16 value, u16 mask)
  80{
  81        u16 tmp = inw(chip->addr + reg);
  82        tmp &= ~mask;
  83        tmp |= value & mask;
  84        outw(tmp, chip->addr + reg);
  85        chip->saved_registers._16[reg / 2] = cpu_to_le16(tmp);
  86}
  87EXPORT_SYMBOL(oxygen_write16_masked);
  88
  89void oxygen_write32_masked(struct oxygen *chip, unsigned int reg,
  90                           u32 value, u32 mask)
  91{
  92        u32 tmp = inl(chip->addr + reg);
  93        tmp &= ~mask;
  94        tmp |= value & mask;
  95        outl(tmp, chip->addr + reg);
  96        chip->saved_registers._32[reg / 4] = cpu_to_le32(tmp);
  97}
  98EXPORT_SYMBOL(oxygen_write32_masked);
  99
 100static int oxygen_ac97_wait(struct oxygen *chip, unsigned int mask)
 101{
 102        u8 status = 0;
 103
 104        /*
 105         * Reading the status register also clears the bits, so we have to save
 106         * the read bits in status.
 107         */
 108        wait_event_timeout(chip->ac97_waitqueue,
 109                           ({ status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS);
 110                              status & mask; }),
 111                           msecs_to_jiffies(1) + 1);
 112        /*
 113         * Check even after a timeout because this function should not require
 114         * the AC'97 interrupt to be enabled.
 115         */
 116        status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS);
 117        return status & mask ? 0 : -EIO;
 118}
 119
 120/*
 121 * About 10% of AC'97 register reads or writes fail to complete, but even those
 122 * where the controller indicates completion aren't guaranteed to have actually
 123 * happened.
 124 *
 125 * It's hard to assign blame to either the controller or the codec because both
 126 * were made by C-Media ...
 127 */
 128
 129void oxygen_write_ac97(struct oxygen *chip, unsigned int codec,
 130                       unsigned int index, u16 data)
 131{
 132        unsigned int count, succeeded;
 133        u32 reg;
 134
 135        reg = data;
 136        reg |= index << OXYGEN_AC97_REG_ADDR_SHIFT;
 137        reg |= OXYGEN_AC97_REG_DIR_WRITE;
 138        reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
 139        succeeded = 0;
 140        for (count = 5; count > 0; --count) {
 141                udelay(5);
 142                oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
 143                /* require two "completed" writes, just to be sure */
 144                if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_WRITE_DONE) >= 0 &&
 145                    ++succeeded >= 2) {
 146                        chip->saved_ac97_registers[codec][index / 2] = data;
 147                        return;
 148                }
 149        }
 150        dev_err(chip->card->dev, "AC'97 write timeout\n");
 151}
 152EXPORT_SYMBOL(oxygen_write_ac97);
 153
 154u16 oxygen_read_ac97(struct oxygen *chip, unsigned int codec,
 155                     unsigned int index)
 156{
 157        unsigned int count;
 158        unsigned int last_read = UINT_MAX;
 159        u32 reg;
 160
 161        reg = index << OXYGEN_AC97_REG_ADDR_SHIFT;
 162        reg |= OXYGEN_AC97_REG_DIR_READ;
 163        reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
 164        for (count = 5; count > 0; --count) {
 165                udelay(5);
 166                oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
 167                udelay(10);
 168                if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_READ_DONE) >= 0) {
 169                        u16 value = oxygen_read16(chip, OXYGEN_AC97_REGS);
 170                        /* we require two consecutive reads of the same value */
 171                        if (value == last_read)
 172                                return value;
 173                        last_read = value;
 174                        /*
 175                         * Invert the register value bits to make sure that two
 176                         * consecutive unsuccessful reads do not return the same
 177                         * value.
 178                         */
 179                        reg ^= 0xffff;
 180                }
 181        }
 182        dev_err(chip->card->dev, "AC'97 read timeout on codec %u\n", codec);
 183        return 0;
 184}
 185EXPORT_SYMBOL(oxygen_read_ac97);
 186
 187void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec,
 188                              unsigned int index, u16 data, u16 mask)
 189{
 190        u16 value = oxygen_read_ac97(chip, codec, index);
 191        value &= ~mask;
 192        value |= data & mask;
 193        oxygen_write_ac97(chip, codec, index, value);
 194}
 195EXPORT_SYMBOL(oxygen_write_ac97_masked);
 196
 197static int oxygen_wait_spi(struct oxygen *chip)
 198{
 199        unsigned int count;
 200
 201        /*
 202         * Higher timeout to be sure: 200 us;
 203         * actual transaction should not need more than 40 us.
 204         */
 205        for (count = 50; count > 0; count--) {
 206                udelay(4);
 207                if ((oxygen_read8(chip, OXYGEN_SPI_CONTROL) &
 208                                                OXYGEN_SPI_BUSY) == 0)
 209                        return 0;
 210        }
 211        dev_err(chip->card->dev, "oxygen: SPI wait timeout\n");
 212        return -EIO;
 213}
 214
 215int oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data)
 216{
 217        /*
 218         * We need to wait AFTER initiating the SPI transaction,
 219         * otherwise read operations will not work.
 220         */
 221        oxygen_write8(chip, OXYGEN_SPI_DATA1, data);
 222        oxygen_write8(chip, OXYGEN_SPI_DATA2, data >> 8);
 223        if (control & OXYGEN_SPI_DATA_LENGTH_3)
 224                oxygen_write8(chip, OXYGEN_SPI_DATA3, data >> 16);
 225        oxygen_write8(chip, OXYGEN_SPI_CONTROL, control);
 226        return oxygen_wait_spi(chip);
 227}
 228EXPORT_SYMBOL(oxygen_write_spi);
 229
 230void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data)
 231{
 232        /* should not need more than about 300 us */
 233        msleep(1);
 234
 235        oxygen_write8(chip, OXYGEN_2WIRE_MAP, map);
 236        oxygen_write8(chip, OXYGEN_2WIRE_DATA, data);
 237        oxygen_write8(chip, OXYGEN_2WIRE_CONTROL,
 238                      device | OXYGEN_2WIRE_DIR_WRITE);
 239}
 240EXPORT_SYMBOL(oxygen_write_i2c);
 241
 242static void _write_uart(struct oxygen *chip, unsigned int port, u8 data)
 243{
 244        if (oxygen_read8(chip, OXYGEN_MPU401 + 1) & MPU401_TX_FULL)
 245                msleep(1);
 246        oxygen_write8(chip, OXYGEN_MPU401 + port, data);
 247}
 248
 249void oxygen_reset_uart(struct oxygen *chip)
 250{
 251        _write_uart(chip, 1, MPU401_RESET);
 252        msleep(1); /* wait for ACK */
 253        _write_uart(chip, 1, MPU401_ENTER_UART);
 254}
 255EXPORT_SYMBOL(oxygen_reset_uart);
 256
 257void oxygen_write_uart(struct oxygen *chip, u8 data)
 258{
 259        _write_uart(chip, 0, data);
 260}
 261EXPORT_SYMBOL(oxygen_write_uart);
 262
 263u16 oxygen_read_eeprom(struct oxygen *chip, unsigned int index)
 264{
 265        unsigned int timeout;
 266
 267        oxygen_write8(chip, OXYGEN_EEPROM_CONTROL,
 268                      index | OXYGEN_EEPROM_DIR_READ);
 269        for (timeout = 0; timeout < 100; ++timeout) {
 270                udelay(1);
 271                if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS)
 272                      & OXYGEN_EEPROM_BUSY))
 273                        break;
 274        }
 275        return oxygen_read16(chip, OXYGEN_EEPROM_DATA);
 276}
 277
 278void oxygen_write_eeprom(struct oxygen *chip, unsigned int index, u16 value)
 279{
 280        unsigned int timeout;
 281
 282        oxygen_write16(chip, OXYGEN_EEPROM_DATA, value);
 283        oxygen_write8(chip, OXYGEN_EEPROM_CONTROL,
 284                      index | OXYGEN_EEPROM_DIR_WRITE);
 285        for (timeout = 0; timeout < 10; ++timeout) {
 286                msleep(1);
 287                if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS)
 288                      & OXYGEN_EEPROM_BUSY))
 289                        return;
 290        }
 291        dev_err(chip->card->dev, "EEPROM write timeout\n");
 292}
 293