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15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/input.h>
20#include <linux/input/matrix_keypad.h>
21#include <linux/spi/spi.h>
22#include <linux/i2c/twl.h>
23#include <linux/regulator/machine.h>
24#include <linux/io.h>
25#include <linux/gpio.h>
26#include <linux/mmc/host.h>
27#include <linux/platform_data/spi-omap2-mcspi.h>
28#include <linux/platform_data/omap-twl4030.h>
29#include <linux/usb/phy.h>
30
31#include <asm/mach-types.h>
32#include <asm/mach/arch.h>
33#include <asm/mach/map.h>
34
35#include "common.h"
36#include <linux/omap-dma.h>
37#include <video/omapdss.h>
38#include <video/omap-panel-data.h>
39
40#include "gpmc.h"
41#include "gpmc-smc91x.h"
42
43#include "soc.h"
44#include "board-flash.h"
45#include "mux.h"
46#include "sdram-qimonda-hyb18m512160af-6.h"
47#include "hsmmc.h"
48#include "pm.h"
49#include "control.h"
50#include "common-board-devices.h"
51
52#define CONFIG_DISABLE_HFCLK 1
53
54#define SDP3430_TS_GPIO_IRQ_SDPV1 3
55#define SDP3430_TS_GPIO_IRQ_SDPV2 2
56
57#define ENABLE_VAUX3_DEDICATED 0x03
58#define ENABLE_VAUX3_DEV_GRP 0x20
59
60#define TWL4030_MSECURE_GPIO 22
61
62static uint32_t board_keymap[] = {
63 KEY(0, 0, KEY_LEFT),
64 KEY(0, 1, KEY_RIGHT),
65 KEY(0, 2, KEY_A),
66 KEY(0, 3, KEY_B),
67 KEY(0, 4, KEY_C),
68 KEY(1, 0, KEY_DOWN),
69 KEY(1, 1, KEY_UP),
70 KEY(1, 2, KEY_E),
71 KEY(1, 3, KEY_F),
72 KEY(1, 4, KEY_G),
73 KEY(2, 0, KEY_ENTER),
74 KEY(2, 1, KEY_I),
75 KEY(2, 2, KEY_J),
76 KEY(2, 3, KEY_K),
77 KEY(2, 4, KEY_3),
78 KEY(3, 0, KEY_M),
79 KEY(3, 1, KEY_N),
80 KEY(3, 2, KEY_O),
81 KEY(3, 3, KEY_P),
82 KEY(3, 4, KEY_Q),
83 KEY(4, 0, KEY_R),
84 KEY(4, 1, KEY_4),
85 KEY(4, 2, KEY_T),
86 KEY(4, 3, KEY_U),
87 KEY(4, 4, KEY_D),
88 KEY(5, 0, KEY_V),
89 KEY(5, 1, KEY_W),
90 KEY(5, 2, KEY_L),
91 KEY(5, 3, KEY_S),
92 KEY(5, 4, KEY_H),
93 0
94};
95
96static struct matrix_keymap_data board_map_data = {
97 .keymap = board_keymap,
98 .keymap_size = ARRAY_SIZE(board_keymap),
99};
100
101static struct twl4030_keypad_data sdp3430_kp_data = {
102 .keymap_data = &board_map_data,
103 .rows = 5,
104 .cols = 6,
105 .rep = 1,
106};
107
108#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
109#define SDP3430_LCD_PANEL_ENABLE_GPIO 5
110
111static void __init sdp3430_display_init(void)
112{
113 int r;
114
115
116
117
118
119
120
121
122 r = gpio_request_one(SDP3430_LCD_PANEL_BACKLIGHT_GPIO,
123 GPIOF_OUT_INIT_HIGH, "LCD Backlight");
124 if (r)
125 pr_err("failed to get LCD Backlight GPIO\n");
126
127}
128
129static struct panel_sharp_ls037v7dw01_data sdp3430_lcd_data = {
130 .resb_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO,
131 .ini_gpio = -1,
132 .mo_gpio = -1,
133 .lr_gpio = -1,
134 .ud_gpio = -1,
135};
136
137static struct omap_dss_device sdp3430_lcd_device = {
138 .name = "lcd",
139 .driver_name = "sharp_ls_panel",
140 .type = OMAP_DISPLAY_TYPE_DPI,
141 .phy.dpi.data_lines = 16,
142 .data = &sdp3430_lcd_data,
143};
144
145static struct tfp410_platform_data dvi_panel = {
146 .power_down_gpio = -1,
147 .i2c_bus_num = -1,
148};
149
150static struct omap_dss_device sdp3430_dvi_device = {
151 .name = "dvi",
152 .type = OMAP_DISPLAY_TYPE_DPI,
153 .driver_name = "tfp410",
154 .data = &dvi_panel,
155 .phy.dpi.data_lines = 24,
156};
157
158static struct omap_dss_device sdp3430_tv_device = {
159 .name = "tv",
160 .driver_name = "venc",
161 .type = OMAP_DISPLAY_TYPE_VENC,
162 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
163};
164
165
166static struct omap_dss_device *sdp3430_dss_devices[] = {
167 &sdp3430_lcd_device,
168 &sdp3430_dvi_device,
169 &sdp3430_tv_device,
170};
171
172static struct omap_dss_board_info sdp3430_dss_data = {
173 .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
174 .devices = sdp3430_dss_devices,
175 .default_device = &sdp3430_lcd_device,
176};
177
178static struct omap2_hsmmc_info mmc[] = {
179 {
180 .mmc = 1,
181
182
183
184 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
185 .gpio_wp = 4,
186 .deferred = true,
187 },
188 {
189 .mmc = 2,
190 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
191 .gpio_wp = 7,
192 .deferred = true,
193 },
194 {}
195};
196
197static struct omap_tw4030_pdata omap_twl4030_audio_data = {
198 .voice_connected = true,
199 .custom_routing = true,
200
201 .has_hs = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
202 .has_hf = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
203
204 .has_mainmic = true,
205 .has_submic = true,
206 .has_hsmic = true,
207 .has_linein = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
208};
209
210static int sdp3430_twl_gpio_setup(struct device *dev,
211 unsigned gpio, unsigned ngpio)
212{
213
214
215
216 mmc[0].gpio_cd = gpio + 0;
217 mmc[1].gpio_cd = gpio + 1;
218 omap_hsmmc_late_init(mmc);
219
220
221 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
222
223
224 gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
225
226 omap_twl4030_audio_data.jack_detect = gpio + 2;
227 omap_twl4030_audio_init("SDP3430", &omap_twl4030_audio_data);
228
229 return 0;
230}
231
232static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
233 .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
234 | BIT(16) | BIT(17),
235 .setup = sdp3430_twl_gpio_setup,
236};
237
238
239
240
241static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
242 REGULATOR_SUPPLY("vcc", "spi1.0"),
243};
244
245static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
246 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
247};
248
249static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
250 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
251};
252
253static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
254 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
255};
256
257
258
259
260
261
262
263static struct regulator_init_data sdp3430_vaux1 = {
264 .constraints = {
265 .min_uV = 2800000,
266 .max_uV = 2800000,
267 .apply_uV = true,
268 .valid_modes_mask = REGULATOR_MODE_NORMAL
269 | REGULATOR_MODE_STANDBY,
270 .valid_ops_mask = REGULATOR_CHANGE_MODE
271 | REGULATOR_CHANGE_STATUS,
272 },
273};
274
275
276static struct regulator_init_data sdp3430_vaux2 = {
277 .constraints = {
278 .min_uV = 2800000,
279 .max_uV = 2800000,
280 .apply_uV = true,
281 .valid_modes_mask = REGULATOR_MODE_NORMAL
282 | REGULATOR_MODE_STANDBY,
283 .valid_ops_mask = REGULATOR_CHANGE_MODE
284 | REGULATOR_CHANGE_STATUS,
285 },
286};
287
288
289static struct regulator_init_data sdp3430_vaux3 = {
290 .constraints = {
291 .min_uV = 2800000,
292 .max_uV = 2800000,
293 .apply_uV = true,
294 .valid_modes_mask = REGULATOR_MODE_NORMAL
295 | REGULATOR_MODE_STANDBY,
296 .valid_ops_mask = REGULATOR_CHANGE_MODE
297 | REGULATOR_CHANGE_STATUS,
298 },
299 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
300 .consumer_supplies = sdp3430_vaux3_supplies,
301};
302
303
304static struct regulator_init_data sdp3430_vaux4 = {
305 .constraints = {
306 .min_uV = 1800000,
307 .max_uV = 1800000,
308 .apply_uV = true,
309 .valid_modes_mask = REGULATOR_MODE_NORMAL
310 | REGULATOR_MODE_STANDBY,
311 .valid_ops_mask = REGULATOR_CHANGE_MODE
312 | REGULATOR_CHANGE_STATUS,
313 },
314};
315
316
317static struct regulator_init_data sdp3430_vmmc1 = {
318 .constraints = {
319 .min_uV = 1850000,
320 .max_uV = 3150000,
321 .valid_modes_mask = REGULATOR_MODE_NORMAL
322 | REGULATOR_MODE_STANDBY,
323 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
324 | REGULATOR_CHANGE_MODE
325 | REGULATOR_CHANGE_STATUS,
326 },
327 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
328 .consumer_supplies = sdp3430_vmmc1_supplies,
329};
330
331
332static struct regulator_init_data sdp3430_vmmc2 = {
333 .constraints = {
334 .min_uV = 1850000,
335 .max_uV = 1850000,
336 .apply_uV = true,
337 .valid_modes_mask = REGULATOR_MODE_NORMAL
338 | REGULATOR_MODE_STANDBY,
339 .valid_ops_mask = REGULATOR_CHANGE_MODE
340 | REGULATOR_CHANGE_STATUS,
341 },
342 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
343 .consumer_supplies = sdp3430_vmmc2_supplies,
344};
345
346
347static struct regulator_init_data sdp3430_vsim = {
348 .constraints = {
349 .min_uV = 1800000,
350 .max_uV = 3000000,
351 .valid_modes_mask = REGULATOR_MODE_NORMAL
352 | REGULATOR_MODE_STANDBY,
353 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
354 | REGULATOR_CHANGE_MODE
355 | REGULATOR_CHANGE_STATUS,
356 },
357 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
358 .consumer_supplies = sdp3430_vsim_supplies,
359};
360
361static struct twl4030_platform_data sdp3430_twldata = {
362
363 .gpio = &sdp3430_gpio_data,
364 .keypad = &sdp3430_kp_data,
365
366 .vaux1 = &sdp3430_vaux1,
367 .vaux2 = &sdp3430_vaux2,
368 .vaux3 = &sdp3430_vaux3,
369 .vaux4 = &sdp3430_vaux4,
370 .vmmc1 = &sdp3430_vmmc1,
371 .vmmc2 = &sdp3430_vmmc2,
372 .vsim = &sdp3430_vsim,
373};
374
375static int __init omap3430_i2c_init(void)
376{
377
378 omap3_pmic_get_config(&sdp3430_twldata,
379 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
380 TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
381 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
382 sdp3430_twldata.vdac->constraints.apply_uV = true;
383 sdp3430_twldata.vpll2->constraints.apply_uV = true;
384 sdp3430_twldata.vpll2->constraints.name = "VDVI";
385
386 sdp3430_twldata.audio->codec->hs_extmute = 1;
387 sdp3430_twldata.audio->codec->hs_extmute_gpio = -EINVAL;
388
389 omap3_pmic_init("twl4030", &sdp3430_twldata);
390
391
392 omap_register_i2c_bus(2, 400, NULL, 0);
393
394 omap_register_i2c_bus(3, 400, NULL, 0);
395 return 0;
396}
397
398#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
399
400static struct omap_smc91x_platform_data board_smc91x_data = {
401 .cs = 3,
402 .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
403 IORESOURCE_IRQ_LOWLEVEL,
404};
405
406static void __init board_smc91x_init(void)
407{
408 if (omap_rev() > OMAP3430_REV_ES1_0)
409 board_smc91x_data.gpio_irq = 6;
410 else
411 board_smc91x_data.gpio_irq = 29;
412
413 gpmc_smc91x_init(&board_smc91x_data);
414}
415
416#else
417
418static inline void board_smc91x_init(void)
419{
420}
421
422#endif
423
424static void enable_board_wakeup_source(void)
425{
426
427 omap_mux_init_signal("sys_nirq",
428 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
429}
430
431static struct usbhs_phy_data phy_data[] __initdata = {
432 {
433 .port = 1,
434 .reset_gpio = 57,
435 .vcc_gpio = -EINVAL,
436 },
437 {
438 .port = 2,
439 .reset_gpio = 61,
440 .vcc_gpio = -EINVAL,
441 },
442};
443
444static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
445
446 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
447 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
448};
449
450#ifdef CONFIG_OMAP_MUX
451static struct omap_board_mux board_mux[] __initdata = {
452 { .reg_offset = OMAP_MUX_TERMINATOR },
453};
454#else
455#define board_mux NULL
456#endif
457
458
459
460
461
462
463
464static char chip_sel_3430[][GPMC_CS_NUM] = {
465 {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0},
466 {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0},
467 {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0},
468};
469
470static struct mtd_partition sdp_nor_partitions[] = {
471
472 {
473 .name = "Bootloader-NOR",
474 .offset = 0,
475 .size = SZ_256K,
476 .mask_flags = MTD_WRITEABLE,
477 },
478
479 {
480 .name = "Params-NOR",
481 .offset = MTDPART_OFS_APPEND,
482 .size = SZ_256K,
483 .mask_flags = 0,
484 },
485
486 {
487 .name = "Kernel-NOR",
488 .offset = MTDPART_OFS_APPEND,
489 .size = SZ_2M,
490 .mask_flags = 0
491 },
492
493 {
494 .name = "Filesystem-NOR",
495 .offset = MTDPART_OFS_APPEND,
496 .size = MTDPART_SIZ_FULL,
497 .mask_flags = 0
498 }
499};
500
501static struct mtd_partition sdp_onenand_partitions[] = {
502 {
503 .name = "X-Loader-OneNAND",
504 .offset = 0,
505 .size = 4 * (64 * 2048),
506 .mask_flags = MTD_WRITEABLE
507 },
508 {
509 .name = "U-Boot-OneNAND",
510 .offset = MTDPART_OFS_APPEND,
511 .size = 2 * (64 * 2048),
512 .mask_flags = MTD_WRITEABLE
513 },
514 {
515 .name = "U-Boot Environment-OneNAND",
516 .offset = MTDPART_OFS_APPEND,
517 .size = 1 * (64 * 2048),
518 },
519 {
520 .name = "Kernel-OneNAND",
521 .offset = MTDPART_OFS_APPEND,
522 .size = 16 * (64 * 2048),
523 },
524 {
525 .name = "File System-OneNAND",
526 .offset = MTDPART_OFS_APPEND,
527 .size = MTDPART_SIZ_FULL,
528 },
529};
530
531static struct mtd_partition sdp_nand_partitions[] = {
532
533 {
534 .name = "X-Loader-NAND",
535 .offset = 0,
536 .size = 4 * (64 * 2048),
537 .mask_flags = MTD_WRITEABLE,
538 },
539 {
540 .name = "U-Boot-NAND",
541 .offset = MTDPART_OFS_APPEND,
542 .size = 10 * (64 * 2048),
543 .mask_flags = MTD_WRITEABLE,
544 },
545 {
546 .name = "Boot Env-NAND",
547
548 .offset = MTDPART_OFS_APPEND,
549 .size = 6 * (64 * 2048),
550 },
551 {
552 .name = "Kernel-NAND",
553 .offset = MTDPART_OFS_APPEND,
554 .size = 40 * (64 * 2048),
555 },
556 {
557 .name = "File System - NAND",
558 .size = MTDPART_SIZ_FULL,
559 .offset = MTDPART_OFS_APPEND,
560 },
561};
562
563static struct flash_partitions sdp_flash_partitions[] = {
564 {
565 .parts = sdp_nor_partitions,
566 .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
567 },
568 {
569 .parts = sdp_onenand_partitions,
570 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
571 },
572 {
573 .parts = sdp_nand_partitions,
574 .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
575 },
576};
577
578static void __init omap_3430sdp_init(void)
579{
580 int gpio_pendown;
581
582 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
583 omap_hsmmc_init(mmc);
584 omap3430_i2c_init();
585 omap_display_init(&sdp3430_dss_data);
586 if (omap_rev() > OMAP3430_REV_ES1_0)
587 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
588 else
589 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
590 omap_ads7846_init(1, gpio_pendown, 310, NULL);
591 omap_serial_init();
592 omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
593 usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
594 usb_musb_init(NULL);
595 board_smc91x_init();
596 board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
597 sdp3430_display_init();
598 enable_board_wakeup_source();
599
600 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
601 usbhs_init(&usbhs_bdata);
602}
603
604MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
605
606 .atag_offset = 0x100,
607 .reserve = omap_reserve,
608 .map_io = omap3_map_io,
609 .init_early = omap3430_init_early,
610 .init_irq = omap3_init_irq,
611 .handle_irq = omap3_intc_handle_irq,
612 .init_machine = omap_3430sdp_init,
613 .init_late = omap3430_init_late,
614 .init_time = omap3_sync32k_timer_init,
615 .restart = omap3xxx_restart,
616MACHINE_END
617