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13#undef DEBUG
14
15#include <linux/export.h>
16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/delay.h>
22#include <linux/initrd.h>
23#include <linux/platform_device.h>
24#include <linux/seq_file.h>
25#include <linux/ioport.h>
26#include <linux/console.h>
27#include <linux/screen_info.h>
28#include <linux/root_dev.h>
29#include <linux/notifier.h>
30#include <linux/cpu.h>
31#include <linux/unistd.h>
32#include <linux/serial.h>
33#include <linux/serial_8250.h>
34#include <linux/debugfs.h>
35#include <linux/percpu.h>
36#include <linux/memblock.h>
37#include <linux/of_platform.h>
38#include <asm/io.h>
39#include <asm/paca.h>
40#include <asm/prom.h>
41#include <asm/processor.h>
42#include <asm/vdso_datapage.h>
43#include <asm/pgtable.h>
44#include <asm/smp.h>
45#include <asm/elf.h>
46#include <asm/machdep.h>
47#include <asm/time.h>
48#include <asm/cputable.h>
49#include <asm/sections.h>
50#include <asm/firmware.h>
51#include <asm/btext.h>
52#include <asm/nvram.h>
53#include <asm/setup.h>
54#include <asm/rtas.h>
55#include <asm/iommu.h>
56#include <asm/serial.h>
57#include <asm/cache.h>
58#include <asm/page.h>
59#include <asm/mmu.h>
60#include <asm/xmon.h>
61#include <asm/cputhreads.h>
62#include <mm/mmu_decl.h>
63#include <asm/fadump.h>
64
65#ifdef DEBUG
66#include <asm/udbg.h>
67#define DBG(fmt...) udbg_printf(fmt)
68#else
69#define DBG(fmt...)
70#endif
71
72
73
74struct machdep_calls ppc_md;
75EXPORT_SYMBOL(ppc_md);
76struct machdep_calls *machine_id;
77EXPORT_SYMBOL(machine_id);
78
79int boot_cpuid = -1;
80EXPORT_SYMBOL_GPL(boot_cpuid);
81
82unsigned long klimit = (unsigned long) _end;
83
84char cmd_line[COMMAND_LINE_SIZE];
85
86
87
88
89struct screen_info screen_info = {
90 .orig_x = 0,
91 .orig_y = 25,
92 .orig_video_cols = 80,
93 .orig_video_lines = 25,
94 .orig_video_isVGA = 1,
95 .orig_video_points = 16
96};
97
98
99int of_i8042_kbd_irq;
100EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
101int of_i8042_aux_irq;
102EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
103
104#ifdef __DO_IRQ_CANON
105
106int ppc_do_canonicalize_irqs;
107EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
108#endif
109
110#ifdef CONFIG_CRASH_CORE
111
112int crashing_cpu = -1;
113#endif
114
115
116void machine_shutdown(void)
117{
118#ifdef CONFIG_FA_DUMP
119
120
121
122
123 fadump_cleanup();
124#endif
125
126 if (ppc_md.machine_shutdown)
127 ppc_md.machine_shutdown();
128}
129
130void machine_restart(char *cmd)
131{
132 machine_shutdown();
133 if (ppc_md.restart)
134 ppc_md.restart(cmd);
135#ifdef CONFIG_SMP
136 smp_send_stop();
137#endif
138 printk(KERN_EMERG "System Halted, OK to turn off power\n");
139 local_irq_disable();
140 while (1) ;
141}
142
143void machine_power_off(void)
144{
145 machine_shutdown();
146 if (ppc_md.power_off)
147 ppc_md.power_off();
148#ifdef CONFIG_SMP
149 smp_send_stop();
150#endif
151 printk(KERN_EMERG "System Halted, OK to turn off power\n");
152 local_irq_disable();
153 while (1) ;
154}
155
156EXPORT_SYMBOL_GPL(machine_power_off);
157
158void (*pm_power_off)(void) = machine_power_off;
159EXPORT_SYMBOL_GPL(pm_power_off);
160
161void machine_halt(void)
162{
163 machine_shutdown();
164 if (ppc_md.halt)
165 ppc_md.halt();
166#ifdef CONFIG_SMP
167 smp_send_stop();
168#endif
169 printk(KERN_EMERG "System Halted, OK to turn off power\n");
170 local_irq_disable();
171 while (1) ;
172}
173
174
175#ifdef CONFIG_TAU
176extern u32 cpu_temp(unsigned long cpu);
177extern u32 cpu_temp_both(unsigned long cpu);
178#endif
179
180#ifdef CONFIG_SMP
181DEFINE_PER_CPU(unsigned int, cpu_pvr);
182#endif
183
184static void show_cpuinfo_summary(struct seq_file *m)
185{
186 struct device_node *root;
187 const char *model = NULL;
188#if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
189 unsigned long bogosum = 0;
190 int i;
191 for_each_online_cpu(i)
192 bogosum += loops_per_jiffy;
193 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
194 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
195#endif
196 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
197 if (ppc_md.name)
198 seq_printf(m, "platform\t: %s\n", ppc_md.name);
199 root = of_find_node_by_path("/");
200 if (root)
201 model = of_get_property(root, "model", NULL);
202 if (model)
203 seq_printf(m, "model\t\t: %s\n", model);
204 of_node_put(root);
205
206 if (ppc_md.show_cpuinfo != NULL)
207 ppc_md.show_cpuinfo(m);
208
209#ifdef CONFIG_PPC32
210
211 seq_printf(m, "Memory\t\t: %d MB\n",
212 (unsigned int)(total_memory / (1024 * 1024)));
213#endif
214}
215
216static int show_cpuinfo(struct seq_file *m, void *v)
217{
218 unsigned long cpu_id = (unsigned long)v - 1;
219 unsigned int pvr;
220 unsigned long proc_freq;
221 unsigned short maj;
222 unsigned short min;
223
224
225
226 preempt_disable();
227 if (!cpu_online(cpu_id)) {
228 preempt_enable();
229 return 0;
230 }
231
232#ifdef CONFIG_SMP
233 pvr = per_cpu(cpu_pvr, cpu_id);
234#else
235 pvr = mfspr(SPRN_PVR);
236#endif
237 maj = (pvr >> 8) & 0xFF;
238 min = pvr & 0xFF;
239
240 seq_printf(m, "processor\t: %lu\n", cpu_id);
241 seq_printf(m, "cpu\t\t: ");
242
243 if (cur_cpu_spec->pvr_mask)
244 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
245 else
246 seq_printf(m, "unknown (%08x)", pvr);
247
248#ifdef CONFIG_ALTIVEC
249 if (cpu_has_feature(CPU_FTR_ALTIVEC))
250 seq_printf(m, ", altivec supported");
251#endif
252
253 seq_printf(m, "\n");
254
255#ifdef CONFIG_TAU
256 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
257#ifdef CONFIG_TAU_AVERAGE
258
259 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
260 cpu_temp(cpu_id));
261#else
262
263 u32 temp;
264 temp = cpu_temp_both(cpu_id);
265 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
266 temp & 0xff, temp >> 16);
267#endif
268 }
269#endif
270
271
272
273
274
275
276
277 if (ppc_md.get_proc_freq)
278 proc_freq = ppc_md.get_proc_freq(cpu_id);
279 else
280 proc_freq = ppc_proc_freq;
281
282 if (proc_freq)
283 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
284 proc_freq / 1000000, proc_freq % 1000000);
285
286 if (ppc_md.show_percpuinfo != NULL)
287 ppc_md.show_percpuinfo(m, cpu_id);
288
289
290
291 if (PVR_VER(pvr) & 0x8000) {
292 switch (PVR_VER(pvr)) {
293 case 0x8000:
294 case 0x8001:
295 case 0x8002:
296 case 0x8003:
297 case 0x8004:
298 case 0x800c:
299 maj = ((pvr >> 8) & 0xF);
300 min = PVR_MIN(pvr);
301 break;
302 default:
303 maj = PVR_MAJ(pvr);
304 min = PVR_MIN(pvr);
305 break;
306 }
307 } else {
308 switch (PVR_VER(pvr)) {
309 case 0x0020:
310 maj = PVR_MAJ(pvr) + 1;
311 min = PVR_MIN(pvr);
312 break;
313 case 0x1008:
314 maj = ((pvr >> 8) & 0xFF) - 1;
315 min = pvr & 0xFF;
316 break;
317 default:
318 maj = (pvr >> 8) & 0xFF;
319 min = pvr & 0xFF;
320 break;
321 }
322 }
323
324 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
325 maj, min, PVR_VER(pvr), PVR_REV(pvr));
326
327#ifdef CONFIG_PPC32
328 seq_printf(m, "bogomips\t: %lu.%02lu\n",
329 loops_per_jiffy / (500000/HZ),
330 (loops_per_jiffy / (5000/HZ)) % 100);
331#endif
332
333#ifdef CONFIG_SMP
334 seq_printf(m, "\n");
335#endif
336
337 preempt_enable();
338
339
340 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
341 show_cpuinfo_summary(m);
342
343 return 0;
344}
345
346static void *c_start(struct seq_file *m, loff_t *pos)
347{
348 if (*pos == 0)
349 *pos = cpumask_first(cpu_online_mask);
350 else
351 *pos = cpumask_next(*pos - 1, cpu_online_mask);
352 if ((*pos) < nr_cpu_ids)
353 return (void *)(unsigned long)(*pos + 1);
354 return NULL;
355}
356
357static void *c_next(struct seq_file *m, void *v, loff_t *pos)
358{
359 (*pos)++;
360 return c_start(m, pos);
361}
362
363static void c_stop(struct seq_file *m, void *v)
364{
365}
366
367const struct seq_operations cpuinfo_op = {
368 .start =c_start,
369 .next = c_next,
370 .stop = c_stop,
371 .show = show_cpuinfo,
372};
373
374void __init check_for_initrd(void)
375{
376#ifdef CONFIG_BLK_DEV_INITRD
377 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
378 initrd_start, initrd_end);
379
380
381
382
383 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
384 initrd_end > initrd_start)
385 ROOT_DEV = Root_RAM0;
386 else
387 initrd_start = initrd_end = 0;
388
389 if (initrd_start)
390 printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
391
392 DBG(" <- check_for_initrd()\n");
393#endif
394}
395
396#ifdef CONFIG_SMP
397
398int threads_per_core, threads_per_subcore, threads_shift;
399cpumask_t threads_core_mask;
400EXPORT_SYMBOL_GPL(threads_per_core);
401EXPORT_SYMBOL_GPL(threads_per_subcore);
402EXPORT_SYMBOL_GPL(threads_shift);
403EXPORT_SYMBOL_GPL(threads_core_mask);
404
405static void __init cpu_init_thread_core_maps(int tpc)
406{
407 int i;
408
409 threads_per_core = tpc;
410 threads_per_subcore = tpc;
411 cpumask_clear(&threads_core_mask);
412
413
414
415
416 threads_shift = ilog2(tpc);
417 BUG_ON(tpc != (1 << threads_shift));
418
419 for (i = 0; i < tpc; i++)
420 cpumask_set_cpu(i, &threads_core_mask);
421
422 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
423 tpc, tpc > 1 ? "s" : "");
424 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
425}
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443
444
445
446void __init smp_setup_cpu_maps(void)
447{
448 struct device_node *dn = NULL;
449 int cpu = 0;
450 int nthreads = 1;
451
452 DBG("smp_setup_cpu_maps()\n");
453
454 while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
455 const __be32 *intserv;
456 __be32 cpu_be;
457 int j, len;
458
459 DBG(" * %s...\n", dn->full_name);
460
461 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
462 &len);
463 if (intserv) {
464 nthreads = len / sizeof(int);
465 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
466 nthreads);
467 } else {
468 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
469 intserv = of_get_property(dn, "reg", NULL);
470 if (!intserv) {
471 cpu_be = cpu_to_be32(cpu);
472 intserv = &cpu_be;
473 }
474 }
475
476 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
477 DBG(" thread %d -> cpu %d (hard id %d)\n",
478 j, cpu, be32_to_cpu(intserv[j]));
479 set_cpu_present(cpu, of_device_is_available(dn));
480 set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
481 set_cpu_possible(cpu, true);
482 cpu++;
483 }
484 }
485
486
487 if (!cpu_has_feature(CPU_FTR_SMT)) {
488 DBG(" SMT disabled ! nthreads forced to 1\n");
489 nthreads = 1;
490 }
491
492#ifdef CONFIG_PPC64
493
494
495
496
497 if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
498 (dn = of_find_node_by_path("/rtas"))) {
499 int num_addr_cell, num_size_cell, maxcpus;
500 const __be32 *ireg;
501
502 num_addr_cell = of_n_addr_cells(dn);
503 num_size_cell = of_n_size_cells(dn);
504
505 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
506
507 if (!ireg)
508 goto out;
509
510 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
511
512
513 if (cpu_has_feature(CPU_FTR_SMT))
514 maxcpus *= nthreads;
515
516 if (maxcpus > nr_cpu_ids) {
517 printk(KERN_WARNING
518 "Partition configured for %d cpus, "
519 "operating system maximum is %d.\n",
520 maxcpus, nr_cpu_ids);
521 maxcpus = nr_cpu_ids;
522 } else
523 printk(KERN_INFO "Partition configured for %d cpus.\n",
524 maxcpus);
525
526 for (cpu = 0; cpu < maxcpus; cpu++)
527 set_cpu_possible(cpu, true);
528 out:
529 of_node_put(dn);
530 }
531 vdso_data->processorCount = num_present_cpus();
532#endif
533
534
535
536
537
538
539
540 cpu_init_thread_core_maps(nthreads);
541
542
543 setup_nr_cpu_ids();
544
545 free_unused_pacas();
546}
547#endif
548
549#ifdef CONFIG_PCSPKR_PLATFORM
550static __init int add_pcspkr(void)
551{
552 struct device_node *np;
553 struct platform_device *pd;
554 int ret;
555
556 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
557 of_node_put(np);
558 if (!np)
559 return -ENODEV;
560
561 pd = platform_device_alloc("pcspkr", -1);
562 if (!pd)
563 return -ENOMEM;
564
565 ret = platform_device_add(pd);
566 if (ret)
567 platform_device_put(pd);
568
569 return ret;
570}
571device_initcall(add_pcspkr);
572#endif
573
574void probe_machine(void)
575{
576 extern struct machdep_calls __machine_desc_start;
577 extern struct machdep_calls __machine_desc_end;
578
579
580
581
582
583 DBG("Probing machine type ...\n");
584
585 for (machine_id = &__machine_desc_start;
586 machine_id < &__machine_desc_end;
587 machine_id++) {
588 DBG(" %s ...", machine_id->name);
589 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
590 if (ppc_md.probe()) {
591 DBG(" match !\n");
592 break;
593 }
594 DBG("\n");
595 }
596
597 if (machine_id >= &__machine_desc_end) {
598 DBG("No suitable machine found !\n");
599 for (;;);
600 }
601
602 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
603}
604
605
606int check_legacy_ioport(unsigned long base_port)
607{
608 struct device_node *parent, *np = NULL;
609 int ret = -ENODEV;
610
611 switch(base_port) {
612 case I8042_DATA_REG:
613 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
614 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
615 if (np) {
616 parent = of_get_parent(np);
617
618 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
619 if (!of_i8042_kbd_irq)
620 of_i8042_kbd_irq = 1;
621
622 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
623 if (!of_i8042_aux_irq)
624 of_i8042_aux_irq = 12;
625
626 of_node_put(np);
627 np = parent;
628 break;
629 }
630 np = of_find_node_by_type(NULL, "8042");
631
632
633 if (!np)
634 np = of_find_node_by_name(NULL, "8042");
635 if (np) {
636 of_i8042_kbd_irq = 1;
637 of_i8042_aux_irq = 12;
638 }
639 break;
640 case FDC_BASE:
641 np = of_find_node_by_type(NULL, "fdc");
642 break;
643 default:
644
645 break;
646 }
647 if (!np)
648 return ret;
649 parent = of_get_parent(np);
650 if (parent) {
651 if (strcmp(parent->type, "isa") == 0)
652 ret = 0;
653 of_node_put(parent);
654 }
655 of_node_put(np);
656 return ret;
657}
658EXPORT_SYMBOL(check_legacy_ioport);
659
660static int ppc_panic_event(struct notifier_block *this,
661 unsigned long event, void *ptr)
662{
663
664
665
666
667 crash_fadump(NULL, ptr);
668 ppc_md.panic(ptr);
669 return NOTIFY_DONE;
670}
671
672static struct notifier_block ppc_panic_block = {
673 .notifier_call = ppc_panic_event,
674 .priority = INT_MIN
675};
676
677void __init setup_panic(void)
678{
679 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
680}
681
682#ifdef CONFIG_CHECK_CACHE_COHERENCY
683
684
685
686
687
688
689
690
691#ifdef CONFIG_NOT_COHERENT_CACHE
692#define KERNEL_COHERENCY 0
693#else
694#define KERNEL_COHERENCY 1
695#endif
696
697static int __init check_cache_coherency(void)
698{
699 struct device_node *np;
700 const void *prop;
701 int devtree_coherency;
702
703 np = of_find_node_by_path("/");
704 prop = of_get_property(np, "coherency-off", NULL);
705 of_node_put(np);
706
707 devtree_coherency = prop ? 0 : 1;
708
709 if (devtree_coherency != KERNEL_COHERENCY) {
710 printk(KERN_ERR
711 "kernel coherency:%s != device tree_coherency:%s\n",
712 KERNEL_COHERENCY ? "on" : "off",
713 devtree_coherency ? "on" : "off");
714 BUG();
715 }
716
717 return 0;
718}
719
720late_initcall(check_cache_coherency);
721#endif
722
723#ifdef CONFIG_DEBUG_FS
724struct dentry *powerpc_debugfs_root;
725EXPORT_SYMBOL(powerpc_debugfs_root);
726
727static int powerpc_debugfs_init(void)
728{
729 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
730
731 return powerpc_debugfs_root == NULL;
732}
733arch_initcall(powerpc_debugfs_init);
734#endif
735
736#ifdef CONFIG_BOOKE_WDT
737extern u32 booke_wdt_enabled;
738extern u32 booke_wdt_period;
739
740
741notrace int __init early_parse_wdt(char *p)
742{
743 if (p && strncmp(p, "0", 1) != 0)
744 booke_wdt_enabled = 1;
745
746 return 0;
747}
748early_param("wdt", early_parse_wdt);
749
750int __init early_parse_wdt_period(char *p)
751{
752 unsigned long ret;
753 if (p) {
754 if (!kstrtol(p, 0, &ret))
755 booke_wdt_period = ret;
756 }
757
758 return 0;
759}
760early_param("wdt_period", early_parse_wdt_period);
761#endif
762
763void ppc_printk_progress(char *s, unsigned short hex)
764{
765 pr_info("%s\n", s);
766}
767
768void arch_setup_pdev_archdata(struct platform_device *pdev)
769{
770 pdev->archdata.dma_mask = DMA_BIT_MASK(32);
771 pdev->dev.dma_mask = &pdev->archdata.dma_mask;
772 set_dma_ops(&pdev->dev, &dma_direct_ops);
773}
774