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25#include "priv.h"
26
27static int
28pwm_info(struct nvkm_therm *therm, int *line, int *ctrl, int *indx)
29{
30 struct nvkm_subdev *subdev = &therm->subdev;
31
32 if (*line == 0x04) {
33 *ctrl = 0x00e100;
34 *line = 4;
35 *indx = 0;
36 } else
37 if (*line == 0x09) {
38 *ctrl = 0x00e100;
39 *line = 9;
40 *indx = 1;
41 } else
42 if (*line == 0x10) {
43 *ctrl = 0x00e28c;
44 *line = 0;
45 *indx = 0;
46 } else {
47 nvkm_error(subdev, "unknown pwm ctrl for gpio %d\n", *line);
48 return -ENODEV;
49 }
50
51 return 0;
52}
53
54int
55nv50_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)
56{
57 struct nvkm_device *device = therm->subdev.device;
58 u32 data = enable ? 0x00000001 : 0x00000000;
59 int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id);
60 if (ret == 0)
61 nvkm_mask(device, ctrl, 0x00010001 << line, data << line);
62 return ret;
63}
64
65int
66nv50_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)
67{
68 struct nvkm_device *device = therm->subdev.device;
69 int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id);
70 if (ret)
71 return ret;
72
73 if (nvkm_rd32(device, ctrl) & (1 << line)) {
74 *divs = nvkm_rd32(device, 0x00e114 + (id * 8));
75 *duty = nvkm_rd32(device, 0x00e118 + (id * 8));
76 return 0;
77 }
78
79 return -EINVAL;
80}
81
82int
83nv50_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)
84{
85 struct nvkm_device *device = therm->subdev.device;
86 int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id);
87 if (ret)
88 return ret;
89
90 nvkm_wr32(device, 0x00e114 + (id * 8), divs);
91 nvkm_wr32(device, 0x00e118 + (id * 8), duty | 0x80000000);
92 return 0;
93}
94
95int
96nv50_fan_pwm_clock(struct nvkm_therm *therm, int line)
97{
98 struct nvkm_device *device = therm->subdev.device;
99 int pwm_clock;
100
101
102 if (device->chipset > 0x50 && device->chipset < 0x94) {
103 u8 pwm_div = nvkm_rd32(device, 0x410c);
104 if (nvkm_rd32(device, 0xc040) & 0x800000) {
105
106
107 pwm_clock = (100000000 >> pwm_div) * 10 / 24;
108 } else {
109
110 pwm_clock = (device->crystal * 1000) >> pwm_div;
111 pwm_clock /= 20;
112 }
113 } else {
114 pwm_clock = (device->crystal * 1000) / 20;
115 }
116
117 return pwm_clock;
118}
119
120static void
121nv50_sensor_setup(struct nvkm_therm *therm)
122{
123 struct nvkm_device *device = therm->subdev.device;
124 nvkm_mask(device, 0x20010, 0x40000000, 0x0);
125 mdelay(20);
126}
127
128static int
129nv50_temp_get(struct nvkm_therm *therm)
130{
131 struct nvkm_device *device = therm->subdev.device;
132 struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
133 int core_temp;
134
135 core_temp = nvkm_rd32(device, 0x20014) & 0x3fff;
136
137
138 if (!sensor->slope_div || !sensor->slope_mult ||
139 !sensor->offset_num || !sensor->offset_den)
140 return -ENODEV;
141
142 core_temp = core_temp * sensor->slope_mult / sensor->slope_div;
143 core_temp = core_temp + sensor->offset_num / sensor->offset_den;
144 core_temp = core_temp + sensor->offset_constant - 8;
145
146
147 if (core_temp < 0)
148 core_temp = 0;
149
150 return core_temp;
151}
152
153static void
154nv50_therm_init(struct nvkm_therm *therm)
155{
156 nv50_sensor_setup(therm);
157}
158
159static const struct nvkm_therm_func
160nv50_therm = {
161 .init = nv50_therm_init,
162 .intr = nv40_therm_intr,
163 .pwm_ctrl = nv50_fan_pwm_ctrl,
164 .pwm_get = nv50_fan_pwm_get,
165 .pwm_set = nv50_fan_pwm_set,
166 .pwm_clock = nv50_fan_pwm_clock,
167 .temp_get = nv50_temp_get,
168 .program_alarms = nvkm_therm_program_alarms_polling,
169};
170
171int
172nv50_therm_new(struct nvkm_device *device, int index,
173 struct nvkm_therm **ptherm)
174{
175 return nvkm_therm_new_(&nv50_therm, device, index, ptherm);
176}
177