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28#include "vmwgfx_drv.h"
29#include "ttm/ttm_bo_api.h"
30
31
32
33
34
35#define VMW_CMDBUF_INLINE_ALIGN 64
36#define VMW_CMDBUF_INLINE_SIZE \
37 (1024 - ALIGN(sizeof(SVGACBHeader), VMW_CMDBUF_INLINE_ALIGN))
38
39
40
41
42
43
44
45
46
47
48struct vmw_cmdbuf_context {
49 struct list_head submitted;
50 struct list_head hw_submitted;
51 struct list_head preempted;
52 unsigned num_hw_submitted;
53};
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99
100
101struct vmw_cmdbuf_man {
102 struct mutex cur_mutex;
103 struct mutex space_mutex;
104 struct work_struct work;
105 struct vmw_private *dev_priv;
106 struct vmw_cmdbuf_context ctx[SVGA_CB_CONTEXT_MAX];
107 struct list_head error;
108 struct drm_mm mm;
109 struct ttm_buffer_object *cmd_space;
110 struct ttm_bo_kmap_obj map_obj;
111 u8 *map;
112 struct vmw_cmdbuf_header *cur;
113 size_t cur_pos;
114 size_t default_size;
115 unsigned max_hw_submitted;
116 spinlock_t lock;
117 struct dma_pool *headers;
118 struct dma_pool *dheaders;
119 struct tasklet_struct tasklet;
120 wait_queue_head_t alloc_queue;
121 wait_queue_head_t idle_queue;
122 bool irq_on;
123 bool using_mob;
124 bool has_pool;
125 dma_addr_t handle;
126 size_t size;
127};
128
129
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133
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140
141
142
143
144struct vmw_cmdbuf_header {
145 struct vmw_cmdbuf_man *man;
146 SVGACBHeader *cb_header;
147 SVGACBContext cb_context;
148 struct list_head list;
149 struct drm_mm_node node;
150 dma_addr_t handle;
151 u8 *cmd;
152 size_t size;
153 size_t reserved;
154 bool inline_space;
155};
156
157
158
159
160
161
162
163
164struct vmw_cmdbuf_dheader {
165 SVGACBHeader cb_header;
166 u8 cmd[VMW_CMDBUF_INLINE_SIZE] __aligned(VMW_CMDBUF_INLINE_ALIGN);
167};
168
169
170
171
172
173
174
175
176struct vmw_cmdbuf_alloc_info {
177 size_t page_size;
178 struct drm_mm_node *node;
179 bool done;
180};
181
182
183#define for_each_cmdbuf_ctx(_man, _i, _ctx) \
184 for (_i = 0, _ctx = &(_man)->ctx[0]; (_i) < SVGA_CB_CONTEXT_MAX; \
185 ++(_i), ++(_ctx))
186
187static int vmw_cmdbuf_startstop(struct vmw_cmdbuf_man *man, bool enable);
188
189
190
191
192
193
194
195
196static int vmw_cmdbuf_cur_lock(struct vmw_cmdbuf_man *man, bool interruptible)
197{
198 if (interruptible) {
199 if (mutex_lock_interruptible(&man->cur_mutex))
200 return -ERESTARTSYS;
201 } else {
202 mutex_lock(&man->cur_mutex);
203 }
204
205 return 0;
206}
207
208
209
210
211
212
213static void vmw_cmdbuf_cur_unlock(struct vmw_cmdbuf_man *man)
214{
215 mutex_unlock(&man->cur_mutex);
216}
217
218
219
220
221
222
223
224
225static void vmw_cmdbuf_header_inline_free(struct vmw_cmdbuf_header *header)
226{
227 struct vmw_cmdbuf_dheader *dheader;
228
229 if (WARN_ON_ONCE(!header->inline_space))
230 return;
231
232 dheader = container_of(header->cb_header, struct vmw_cmdbuf_dheader,
233 cb_header);
234 dma_pool_free(header->man->dheaders, dheader, header->handle);
235 kfree(header);
236}
237
238
239
240
241
242
243
244
245
246static void __vmw_cmdbuf_header_free(struct vmw_cmdbuf_header *header)
247{
248 struct vmw_cmdbuf_man *man = header->man;
249
250 lockdep_assert_held_once(&man->lock);
251
252 if (header->inline_space) {
253 vmw_cmdbuf_header_inline_free(header);
254 return;
255 }
256
257 drm_mm_remove_node(&header->node);
258 wake_up_all(&man->alloc_queue);
259 if (header->cb_header)
260 dma_pool_free(man->headers, header->cb_header,
261 header->handle);
262 kfree(header);
263}
264
265
266
267
268
269
270
271void vmw_cmdbuf_header_free(struct vmw_cmdbuf_header *header)
272{
273 struct vmw_cmdbuf_man *man = header->man;
274
275
276 if (header->inline_space) {
277 vmw_cmdbuf_header_inline_free(header);
278 return;
279 }
280 spin_lock_bh(&man->lock);
281 __vmw_cmdbuf_header_free(header);
282 spin_unlock_bh(&man->lock);
283}
284
285
286
287
288
289
290
291static int vmw_cmdbuf_header_submit(struct vmw_cmdbuf_header *header)
292{
293 struct vmw_cmdbuf_man *man = header->man;
294 u32 val;
295
296 val = upper_32_bits(header->handle);
297 vmw_write(man->dev_priv, SVGA_REG_COMMAND_HIGH, val);
298
299 val = lower_32_bits(header->handle);
300 val |= header->cb_context & SVGA_CB_CONTEXT_MASK;
301 vmw_write(man->dev_priv, SVGA_REG_COMMAND_LOW, val);
302
303 return header->cb_header->status;
304}
305
306
307
308
309
310
311static void vmw_cmdbuf_ctx_init(struct vmw_cmdbuf_context *ctx)
312{
313 INIT_LIST_HEAD(&ctx->hw_submitted);
314 INIT_LIST_HEAD(&ctx->submitted);
315 INIT_LIST_HEAD(&ctx->preempted);
316 ctx->num_hw_submitted = 0;
317}
318
319
320
321
322
323
324
325
326
327
328
329static void vmw_cmdbuf_ctx_submit(struct vmw_cmdbuf_man *man,
330 struct vmw_cmdbuf_context *ctx)
331{
332 while (ctx->num_hw_submitted < man->max_hw_submitted &&
333 !list_empty(&ctx->submitted)) {
334 struct vmw_cmdbuf_header *entry;
335 SVGACBStatus status;
336
337 entry = list_first_entry(&ctx->submitted,
338 struct vmw_cmdbuf_header,
339 list);
340
341 status = vmw_cmdbuf_header_submit(entry);
342
343
344 if (WARN_ON_ONCE(status == SVGA_CB_STATUS_QUEUE_FULL)) {
345 entry->cb_header->status = SVGA_CB_STATUS_NONE;
346 break;
347 }
348
349 list_del(&entry->list);
350 list_add_tail(&entry->list, &ctx->hw_submitted);
351 ctx->num_hw_submitted++;
352 }
353
354}
355
356
357
358
359
360
361
362
363
364
365
366static void vmw_cmdbuf_ctx_process(struct vmw_cmdbuf_man *man,
367 struct vmw_cmdbuf_context *ctx,
368 int *notempty)
369{
370 struct vmw_cmdbuf_header *entry, *next;
371
372 vmw_cmdbuf_ctx_submit(man, ctx);
373
374 list_for_each_entry_safe(entry, next, &ctx->hw_submitted, list) {
375 SVGACBStatus status = entry->cb_header->status;
376
377 if (status == SVGA_CB_STATUS_NONE)
378 break;
379
380 list_del(&entry->list);
381 wake_up_all(&man->idle_queue);
382 ctx->num_hw_submitted--;
383 switch (status) {
384 case SVGA_CB_STATUS_COMPLETED:
385 __vmw_cmdbuf_header_free(entry);
386 break;
387 case SVGA_CB_STATUS_COMMAND_ERROR:
388 case SVGA_CB_STATUS_CB_HEADER_ERROR:
389 list_add_tail(&entry->list, &man->error);
390 schedule_work(&man->work);
391 break;
392 case SVGA_CB_STATUS_PREEMPTED:
393 list_add(&entry->list, &ctx->preempted);
394 break;
395 default:
396 WARN_ONCE(true, "Undefined command buffer status.\n");
397 __vmw_cmdbuf_header_free(entry);
398 break;
399 }
400 }
401
402 vmw_cmdbuf_ctx_submit(man, ctx);
403 if (!list_empty(&ctx->submitted))
404 (*notempty)++;
405}
406
407
408
409
410
411
412
413
414
415
416
417static void vmw_cmdbuf_man_process(struct vmw_cmdbuf_man *man)
418{
419 int notempty;
420 struct vmw_cmdbuf_context *ctx;
421 int i;
422
423retry:
424 notempty = 0;
425 for_each_cmdbuf_ctx(man, i, ctx)
426 vmw_cmdbuf_ctx_process(man, ctx, ¬empty);
427
428 if (man->irq_on && !notempty) {
429 vmw_generic_waiter_remove(man->dev_priv,
430 SVGA_IRQFLAG_COMMAND_BUFFER,
431 &man->dev_priv->cmdbuf_waiters);
432 man->irq_on = false;
433 } else if (!man->irq_on && notempty) {
434 vmw_generic_waiter_add(man->dev_priv,
435 SVGA_IRQFLAG_COMMAND_BUFFER,
436 &man->dev_priv->cmdbuf_waiters);
437 man->irq_on = true;
438
439
440 goto retry;
441 }
442}
443
444
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450
451
452
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454
455
456
457static void vmw_cmdbuf_ctx_add(struct vmw_cmdbuf_man *man,
458 struct vmw_cmdbuf_header *header,
459 SVGACBContext cb_context)
460{
461 if (!(header->cb_header->flags & SVGA_CB_FLAG_DX_CONTEXT))
462 header->cb_header->dxContext = 0;
463 header->cb_context = cb_context;
464 list_add_tail(&header->list, &man->ctx[cb_context].submitted);
465
466 vmw_cmdbuf_man_process(man);
467}
468
469
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477
478
479
480static void vmw_cmdbuf_man_tasklet(unsigned long data)
481{
482 struct vmw_cmdbuf_man *man = (struct vmw_cmdbuf_man *) data;
483
484 spin_lock(&man->lock);
485 vmw_cmdbuf_man_process(man);
486 spin_unlock(&man->lock);
487}
488
489
490
491
492
493
494
495
496
497
498static void vmw_cmdbuf_work_func(struct work_struct *work)
499{
500 struct vmw_cmdbuf_man *man =
501 container_of(work, struct vmw_cmdbuf_man, work);
502 struct vmw_cmdbuf_header *entry, *next;
503 uint32_t dummy;
504 bool restart = false;
505
506 spin_lock_bh(&man->lock);
507 list_for_each_entry_safe(entry, next, &man->error, list) {
508 restart = true;
509 DRM_ERROR("Command buffer error.\n");
510
511 list_del(&entry->list);
512 __vmw_cmdbuf_header_free(entry);
513 wake_up_all(&man->idle_queue);
514 }
515 spin_unlock_bh(&man->lock);
516
517 if (restart && vmw_cmdbuf_startstop(man, true))
518 DRM_ERROR("Failed restarting command buffer context 0.\n");
519
520
521 vmw_fifo_send_fence(man->dev_priv, &dummy);
522}
523
524
525
526
527
528
529
530
531static bool vmw_cmdbuf_man_idle(struct vmw_cmdbuf_man *man,
532 bool check_preempted)
533{
534 struct vmw_cmdbuf_context *ctx;
535 bool idle = false;
536 int i;
537
538 spin_lock_bh(&man->lock);
539 vmw_cmdbuf_man_process(man);
540 for_each_cmdbuf_ctx(man, i, ctx) {
541 if (!list_empty(&ctx->submitted) ||
542 !list_empty(&ctx->hw_submitted) ||
543 (check_preempted && !list_empty(&ctx->preempted)))
544 goto out_unlock;
545 }
546
547 idle = list_empty(&man->error);
548
549out_unlock:
550 spin_unlock_bh(&man->lock);
551
552 return idle;
553}
554
555
556
557
558
559
560
561
562
563
564static void __vmw_cmdbuf_cur_flush(struct vmw_cmdbuf_man *man)
565{
566 struct vmw_cmdbuf_header *cur = man->cur;
567
568 WARN_ON(!mutex_is_locked(&man->cur_mutex));
569
570 if (!cur)
571 return;
572
573 spin_lock_bh(&man->lock);
574 if (man->cur_pos == 0) {
575 __vmw_cmdbuf_header_free(cur);
576 goto out_unlock;
577 }
578
579 man->cur->cb_header->length = man->cur_pos;
580 vmw_cmdbuf_ctx_add(man, man->cur, SVGA_CB_CONTEXT_0);
581out_unlock:
582 spin_unlock_bh(&man->lock);
583 man->cur = NULL;
584 man->cur_pos = 0;
585}
586
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588
589
590
591
592
593
594
595
596
597int vmw_cmdbuf_cur_flush(struct vmw_cmdbuf_man *man,
598 bool interruptible)
599{
600 int ret = vmw_cmdbuf_cur_lock(man, interruptible);
601
602 if (ret)
603 return ret;
604
605 __vmw_cmdbuf_cur_flush(man);
606 vmw_cmdbuf_cur_unlock(man);
607
608 return 0;
609}
610
611
612
613
614
615
616
617
618
619
620
621
622int vmw_cmdbuf_idle(struct vmw_cmdbuf_man *man, bool interruptible,
623 unsigned long timeout)
624{
625 int ret;
626
627 ret = vmw_cmdbuf_cur_flush(man, interruptible);
628 vmw_generic_waiter_add(man->dev_priv,
629 SVGA_IRQFLAG_COMMAND_BUFFER,
630 &man->dev_priv->cmdbuf_waiters);
631
632 if (interruptible) {
633 ret = wait_event_interruptible_timeout
634 (man->idle_queue, vmw_cmdbuf_man_idle(man, true),
635 timeout);
636 } else {
637 ret = wait_event_timeout
638 (man->idle_queue, vmw_cmdbuf_man_idle(man, true),
639 timeout);
640 }
641 vmw_generic_waiter_remove(man->dev_priv,
642 SVGA_IRQFLAG_COMMAND_BUFFER,
643 &man->dev_priv->cmdbuf_waiters);
644 if (ret == 0) {
645 if (!vmw_cmdbuf_man_idle(man, true))
646 ret = -EBUSY;
647 else
648 ret = 0;
649 }
650 if (ret > 0)
651 ret = 0;
652
653 return ret;
654}
655
656
657
658
659
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662
663
664
665
666static bool vmw_cmdbuf_try_alloc(struct vmw_cmdbuf_man *man,
667 struct vmw_cmdbuf_alloc_info *info)
668{
669 int ret;
670
671 if (info->done)
672 return true;
673
674 memset(info->node, 0, sizeof(*info->node));
675 spin_lock_bh(&man->lock);
676 ret = drm_mm_insert_node_generic(&man->mm, info->node, info->page_size,
677 0, 0,
678 DRM_MM_SEARCH_DEFAULT,
679 DRM_MM_CREATE_DEFAULT);
680 if (ret) {
681 vmw_cmdbuf_man_process(man);
682 ret = drm_mm_insert_node_generic(&man->mm, info->node,
683 info->page_size, 0, 0,
684 DRM_MM_SEARCH_DEFAULT,
685 DRM_MM_CREATE_DEFAULT);
686 }
687
688 spin_unlock_bh(&man->lock);
689 info->done = !ret;
690
691 return info->done;
692}
693
694
695
696
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698
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701
702
703
704
705
706static int vmw_cmdbuf_alloc_space(struct vmw_cmdbuf_man *man,
707 struct drm_mm_node *node,
708 size_t size,
709 bool interruptible)
710{
711 struct vmw_cmdbuf_alloc_info info;
712
713 info.page_size = PAGE_ALIGN(size) >> PAGE_SHIFT;
714 info.node = node;
715 info.done = false;
716
717
718
719
720
721 if (interruptible) {
722 if (mutex_lock_interruptible(&man->space_mutex))
723 return -ERESTARTSYS;
724 } else {
725 mutex_lock(&man->space_mutex);
726 }
727
728
729 if (vmw_cmdbuf_try_alloc(man, &info))
730 goto out_unlock;
731
732 vmw_generic_waiter_add(man->dev_priv,
733 SVGA_IRQFLAG_COMMAND_BUFFER,
734 &man->dev_priv->cmdbuf_waiters);
735
736 if (interruptible) {
737 int ret;
738
739 ret = wait_event_interruptible
740 (man->alloc_queue, vmw_cmdbuf_try_alloc(man, &info));
741 if (ret) {
742 vmw_generic_waiter_remove
743 (man->dev_priv, SVGA_IRQFLAG_COMMAND_BUFFER,
744 &man->dev_priv->cmdbuf_waiters);
745 mutex_unlock(&man->space_mutex);
746 return ret;
747 }
748 } else {
749 wait_event(man->alloc_queue, vmw_cmdbuf_try_alloc(man, &info));
750 }
751 vmw_generic_waiter_remove(man->dev_priv,
752 SVGA_IRQFLAG_COMMAND_BUFFER,
753 &man->dev_priv->cmdbuf_waiters);
754
755out_unlock:
756 mutex_unlock(&man->space_mutex);
757
758 return 0;
759}
760
761
762
763
764
765
766
767
768
769
770static int vmw_cmdbuf_space_pool(struct vmw_cmdbuf_man *man,
771 struct vmw_cmdbuf_header *header,
772 size_t size,
773 bool interruptible)
774{
775 SVGACBHeader *cb_hdr;
776 size_t offset;
777 int ret;
778
779 if (!man->has_pool)
780 return -ENOMEM;
781
782 ret = vmw_cmdbuf_alloc_space(man, &header->node, size, interruptible);
783
784 if (ret)
785 return ret;
786
787 header->cb_header = dma_pool_alloc(man->headers, GFP_KERNEL,
788 &header->handle);
789 if (!header->cb_header) {
790 ret = -ENOMEM;
791 goto out_no_cb_header;
792 }
793
794 header->size = header->node.size << PAGE_SHIFT;
795 cb_hdr = header->cb_header;
796 offset = header->node.start << PAGE_SHIFT;
797 header->cmd = man->map + offset;
798 memset(cb_hdr, 0, sizeof(*cb_hdr));
799 if (man->using_mob) {
800 cb_hdr->flags = SVGA_CB_FLAG_MOB;
801 cb_hdr->ptr.mob.mobid = man->cmd_space->mem.start;
802 cb_hdr->ptr.mob.mobOffset = offset;
803 } else {
804 cb_hdr->ptr.pa = (u64)man->handle + (u64)offset;
805 }
806
807 return 0;
808
809out_no_cb_header:
810 spin_lock_bh(&man->lock);
811 drm_mm_remove_node(&header->node);
812 spin_unlock_bh(&man->lock);
813
814 return ret;
815}
816
817
818
819
820
821
822
823
824
825static int vmw_cmdbuf_space_inline(struct vmw_cmdbuf_man *man,
826 struct vmw_cmdbuf_header *header,
827 int size)
828{
829 struct vmw_cmdbuf_dheader *dheader;
830 SVGACBHeader *cb_hdr;
831
832 if (WARN_ON_ONCE(size > VMW_CMDBUF_INLINE_SIZE))
833 return -ENOMEM;
834
835 dheader = dma_pool_alloc(man->dheaders, GFP_KERNEL,
836 &header->handle);
837 if (!dheader)
838 return -ENOMEM;
839
840 header->inline_space = true;
841 header->size = VMW_CMDBUF_INLINE_SIZE;
842 cb_hdr = &dheader->cb_header;
843 header->cb_header = cb_hdr;
844 header->cmd = dheader->cmd;
845 memset(dheader, 0, sizeof(*dheader));
846 cb_hdr->status = SVGA_CB_STATUS_NONE;
847 cb_hdr->flags = SVGA_CB_FLAG_NONE;
848 cb_hdr->ptr.pa = (u64)header->handle +
849 (u64)offsetof(struct vmw_cmdbuf_dheader, cmd);
850
851 return 0;
852}
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867void *vmw_cmdbuf_alloc(struct vmw_cmdbuf_man *man,
868 size_t size, bool interruptible,
869 struct vmw_cmdbuf_header **p_header)
870{
871 struct vmw_cmdbuf_header *header;
872 int ret = 0;
873
874 *p_header = NULL;
875
876 header = kzalloc(sizeof(*header), GFP_KERNEL);
877 if (!header)
878 return ERR_PTR(-ENOMEM);
879
880 if (size <= VMW_CMDBUF_INLINE_SIZE)
881 ret = vmw_cmdbuf_space_inline(man, header, size);
882 else
883 ret = vmw_cmdbuf_space_pool(man, header, size, interruptible);
884
885 if (ret) {
886 kfree(header);
887 return ERR_PTR(ret);
888 }
889
890 header->man = man;
891 INIT_LIST_HEAD(&header->list);
892 header->cb_header->status = SVGA_CB_STATUS_NONE;
893 *p_header = header;
894
895 return header->cmd;
896}
897
898
899
900
901
902
903
904
905
906
907
908
909
910static void *vmw_cmdbuf_reserve_cur(struct vmw_cmdbuf_man *man,
911 size_t size,
912 int ctx_id,
913 bool interruptible)
914{
915 struct vmw_cmdbuf_header *cur;
916 void *ret;
917
918 if (vmw_cmdbuf_cur_lock(man, interruptible))
919 return ERR_PTR(-ERESTARTSYS);
920
921 cur = man->cur;
922 if (cur && (size + man->cur_pos > cur->size ||
923 ((cur->cb_header->flags & SVGA_CB_FLAG_DX_CONTEXT) &&
924 ctx_id != cur->cb_header->dxContext)))
925 __vmw_cmdbuf_cur_flush(man);
926
927 if (!man->cur) {
928 ret = vmw_cmdbuf_alloc(man,
929 max_t(size_t, size, man->default_size),
930 interruptible, &man->cur);
931 if (IS_ERR(ret)) {
932 vmw_cmdbuf_cur_unlock(man);
933 return ret;
934 }
935
936 cur = man->cur;
937 }
938
939 if (ctx_id != SVGA3D_INVALID_ID) {
940 cur->cb_header->flags |= SVGA_CB_FLAG_DX_CONTEXT;
941 cur->cb_header->dxContext = ctx_id;
942 }
943
944 cur->reserved = size;
945
946 return (void *) (man->cur->cmd + man->cur_pos);
947}
948
949
950
951
952
953
954
955
956static void vmw_cmdbuf_commit_cur(struct vmw_cmdbuf_man *man,
957 size_t size, bool flush)
958{
959 struct vmw_cmdbuf_header *cur = man->cur;
960
961 WARN_ON(!mutex_is_locked(&man->cur_mutex));
962
963 WARN_ON(size > cur->reserved);
964 man->cur_pos += size;
965 if (!size)
966 cur->cb_header->flags &= ~SVGA_CB_FLAG_DX_CONTEXT;
967 if (flush)
968 __vmw_cmdbuf_cur_flush(man);
969 vmw_cmdbuf_cur_unlock(man);
970}
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985void *vmw_cmdbuf_reserve(struct vmw_cmdbuf_man *man, size_t size,
986 int ctx_id, bool interruptible,
987 struct vmw_cmdbuf_header *header)
988{
989 if (!header)
990 return vmw_cmdbuf_reserve_cur(man, size, ctx_id, interruptible);
991
992 if (size > header->size)
993 return ERR_PTR(-EINVAL);
994
995 if (ctx_id != SVGA3D_INVALID_ID) {
996 header->cb_header->flags |= SVGA_CB_FLAG_DX_CONTEXT;
997 header->cb_header->dxContext = ctx_id;
998 }
999
1000 header->reserved = size;
1001 return header->cmd;
1002}
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013void vmw_cmdbuf_commit(struct vmw_cmdbuf_man *man, size_t size,
1014 struct vmw_cmdbuf_header *header, bool flush)
1015{
1016 if (!header) {
1017 vmw_cmdbuf_commit_cur(man, size, flush);
1018 return;
1019 }
1020
1021 (void) vmw_cmdbuf_cur_lock(man, false);
1022 __vmw_cmdbuf_cur_flush(man);
1023 WARN_ON(size > header->reserved);
1024 man->cur = header;
1025 man->cur_pos = size;
1026 if (!size)
1027 header->cb_header->flags &= ~SVGA_CB_FLAG_DX_CONTEXT;
1028 if (flush)
1029 __vmw_cmdbuf_cur_flush(man);
1030 vmw_cmdbuf_cur_unlock(man);
1031}
1032
1033
1034
1035
1036
1037
1038void vmw_cmdbuf_tasklet_schedule(struct vmw_cmdbuf_man *man)
1039{
1040 if (!man)
1041 return;
1042
1043 tasklet_schedule(&man->tasklet);
1044}
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055static int vmw_cmdbuf_send_device_command(struct vmw_cmdbuf_man *man,
1056 const void *command,
1057 size_t size)
1058{
1059 struct vmw_cmdbuf_header *header;
1060 int status;
1061 void *cmd = vmw_cmdbuf_alloc(man, size, false, &header);
1062
1063 if (IS_ERR(cmd))
1064 return PTR_ERR(cmd);
1065
1066 memcpy(cmd, command, size);
1067 header->cb_header->length = size;
1068 header->cb_context = SVGA_CB_CONTEXT_DEVICE;
1069 spin_lock_bh(&man->lock);
1070 status = vmw_cmdbuf_header_submit(header);
1071 spin_unlock_bh(&man->lock);
1072 vmw_cmdbuf_header_free(header);
1073
1074 if (status != SVGA_CB_STATUS_COMPLETED) {
1075 DRM_ERROR("Device context command failed with status %d\n",
1076 status);
1077 return -EINVAL;
1078 }
1079
1080 return 0;
1081}
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092static int vmw_cmdbuf_startstop(struct vmw_cmdbuf_man *man,
1093 bool enable)
1094{
1095 struct {
1096 uint32 id;
1097 SVGADCCmdStartStop body;
1098 } __packed cmd;
1099
1100 cmd.id = SVGA_DC_CMD_START_STOP_CONTEXT;
1101 cmd.body.enable = (enable) ? 1 : 0;
1102 cmd.body.context = SVGA_CB_CONTEXT_0;
1103
1104 return vmw_cmdbuf_send_device_command(man, &cmd, sizeof(cmd));
1105}
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122int vmw_cmdbuf_set_pool_size(struct vmw_cmdbuf_man *man,
1123 size_t size, size_t default_size)
1124{
1125 struct vmw_private *dev_priv = man->dev_priv;
1126 bool dummy;
1127 int ret;
1128
1129 if (man->has_pool)
1130 return -EINVAL;
1131
1132
1133 size = PAGE_ALIGN(size);
1134 man->map = dma_alloc_coherent(&dev_priv->dev->pdev->dev, size,
1135 &man->handle, GFP_KERNEL);
1136 if (man->map) {
1137 man->using_mob = false;
1138 } else {
1139
1140
1141
1142
1143
1144
1145 if (!(dev_priv->capabilities & SVGA_CAP_DX))
1146 return -ENOMEM;
1147
1148 ret = ttm_bo_create(&dev_priv->bdev, size, ttm_bo_type_device,
1149 &vmw_mob_ne_placement, 0, false, NULL,
1150 &man->cmd_space);
1151 if (ret)
1152 return ret;
1153
1154 man->using_mob = true;
1155 ret = ttm_bo_kmap(man->cmd_space, 0, size >> PAGE_SHIFT,
1156 &man->map_obj);
1157 if (ret)
1158 goto out_no_map;
1159
1160 man->map = ttm_kmap_obj_virtual(&man->map_obj, &dummy);
1161 }
1162
1163 man->size = size;
1164 drm_mm_init(&man->mm, 0, size >> PAGE_SHIFT);
1165
1166 man->has_pool = true;
1167
1168
1169
1170
1171
1172
1173
1174 man->default_size = VMW_CMDBUF_INLINE_SIZE;
1175 DRM_INFO("Using command buffers with %s pool.\n",
1176 (man->using_mob) ? "MOB" : "DMA");
1177
1178 return 0;
1179
1180out_no_map:
1181 if (man->using_mob)
1182 ttm_bo_unref(&man->cmd_space);
1183
1184 return ret;
1185}
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197struct vmw_cmdbuf_man *vmw_cmdbuf_man_create(struct vmw_private *dev_priv)
1198{
1199 struct vmw_cmdbuf_man *man;
1200 struct vmw_cmdbuf_context *ctx;
1201 int i;
1202 int ret;
1203
1204 if (!(dev_priv->capabilities & SVGA_CAP_COMMAND_BUFFERS))
1205 return ERR_PTR(-ENOSYS);
1206
1207 man = kzalloc(sizeof(*man), GFP_KERNEL);
1208 if (!man)
1209 return ERR_PTR(-ENOMEM);
1210
1211 man->headers = dma_pool_create("vmwgfx cmdbuf",
1212 &dev_priv->dev->pdev->dev,
1213 sizeof(SVGACBHeader),
1214 64, PAGE_SIZE);
1215 if (!man->headers) {
1216 ret = -ENOMEM;
1217 goto out_no_pool;
1218 }
1219
1220 man->dheaders = dma_pool_create("vmwgfx inline cmdbuf",
1221 &dev_priv->dev->pdev->dev,
1222 sizeof(struct vmw_cmdbuf_dheader),
1223 64, PAGE_SIZE);
1224 if (!man->dheaders) {
1225 ret = -ENOMEM;
1226 goto out_no_dpool;
1227 }
1228
1229 for_each_cmdbuf_ctx(man, i, ctx)
1230 vmw_cmdbuf_ctx_init(ctx);
1231
1232 INIT_LIST_HEAD(&man->error);
1233 spin_lock_init(&man->lock);
1234 mutex_init(&man->cur_mutex);
1235 mutex_init(&man->space_mutex);
1236 tasklet_init(&man->tasklet, vmw_cmdbuf_man_tasklet,
1237 (unsigned long) man);
1238 man->default_size = VMW_CMDBUF_INLINE_SIZE;
1239 init_waitqueue_head(&man->alloc_queue);
1240 init_waitqueue_head(&man->idle_queue);
1241 man->dev_priv = dev_priv;
1242 man->max_hw_submitted = SVGA_CB_MAX_QUEUED_PER_CONTEXT - 1;
1243 INIT_WORK(&man->work, &vmw_cmdbuf_work_func);
1244 vmw_generic_waiter_add(dev_priv, SVGA_IRQFLAG_ERROR,
1245 &dev_priv->error_waiters);
1246 ret = vmw_cmdbuf_startstop(man, true);
1247 if (ret) {
1248 DRM_ERROR("Failed starting command buffer context 0.\n");
1249 vmw_cmdbuf_man_destroy(man);
1250 return ERR_PTR(ret);
1251 }
1252
1253 return man;
1254
1255out_no_dpool:
1256 dma_pool_destroy(man->headers);
1257out_no_pool:
1258 kfree(man);
1259
1260 return ERR_PTR(ret);
1261}
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274void vmw_cmdbuf_remove_pool(struct vmw_cmdbuf_man *man)
1275{
1276 if (!man->has_pool)
1277 return;
1278
1279 man->has_pool = false;
1280 man->default_size = VMW_CMDBUF_INLINE_SIZE;
1281 (void) vmw_cmdbuf_idle(man, false, 10*HZ);
1282 if (man->using_mob) {
1283 (void) ttm_bo_kunmap(&man->map_obj);
1284 ttm_bo_unref(&man->cmd_space);
1285 } else {
1286 dma_free_coherent(&man->dev_priv->dev->pdev->dev,
1287 man->size, man->map, man->handle);
1288 }
1289}
1290
1291
1292
1293
1294
1295
1296
1297
1298void vmw_cmdbuf_man_destroy(struct vmw_cmdbuf_man *man)
1299{
1300 WARN_ON_ONCE(man->has_pool);
1301 (void) vmw_cmdbuf_idle(man, false, 10*HZ);
1302 if (vmw_cmdbuf_startstop(man, false))
1303 DRM_ERROR("Failed stopping command buffer context 0.\n");
1304
1305 vmw_generic_waiter_remove(man->dev_priv, SVGA_IRQFLAG_ERROR,
1306 &man->dev_priv->error_waiters);
1307 tasklet_kill(&man->tasklet);
1308 (void) cancel_work_sync(&man->work);
1309 dma_pool_destroy(man->dheaders);
1310 dma_pool_destroy(man->headers);
1311 mutex_destroy(&man->cur_mutex);
1312 mutex_destroy(&man->space_mutex);
1313 kfree(man);
1314}
1315