1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/sched.h>
28#include <linux/string.h>
29#include <linux/timer.h>
30#include <linux/delay.h>
31#include <linux/errno.h>
32#include <linux/slab.h>
33#include <linux/videodev2.h>
34#include <linux/i2c.h>
35#include <linux/init.h>
36#include <linux/kthread.h>
37#include <linux/freezer.h>
38
39#include <media/tvaudio.h>
40#include <media/v4l2-device.h>
41#include <media/v4l2-chip-ident.h>
42#include <media/v4l2-ctrls.h>
43
44#include <media/i2c-addr.h>
45
46
47
48
49static int debug;
50module_param(debug, int, 0644);
51
52MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
53MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
54MODULE_LICENSE("GPL");
55
56#define UNSET (-1U)
57
58
59
60
61#define MAXREGS 256
62
63struct CHIPSTATE;
64typedef int (*getvalue)(int);
65typedef int (*checkit)(struct CHIPSTATE*);
66typedef int (*initialize)(struct CHIPSTATE*);
67typedef int (*getrxsubchans)(struct CHIPSTATE *);
68typedef void (*setaudmode)(struct CHIPSTATE*, int mode);
69
70
71typedef struct AUDIOCMD {
72 int count;
73 unsigned char bytes[MAXREGS+1];
74} audiocmd;
75
76
77struct CHIPDESC {
78 char *name;
79 int addr_lo, addr_hi;
80 int registers;
81
82 int *insmodopt;
83 checkit checkit;
84 initialize initialize;
85 int flags;
86#define CHIP_HAS_VOLUME 1
87#define CHIP_HAS_BASSTREBLE 2
88#define CHIP_HAS_INPUTSEL 4
89#define CHIP_NEED_CHECKMODE 8
90
91
92 audiocmd init;
93
94
95 int leftreg, rightreg, treblereg, bassreg;
96
97
98 int volinit, trebleinit, bassinit;
99
100
101 getvalue volfunc, treblefunc, bassfunc;
102
103
104 getrxsubchans getrxsubchans;
105 setaudmode setaudmode;
106
107
108 int inputreg;
109 int inputmap[4];
110 int inputmute;
111 int inputmask;
112};
113
114
115struct CHIPSTATE {
116 struct v4l2_subdev sd;
117 struct v4l2_ctrl_handler hdl;
118 struct {
119
120 struct v4l2_ctrl *volume;
121 struct v4l2_ctrl *balance;
122 };
123
124
125
126 struct CHIPDESC *desc;
127
128
129 audiocmd shadow;
130
131
132 u16 muted;
133 int prevmode;
134 int radio;
135 int input;
136
137
138 struct task_struct *thread;
139 struct timer_list wt;
140 int audmode;
141};
142
143static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd)
144{
145 return container_of(sd, struct CHIPSTATE, sd);
146}
147
148static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
149{
150 return &container_of(ctrl->handler, struct CHIPSTATE, hdl)->sd;
151}
152
153
154
155
156
157static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
158{
159 struct v4l2_subdev *sd = &chip->sd;
160 struct i2c_client *c = v4l2_get_subdevdata(sd);
161 unsigned char buffer[2];
162
163 if (subaddr < 0) {
164 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val);
165 chip->shadow.bytes[1] = val;
166 buffer[0] = val;
167 if (1 != i2c_master_send(c, buffer, 1)) {
168 v4l2_warn(sd, "I/O error (write 0x%x)\n", val);
169 return -1;
170 }
171 } else {
172 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
173 v4l2_info(sd,
174 "Tried to access a non-existent register: %d\n",
175 subaddr);
176 return -EINVAL;
177 }
178
179 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n",
180 subaddr, val);
181 chip->shadow.bytes[subaddr+1] = val;
182 buffer[0] = subaddr;
183 buffer[1] = val;
184 if (2 != i2c_master_send(c, buffer, 2)) {
185 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n",
186 subaddr, val);
187 return -1;
188 }
189 }
190 return 0;
191}
192
193static int chip_write_masked(struct CHIPSTATE *chip,
194 int subaddr, int val, int mask)
195{
196 struct v4l2_subdev *sd = &chip->sd;
197
198 if (mask != 0) {
199 if (subaddr < 0) {
200 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
201 } else {
202 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
203 v4l2_info(sd,
204 "Tried to access a non-existent register: %d\n",
205 subaddr);
206 return -EINVAL;
207 }
208
209 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
210 }
211 }
212 return chip_write(chip, subaddr, val);
213}
214
215static int chip_read(struct CHIPSTATE *chip)
216{
217 struct v4l2_subdev *sd = &chip->sd;
218 struct i2c_client *c = v4l2_get_subdevdata(sd);
219 unsigned char buffer;
220
221 if (1 != i2c_master_recv(c, &buffer, 1)) {
222 v4l2_warn(sd, "I/O error (read)\n");
223 return -1;
224 }
225 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer);
226 return buffer;
227}
228
229static int chip_read2(struct CHIPSTATE *chip, int subaddr)
230{
231 struct v4l2_subdev *sd = &chip->sd;
232 struct i2c_client *c = v4l2_get_subdevdata(sd);
233 unsigned char write[1];
234 unsigned char read[1];
235 struct i2c_msg msgs[2] = {
236 {
237 .addr = c->addr,
238 .len = 1,
239 .buf = write
240 },
241 {
242 .addr = c->addr,
243 .flags = I2C_M_RD,
244 .len = 1,
245 .buf = read
246 }
247 };
248
249 write[0] = subaddr;
250
251 if (2 != i2c_transfer(c->adapter, msgs, 2)) {
252 v4l2_warn(sd, "I/O error (read2)\n");
253 return -1;
254 }
255 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n",
256 subaddr, read[0]);
257 return read[0];
258}
259
260static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
261{
262 struct v4l2_subdev *sd = &chip->sd;
263 struct i2c_client *c = v4l2_get_subdevdata(sd);
264 int i;
265
266 if (0 == cmd->count)
267 return 0;
268
269 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
270 v4l2_info(sd,
271 "Tried to access a non-existent register range: %d to %d\n",
272 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
273 return -EINVAL;
274 }
275
276
277
278
279 v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:",
280 name, cmd->bytes[0]);
281 for (i = 1; i < cmd->count; i++) {
282 if (debug)
283 printk(KERN_CONT " 0x%x", cmd->bytes[i]);
284 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
285 }
286 if (debug)
287 printk(KERN_CONT "\n");
288
289
290 if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) {
291 v4l2_warn(sd, "I/O error (%s)\n", name);
292 return -1;
293 }
294 return 0;
295}
296
297
298
299
300
301
302
303
304static void chip_thread_wake(unsigned long data)
305{
306 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
307 wake_up_process(chip->thread);
308}
309
310static int chip_thread(void *data)
311{
312 struct CHIPSTATE *chip = data;
313 struct CHIPDESC *desc = chip->desc;
314 struct v4l2_subdev *sd = &chip->sd;
315 int mode, selected;
316
317 v4l2_dbg(1, debug, sd, "thread started\n");
318 set_freezable();
319 for (;;) {
320 set_current_state(TASK_INTERRUPTIBLE);
321 if (!kthread_should_stop())
322 schedule();
323 set_current_state(TASK_RUNNING);
324 try_to_freeze();
325 if (kthread_should_stop())
326 break;
327 v4l2_dbg(1, debug, sd, "thread wakeup\n");
328
329
330 if (chip->radio)
331 continue;
332
333
334 mode = desc->getrxsubchans(chip);
335 if (mode == chip->prevmode)
336 continue;
337
338
339 v4l2_dbg(1, debug, sd, "thread checkmode\n");
340
341 chip->prevmode = mode;
342
343 selected = V4L2_TUNER_MODE_MONO;
344 switch (chip->audmode) {
345 case V4L2_TUNER_MODE_MONO:
346 if (mode & V4L2_TUNER_SUB_LANG1)
347 selected = V4L2_TUNER_MODE_LANG1;
348 break;
349 case V4L2_TUNER_MODE_STEREO:
350 case V4L2_TUNER_MODE_LANG1:
351 if (mode & V4L2_TUNER_SUB_LANG1)
352 selected = V4L2_TUNER_MODE_LANG1;
353 else if (mode & V4L2_TUNER_SUB_STEREO)
354 selected = V4L2_TUNER_MODE_STEREO;
355 break;
356 case V4L2_TUNER_MODE_LANG2:
357 if (mode & V4L2_TUNER_SUB_LANG2)
358 selected = V4L2_TUNER_MODE_LANG2;
359 else if (mode & V4L2_TUNER_SUB_STEREO)
360 selected = V4L2_TUNER_MODE_STEREO;
361 break;
362 case V4L2_TUNER_MODE_LANG1_LANG2:
363 if (mode & V4L2_TUNER_SUB_LANG2)
364 selected = V4L2_TUNER_MODE_LANG1_LANG2;
365 else if (mode & V4L2_TUNER_SUB_STEREO)
366 selected = V4L2_TUNER_MODE_STEREO;
367 }
368 desc->setaudmode(chip, selected);
369
370
371 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
372 }
373
374 v4l2_dbg(1, debug, sd, "thread exiting\n");
375 return 0;
376}
377
378
379
380
381#define TDA9840_SW 0x00
382#define TDA9840_LVADJ 0x02
383#define TDA9840_STADJ 0x03
384#define TDA9840_TEST 0x04
385
386#define TDA9840_MONO 0x10
387#define TDA9840_STEREO 0x2a
388#define TDA9840_DUALA 0x12
389#define TDA9840_DUALB 0x1e
390#define TDA9840_DUALAB 0x1a
391#define TDA9840_DUALBA 0x16
392#define TDA9840_EXTERNAL 0x7a
393
394#define TDA9840_DS_DUAL 0x20
395#define TDA9840_ST_STEREO 0x40
396#define TDA9840_PONRES 0x80
397
398#define TDA9840_TEST_INT1SN 0x1
399#define TDA9840_TEST_INTFU 0x02
400
401static int tda9840_getrxsubchans(struct CHIPSTATE *chip)
402{
403 struct v4l2_subdev *sd = &chip->sd;
404 int val, mode;
405
406 val = chip_read(chip);
407 mode = V4L2_TUNER_SUB_MONO;
408 if (val & TDA9840_DS_DUAL)
409 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
410 if (val & TDA9840_ST_STEREO)
411 mode = V4L2_TUNER_SUB_STEREO;
412
413 v4l2_dbg(1, debug, sd,
414 "tda9840_getrxsubchans(): raw chip read: %d, return: %d\n",
415 val, mode);
416 return mode;
417}
418
419static void tda9840_setaudmode(struct CHIPSTATE *chip, int mode)
420{
421 int update = 1;
422 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
423
424 switch (mode) {
425 case V4L2_TUNER_MODE_MONO:
426 t |= TDA9840_MONO;
427 break;
428 case V4L2_TUNER_MODE_STEREO:
429 t |= TDA9840_STEREO;
430 break;
431 case V4L2_TUNER_MODE_LANG1:
432 t |= TDA9840_DUALA;
433 break;
434 case V4L2_TUNER_MODE_LANG2:
435 t |= TDA9840_DUALB;
436 break;
437 case V4L2_TUNER_MODE_LANG1_LANG2:
438 t |= TDA9840_DUALAB;
439 break;
440 default:
441 update = 0;
442 }
443
444 if (update)
445 chip_write(chip, TDA9840_SW, t);
446}
447
448static int tda9840_checkit(struct CHIPSTATE *chip)
449{
450 int rc;
451 rc = chip_read(chip);
452
453 return ((rc & 0x1f) == 0) ? 1 : 0;
454}
455
456
457
458
459
460#define TDA9855_VR 0x00
461#define TDA9855_VL 0x01
462#define TDA9855_BA 0x02
463#define TDA9855_TR 0x03
464#define TDA9855_SW 0x04
465
466
467#define TDA9850_C4 0x04
468
469
470#define TDA985x_C5 0x05
471#define TDA985x_C6 0x06
472#define TDA985x_C7 0x07
473#define TDA985x_A1 0x08
474#define TDA985x_A2 0x09
475#define TDA985x_A3 0x0a
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506#define TDA9855_MUTE 1<<7
507#define TDA9855_AVL 1<<6
508#define TDA9855_LOUD 1<<5
509#define TDA9855_SUR 1<<3
510
511
512
513#define TDA9855_EXT 1<<2
514#define TDA9855_INT 0
515
516
517
518
519
520
521
522
523#define TDA985x_SAP 3<<6
524#define TDA985x_MONOSAP 2<<6
525#define TDA985x_STEREO 1<<6
526#define TDA985x_MONO 0
527#define TDA985x_LMU 1<<3
528
529
530#define TDA9855_TZCM 1<<5
531#define TDA9855_VZCM 1<<4
532#define TDA9855_LINEAR 0
533#define TDA9855_PSEUDO 1
534#define TDA9855_SPAT_30 2
535#define TDA9855_SPAT_50 3
536#define TDA9855_E_MONO 7
537
538
539
540
541
542
543
544
545
546
547#define TDA985x_STP 1<<5
548#define TDA985x_SAPP 1<<6
549#define TDA985x_STS 1<<7
550
551
552
553
554
555#define TDA985x_ADJ 1<<7
556
557static int tda9855_volume(int val) { return val/0x2e8+0x27; }
558static int tda9855_bass(int val) { return val/0xccc+0x06; }
559static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
560
561static int tda985x_getrxsubchans(struct CHIPSTATE *chip)
562{
563 int mode, val;
564
565
566
567 mode = V4L2_TUNER_SUB_MONO;
568 val = chip_read(chip);
569 if (val & TDA985x_STP)
570 mode = V4L2_TUNER_SUB_STEREO;
571 if (val & TDA985x_SAPP)
572 mode |= V4L2_TUNER_SUB_SAP;
573 return mode;
574}
575
576static void tda985x_setaudmode(struct CHIPSTATE *chip, int mode)
577{
578 int update = 1;
579 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
580
581 switch (mode) {
582 case V4L2_TUNER_MODE_MONO:
583 c6 |= TDA985x_MONO;
584 break;
585 case V4L2_TUNER_MODE_STEREO:
586 case V4L2_TUNER_MODE_LANG1:
587 c6 |= TDA985x_STEREO;
588 break;
589 case V4L2_TUNER_MODE_SAP:
590 c6 |= TDA985x_SAP;
591 break;
592 case V4L2_TUNER_MODE_LANG1_LANG2:
593 c6 |= TDA985x_MONOSAP;
594 break;
595 default:
596 update = 0;
597 }
598 if (update)
599 chip_write(chip,TDA985x_C6,c6);
600}
601
602
603
604
605
606
607
608#define TDA9873_SW 0x00
609#define TDA9873_AD 0x01
610#define TDA9873_PT 0x02
611
612
613
614
615
616
617
618
619
620#define TDA9873_INP_MASK 3
621#define TDA9873_INTERNAL 0
622#define TDA9873_EXT_STEREO 2
623#define TDA9873_EXT_MONO 1
624
625
626
627
628
629
630
631
632
633
634
635
636#define TDA9873_TR_MASK (7 << 2)
637#define TDA9873_TR_MONO 4
638#define TDA9873_TR_STEREO 1 << 4
639#define TDA9873_TR_REVERSE ((1 << 3) | (1 << 2))
640#define TDA9873_TR_DUALA 1 << 2
641#define TDA9873_TR_DUALB 1 << 3
642#define TDA9873_TR_DUALAB 0
643
644
645
646
647
648
649
650#define TDA9873_GAIN_NORMAL 1 << 5
651#define TDA9873_MUTE 1 << 6
652#define TDA9873_AUTOMUTE 1 << 7
653
654
655
656
657
658
659
660#define TDA9873_STEREO_ADJ 0x06
661
662
663
664
665
666
667
668
669
670
671#define TDA9873_BG 0
672#define TDA9873_M 1
673#define TDA9873_DK1 2
674#define TDA9873_DK2 3
675#define TDA9873_DK3 4
676#define TDA9873_I 5
677
678
679
680#define TDA9873_IDR_NORM 0
681#define TDA9873_IDR_FAST 1 << 7
682
683
684
685
686
687
688
689
690
691
692
693#define TDA9873_PORTS 3
694
695
696#define TDA9873_TST_PORT 1 << 2
697
698
699
700
701
702
703
704
705#define TDA9873_MOUT_MONO 0
706#define TDA9873_MOUT_FMONO 0
707#define TDA9873_MOUT_DUALA 0
708#define TDA9873_MOUT_DUALB 1 << 3
709#define TDA9873_MOUT_ST 1 << 4
710#define TDA9873_MOUT_EXTM ((1 << 4) | (1 << 3))
711#define TDA9873_MOUT_EXTL 1 << 5
712#define TDA9873_MOUT_EXTR ((1 << 5) | (1 << 3))
713#define TDA9873_MOUT_EXTLR ((1 << 5) | (1 << 4))
714#define TDA9873_MOUT_MUTE ((1 << 5) | (1 << 4) | (1 << 3))
715
716
717#define TDA9873_PONR 0
718#define TDA9873_STEREO 2
719#define TDA9873_DUAL 4
720
721static int tda9873_getrxsubchans(struct CHIPSTATE *chip)
722{
723 struct v4l2_subdev *sd = &chip->sd;
724 int val,mode;
725
726 val = chip_read(chip);
727 mode = V4L2_TUNER_SUB_MONO;
728 if (val & TDA9873_STEREO)
729 mode = V4L2_TUNER_SUB_STEREO;
730 if (val & TDA9873_DUAL)
731 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
732 v4l2_dbg(1, debug, sd,
733 "tda9873_getrxsubchans(): raw chip read: %d, return: %d\n",
734 val, mode);
735 return mode;
736}
737
738static void tda9873_setaudmode(struct CHIPSTATE *chip, int mode)
739{
740 struct v4l2_subdev *sd = &chip->sd;
741 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
742
743
744 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
745 v4l2_dbg(1, debug, sd,
746 "tda9873_setaudmode(): external input\n");
747 return;
748 }
749
750 v4l2_dbg(1, debug, sd,
751 "tda9873_setaudmode(): chip->shadow.bytes[%d] = %d\n",
752 TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
753 v4l2_dbg(1, debug, sd, "tda9873_setaudmode(): sw_data = %d\n",
754 sw_data);
755
756 switch (mode) {
757 case V4L2_TUNER_MODE_MONO:
758 sw_data |= TDA9873_TR_MONO;
759 break;
760 case V4L2_TUNER_MODE_STEREO:
761 sw_data |= TDA9873_TR_STEREO;
762 break;
763 case V4L2_TUNER_MODE_LANG1:
764 sw_data |= TDA9873_TR_DUALA;
765 break;
766 case V4L2_TUNER_MODE_LANG2:
767 sw_data |= TDA9873_TR_DUALB;
768 break;
769 case V4L2_TUNER_MODE_LANG1_LANG2:
770 sw_data |= TDA9873_TR_DUALAB;
771 break;
772 default:
773 return;
774 }
775
776 chip_write(chip, TDA9873_SW, sw_data);
777 v4l2_dbg(1, debug, sd,
778 "tda9873_setaudmode(): req. mode %d; chip_write: %d\n",
779 mode, sw_data);
780}
781
782static int tda9873_checkit(struct CHIPSTATE *chip)
783{
784 int rc;
785
786 if (-1 == (rc = chip_read2(chip,254)))
787 return 0;
788 return (rc & ~0x1f) == 0x80;
789}
790
791
792
793
794
795
796
797#define TDA9874A_AGCGR 0x00
798#define TDA9874A_GCONR 0x01
799#define TDA9874A_MSR 0x02
800#define TDA9874A_C1FRA 0x03
801#define TDA9874A_C1FRB 0x04
802#define TDA9874A_C1FRC 0x05
803#define TDA9874A_C2FRA 0x06
804#define TDA9874A_C2FRB 0x07
805#define TDA9874A_C2FRC 0x08
806#define TDA9874A_DCR 0x09
807#define TDA9874A_FMER 0x0a
808#define TDA9874A_FMMR 0x0b
809#define TDA9874A_C1OLAR 0x0c
810#define TDA9874A_C2OLAR 0x0d
811#define TDA9874A_NCONR 0x0e
812#define TDA9874A_NOLAR 0x0f
813#define TDA9874A_NLELR 0x10
814#define TDA9874A_NUELR 0x11
815#define TDA9874A_AMCONR 0x12
816#define TDA9874A_SDACOSR 0x13
817#define TDA9874A_AOSR 0x14
818#define TDA9874A_DAICONR 0x15
819#define TDA9874A_I2SOSR 0x16
820#define TDA9874A_I2SOLAR 0x17
821#define TDA9874A_MDACOSR 0x18
822#define TDA9874A_ESP 0xFF
823
824
825#define TDA9874A_DSR 0x00
826#define TDA9874A_NSR 0x01
827#define TDA9874A_NECR 0x02
828#define TDA9874A_DR1 0x03
829#define TDA9874A_DR2 0x04
830#define TDA9874A_LLRA 0x05
831#define TDA9874A_LLRB 0x06
832#define TDA9874A_SIFLR 0x07
833#define TDA9874A_TR2 252
834#define TDA9874A_TR1 253
835#define TDA9874A_DIC 254
836#define TDA9874A_SIC 255
837
838
839static int tda9874a_mode = 1;
840static int tda9874a_GCONR = 0xc0;
841static int tda9874a_NCONR = 0x01;
842static int tda9874a_ESP = 0x07;
843static int tda9874a_dic = -1;
844
845
846static unsigned int tda9874a_SIF = UNSET;
847static unsigned int tda9874a_AMSEL = UNSET;
848static unsigned int tda9874a_STD = UNSET;
849module_param(tda9874a_SIF, int, 0444);
850module_param(tda9874a_AMSEL, int, 0444);
851module_param(tda9874a_STD, int, 0444);
852
853
854
855
856
857
858
859
860
861static struct tda9874a_MODES {
862 char *name;
863 audiocmd cmd;
864} tda9874a_modelist[9] = {
865 { "A2, B/G",
866 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
867 { "A2, M (Korea)",
868 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
869 { "A2, D/K (1)",
870 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
871 { "A2, D/K (2)",
872 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
873 { "A2, D/K (3)",
874 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
875 { "NICAM, I",
876 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
877 { "NICAM, B/G",
878 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
879 { "NICAM, D/K",
880 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
881 { "NICAM, L",
882 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
883};
884
885static int tda9874a_setup(struct CHIPSTATE *chip)
886{
887 struct v4l2_subdev *sd = &chip->sd;
888
889 chip_write(chip, TDA9874A_AGCGR, 0x00);
890 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
891 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
892 if(tda9874a_dic == 0x11) {
893 chip_write(chip, TDA9874A_FMMR, 0x80);
894 } else {
895 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
896 chip_write(chip, TDA9874A_FMMR, 0x00);
897 }
898 chip_write(chip, TDA9874A_C1OLAR, 0x00);
899 chip_write(chip, TDA9874A_C2OLAR, 0x00);
900 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
901 chip_write(chip, TDA9874A_NOLAR, 0x00);
902
903
904
905 chip_write(chip, TDA9874A_NLELR, 0x14);
906 chip_write(chip, TDA9874A_NUELR, 0x50);
907
908 if(tda9874a_dic == 0x11) {
909 chip_write(chip, TDA9874A_AMCONR, 0xf9);
910 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
911 chip_write(chip, TDA9874A_AOSR, 0x80);
912 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
913 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
914 } else {
915 chip_write(chip, TDA9874A_AMCONR, 0xfb);
916 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
917 chip_write(chip, TDA9874A_AOSR, 0x00);
918 }
919 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n",
920 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
921 return 1;
922}
923
924static int tda9874a_getrxsubchans(struct CHIPSTATE *chip)
925{
926 struct v4l2_subdev *sd = &chip->sd;
927 int dsr,nsr,mode;
928 int necr;
929
930 mode = V4L2_TUNER_SUB_MONO;
931
932 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
933 return mode;
934 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
935 return mode;
936 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
937 return mode;
938
939
940 chip->shadow.bytes[MAXREGS-2] = dsr;
941 chip->shadow.bytes[MAXREGS-1] = nsr;
942
943 if(tda9874a_mode) {
944
945
946
947
948
949
950
951
952 if(nsr & 0x02)
953 mode = V4L2_TUNER_SUB_STEREO;
954 if(nsr & 0x01)
955 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
956 } else {
957 if(dsr & 0x02)
958 mode = V4L2_TUNER_SUB_STEREO;
959 if(dsr & 0x04)
960 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
961 }
962
963 v4l2_dbg(1, debug, sd,
964 "tda9874a_getrxsubchans(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
965 dsr, nsr, necr, mode);
966 return mode;
967}
968
969static void tda9874a_setaudmode(struct CHIPSTATE *chip, int mode)
970{
971 struct v4l2_subdev *sd = &chip->sd;
972
973
974
975 if (tda9874a_mode) {
976 if(chip->shadow.bytes[MAXREGS-2] & 0x20)
977 tda9874a_NCONR &= 0xfe;
978 else
979 tda9874a_NCONR |= 0x01;
980 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
981 }
982
983
984
985
986
987
988
989 if(tda9874a_dic == 0x11) {
990 int aosr = 0x80;
991 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
992
993 switch(mode) {
994 case V4L2_TUNER_MODE_MONO:
995 case V4L2_TUNER_MODE_STEREO:
996 break;
997 case V4L2_TUNER_MODE_LANG1:
998 aosr = 0x80;
999 mdacosr = (tda9874a_mode) ? 0x82:0x80;
1000 break;
1001 case V4L2_TUNER_MODE_LANG2:
1002 aosr = 0xa0;
1003 mdacosr = (tda9874a_mode) ? 0x83:0x81;
1004 break;
1005 case V4L2_TUNER_MODE_LANG1_LANG2:
1006 aosr = 0x00;
1007 mdacosr = (tda9874a_mode) ? 0x82:0x80;
1008 break;
1009 default:
1010 return;
1011 }
1012 chip_write(chip, TDA9874A_AOSR, aosr);
1013 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
1014
1015 v4l2_dbg(1, debug, sd,
1016 "tda9874a_setaudmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
1017 mode, aosr, mdacosr);
1018
1019 } else {
1020 int fmmr,aosr;
1021
1022 switch(mode) {
1023 case V4L2_TUNER_MODE_MONO:
1024 fmmr = 0x00;
1025 aosr = 0x10;
1026 break;
1027 case V4L2_TUNER_MODE_STEREO:
1028 if(tda9874a_mode) {
1029 fmmr = 0x00;
1030 aosr = 0x00;
1031 } else {
1032 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04;
1033 aosr = 0x00;
1034 }
1035 break;
1036 case V4L2_TUNER_MODE_LANG1:
1037 fmmr = 0x02;
1038 aosr = 0x10;
1039 break;
1040 case V4L2_TUNER_MODE_LANG2:
1041 fmmr = 0x02;
1042 aosr = 0x20;
1043 break;
1044 case V4L2_TUNER_MODE_LANG1_LANG2:
1045 fmmr = 0x02;
1046 aosr = 0x00;
1047 break;
1048 default:
1049 return;
1050 }
1051 chip_write(chip, TDA9874A_FMMR, fmmr);
1052 chip_write(chip, TDA9874A_AOSR, aosr);
1053
1054 v4l2_dbg(1, debug, sd,
1055 "tda9874a_setaudmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1056 mode, fmmr, aosr);
1057 }
1058}
1059
1060static int tda9874a_checkit(struct CHIPSTATE *chip)
1061{
1062 struct v4l2_subdev *sd = &chip->sd;
1063 int dic,sic;
1064
1065 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
1066 return 0;
1067 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
1068 return 0;
1069
1070 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1071
1072 if((dic == 0x11)||(dic == 0x07)) {
1073 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h");
1074 tda9874a_dic = dic;
1075 return 1;
1076 }
1077 return 0;
1078}
1079
1080static int tda9874a_initialize(struct CHIPSTATE *chip)
1081{
1082 if (tda9874a_SIF > 2)
1083 tda9874a_SIF = 1;
1084 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1085 tda9874a_STD = 0;
1086 if(tda9874a_AMSEL > 1)
1087 tda9874a_AMSEL = 0;
1088
1089 if(tda9874a_SIF == 1)
1090 tda9874a_GCONR = 0xc0;
1091 else
1092 tda9874a_GCONR = 0xc1;
1093
1094 tda9874a_ESP = tda9874a_STD;
1095 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1096
1097 if(tda9874a_AMSEL == 0)
1098 tda9874a_NCONR = 0x01;
1099 else
1100 tda9874a_NCONR = 0x05;
1101
1102 tda9874a_setup(chip);
1103 return 0;
1104}
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115#define TDA9875_MUT 0x12
1116#define TDA9875_CFG 0x01
1117#define TDA9875_DACOS 0x13
1118#define TDA9875_LOSR 0x16
1119
1120#define TDA9875_CH1V 0x0c
1121#define TDA9875_CH2V 0x0d
1122#define TDA9875_SC1 0x14
1123#define TDA9875_SC2 0x15
1124
1125#define TDA9875_ADCIS 0x17
1126#define TDA9875_AER 0x19
1127#define TDA9875_MCS 0x18
1128#define TDA9875_MVL 0x1a
1129#define TDA9875_MVR 0x1b
1130#define TDA9875_MBA 0x1d
1131#define TDA9875_MTR 0x1e
1132#define TDA9875_ACS 0x1f
1133#define TDA9875_AVL 0x20
1134#define TDA9875_AVR 0x21
1135#define TDA9875_ABA 0x22
1136#define TDA9875_ATR 0x23
1137
1138#define TDA9875_MSR 0x02
1139#define TDA9875_C1MSB 0x03
1140#define TDA9875_C1MIB 0x04
1141#define TDA9875_C1LSB 0x05
1142#define TDA9875_C2MSB 0x06
1143#define TDA9875_C2MIB 0x07
1144#define TDA9875_C2LSB 0x08
1145#define TDA9875_DCR 0x09
1146#define TDA9875_DEEM 0x0a
1147#define TDA9875_FMAT 0x0b
1148
1149
1150#define TDA9875_MUTE_ON 0xff
1151#define TDA9875_MUTE_OFF 0xcc
1152
1153static int tda9875_initialize(struct CHIPSTATE *chip)
1154{
1155 chip_write(chip, TDA9875_CFG, 0xd0);
1156 chip_write(chip, TDA9875_MSR, 0x03);
1157 chip_write(chip, TDA9875_C1MSB, 0x00);
1158 chip_write(chip, TDA9875_C1MIB, 0x00);
1159 chip_write(chip, TDA9875_C1LSB, 0x00);
1160 chip_write(chip, TDA9875_C2MSB, 0x00);
1161 chip_write(chip, TDA9875_C2MIB, 0x00);
1162 chip_write(chip, TDA9875_C2LSB, 0x00);
1163 chip_write(chip, TDA9875_DCR, 0x00);
1164 chip_write(chip, TDA9875_DEEM, 0x44);
1165 chip_write(chip, TDA9875_FMAT, 0x00);
1166 chip_write(chip, TDA9875_SC1, 0x00);
1167 chip_write(chip, TDA9875_SC2, 0x01);
1168
1169 chip_write(chip, TDA9875_CH1V, 0x10);
1170 chip_write(chip, TDA9875_CH2V, 0x10);
1171 chip_write(chip, TDA9875_DACOS, 0x02);
1172 chip_write(chip, TDA9875_ADCIS, 0x6f);
1173 chip_write(chip, TDA9875_LOSR, 0x00);
1174 chip_write(chip, TDA9875_AER, 0x00);
1175 chip_write(chip, TDA9875_MCS, 0x44);
1176 chip_write(chip, TDA9875_MVL, 0x03);
1177 chip_write(chip, TDA9875_MVR, 0x03);
1178 chip_write(chip, TDA9875_MBA, 0x00);
1179 chip_write(chip, TDA9875_MTR, 0x00);
1180 chip_write(chip, TDA9875_ACS, 0x44);
1181 chip_write(chip, TDA9875_AVL, 0x00);
1182 chip_write(chip, TDA9875_AVR, 0x00);
1183 chip_write(chip, TDA9875_ABA, 0x00);
1184 chip_write(chip, TDA9875_ATR, 0x00);
1185
1186 chip_write(chip, TDA9875_MUT, 0xcc);
1187 return 0;
1188}
1189
1190static int tda9875_volume(int val) { return (unsigned char)(val / 602 - 84); }
1191static int tda9875_bass(int val) { return (unsigned char)(max(-12, val / 2115 - 15)); }
1192static int tda9875_treble(int val) { return (unsigned char)(val / 2622 - 12); }
1193
1194
1195
1196
1197
1198
1199
1200
1201static int tda9875_checkit(struct CHIPSTATE *chip)
1202{
1203 struct v4l2_subdev *sd = &chip->sd;
1204 int dic, rev;
1205
1206 dic = chip_read2(chip, 254);
1207 rev = chip_read2(chip, 255);
1208
1209 if (dic == 0 || dic == 2) {
1210 v4l2_info(sd, "found tda9875%s rev. %d.\n",
1211 dic == 0 ? "" : "A", rev);
1212 return 1;
1213 }
1214 return 0;
1215}
1216
1217
1218
1219
1220#define TEA6300_VL 0x00
1221#define TEA6300_VR 0x01
1222#define TEA6300_BA 0x02
1223#define TEA6300_TR 0x03
1224#define TEA6300_FA 0x04
1225#define TEA6300_S 0x05
1226
1227#define TEA6300_S_SA 0x01
1228#define TEA6300_S_SB 0x02
1229#define TEA6300_S_SC 0x04
1230#define TEA6300_S_GMU 0x80
1231
1232#define TEA6320_V 0x00
1233#define TEA6320_FFR 0x01
1234#define TEA6320_FFL 0x02
1235#define TEA6320_FRR 0x03
1236#define TEA6320_FRL 0x04
1237#define TEA6320_BA 0x05
1238#define TEA6320_TR 0x06
1239#define TEA6320_S 0x07
1240
1241#define TEA6320_S_SA 0x07
1242#define TEA6320_S_SB 0x06
1243#define TEA6320_S_SC 0x05
1244#define TEA6320_S_SD 0x04
1245#define TEA6320_S_GMU 0x80
1246
1247#define TEA6420_S_SA 0x00
1248#define TEA6420_S_SB 0x01
1249#define TEA6420_S_SC 0x02
1250#define TEA6420_S_SD 0x03
1251#define TEA6420_S_SE 0x04
1252#define TEA6420_S_GMU 0x05
1253
1254static int tea6300_shift10(int val) { return val >> 10; }
1255static int tea6300_shift12(int val) { return val >> 12; }
1256
1257
1258
1259static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1260static int tea6320_shift11(int val) { return val >> 11; }
1261static int tea6320_initialize(struct CHIPSTATE * chip)
1262{
1263 chip_write(chip, TEA6320_FFR, 0x3f);
1264 chip_write(chip, TEA6320_FFL, 0x3f);
1265 chip_write(chip, TEA6320_FRR, 0x3f);
1266 chip_write(chip, TEA6320_FRL, 0x3f);
1267
1268 return 0;
1269}
1270
1271
1272
1273
1274
1275#define TDA8425_VL 0x00
1276#define TDA8425_VR 0x01
1277#define TDA8425_BA 0x02
1278#define TDA8425_TR 0x03
1279#define TDA8425_S1 0x08
1280
1281#define TDA8425_S1_OFF 0xEE
1282#define TDA8425_S1_CH1 0xCE
1283#define TDA8425_S1_CH2 0xCF
1284#define TDA8425_S1_MU 0x20
1285#define TDA8425_S1_STEREO 0x18
1286#define TDA8425_S1_STEREO_SPATIAL 0x18
1287#define TDA8425_S1_STEREO_LINEAR 0x08
1288#define TDA8425_S1_STEREO_PSEUDO 0x10
1289#define TDA8425_S1_STEREO_MONO 0x00
1290#define TDA8425_S1_ML 0x06
1291#define TDA8425_S1_ML_SOUND_A 0x02
1292#define TDA8425_S1_ML_SOUND_B 0x04
1293#define TDA8425_S1_ML_STEREO 0x06
1294#define TDA8425_S1_IS 0x01
1295
1296
1297static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1298static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1299
1300static void tda8425_setaudmode(struct CHIPSTATE *chip, int mode)
1301{
1302 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1303
1304 switch (mode) {
1305 case V4L2_TUNER_MODE_LANG1:
1306 s1 |= TDA8425_S1_ML_SOUND_A;
1307 s1 |= TDA8425_S1_STEREO_PSEUDO;
1308 break;
1309 case V4L2_TUNER_MODE_LANG2:
1310 s1 |= TDA8425_S1_ML_SOUND_B;
1311 s1 |= TDA8425_S1_STEREO_PSEUDO;
1312 break;
1313 case V4L2_TUNER_MODE_LANG1_LANG2:
1314 s1 |= TDA8425_S1_ML_STEREO;
1315 s1 |= TDA8425_S1_STEREO_LINEAR;
1316 break;
1317 case V4L2_TUNER_MODE_MONO:
1318 s1 |= TDA8425_S1_ML_STEREO;
1319 s1 |= TDA8425_S1_STEREO_MONO;
1320 break;
1321 case V4L2_TUNER_MODE_STEREO:
1322 s1 |= TDA8425_S1_ML_STEREO;
1323 s1 |= TDA8425_S1_STEREO_SPATIAL;
1324 break;
1325 default:
1326 return;
1327 }
1328 chip_write(chip,TDA8425_S1,s1);
1329}
1330
1331
1332
1333
1334
1335
1336#define PIC16C54_REG_KEY_CODE 0x01
1337#define PIC16C54_REG_MISC 0x02
1338
1339
1340#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01
1341
1342#define PIC16C54_MISC_MTS_MAIN 0x02
1343#define PIC16C54_MISC_MTS_SAP 0x04
1344#define PIC16C54_MISC_MTS_BOTH 0x08
1345#define PIC16C54_MISC_SND_MUTE 0x10
1346#define PIC16C54_MISC_SND_NOTMUTE 0x20
1347#define PIC16C54_MISC_SWITCH_TUNER 0x40
1348#define PIC16C54_MISC_SWITCH_LINE 0x80
1349
1350
1351
1352
1353
1354#define TA8874Z_LED_STE 0x80
1355#define TA8874Z_LED_BIL 0x40
1356#define TA8874Z_LED_EXT 0x20
1357#define TA8874Z_MONO_SET 0x10
1358#define TA8874Z_MUTE 0x08
1359#define TA8874Z_F_MONO 0x04
1360#define TA8874Z_MODE_SUB 0x02
1361#define TA8874Z_MODE_MAIN 0x01
1362
1363
1364
1365#define TA8874Z_SEPARATION 0x3f
1366#define TA8874Z_SEPARATION_DEFAULT 0x10
1367
1368
1369#define TA8874Z_B1 0x80
1370#define TA8874Z_B0 0x40
1371#define TA8874Z_CHAG_FLAG 0x20
1372
1373
1374
1375
1376
1377
1378
1379static int ta8874z_getrxsubchans(struct CHIPSTATE *chip)
1380{
1381 int val, mode;
1382
1383 val = chip_read(chip);
1384 mode = V4L2_TUNER_SUB_MONO;
1385 if (val & TA8874Z_B1){
1386 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
1387 }else if (!(val & TA8874Z_B0)){
1388 mode = V4L2_TUNER_SUB_STEREO;
1389 }
1390
1391
1392
1393 return mode;
1394}
1395
1396static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1397static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1398static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1399static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1400static audiocmd ta8874z_both = {2, { TA8874Z_MODE_MAIN | TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1401
1402static void ta8874z_setaudmode(struct CHIPSTATE *chip, int mode)
1403{
1404 struct v4l2_subdev *sd = &chip->sd;
1405 int update = 1;
1406 audiocmd *t = NULL;
1407
1408 v4l2_dbg(1, debug, sd, "ta8874z_setaudmode(): mode: 0x%02x\n", mode);
1409
1410 switch(mode){
1411 case V4L2_TUNER_MODE_MONO:
1412 t = &ta8874z_mono;
1413 break;
1414 case V4L2_TUNER_MODE_STEREO:
1415 t = &ta8874z_stereo;
1416 break;
1417 case V4L2_TUNER_MODE_LANG1:
1418 t = &ta8874z_main;
1419 break;
1420 case V4L2_TUNER_MODE_LANG2:
1421 t = &ta8874z_sub;
1422 break;
1423 case V4L2_TUNER_MODE_LANG1_LANG2:
1424 t = &ta8874z_both;
1425 break;
1426 default:
1427 update = 0;
1428 }
1429
1430 if(update)
1431 chip_cmd(chip, "TA8874Z", t);
1432}
1433
1434static int ta8874z_checkit(struct CHIPSTATE *chip)
1435{
1436 int rc;
1437 rc = chip_read(chip);
1438 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1439}
1440
1441
1442
1443
1444
1445static int tda8425 = 1;
1446static int tda9840 = 1;
1447static int tda9850 = 1;
1448static int tda9855 = 1;
1449static int tda9873 = 1;
1450static int tda9874a = 1;
1451static int tda9875 = 1;
1452static int tea6300;
1453static int tea6320;
1454static int tea6420 = 1;
1455static int pic16c54 = 1;
1456static int ta8874z;
1457
1458module_param(tda8425, int, 0444);
1459module_param(tda9840, int, 0444);
1460module_param(tda9850, int, 0444);
1461module_param(tda9855, int, 0444);
1462module_param(tda9873, int, 0444);
1463module_param(tda9874a, int, 0444);
1464module_param(tda9875, int, 0444);
1465module_param(tea6300, int, 0444);
1466module_param(tea6320, int, 0444);
1467module_param(tea6420, int, 0444);
1468module_param(pic16c54, int, 0444);
1469module_param(ta8874z, int, 0444);
1470
1471static struct CHIPDESC chiplist[] = {
1472 {
1473 .name = "tda9840",
1474 .insmodopt = &tda9840,
1475 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1476 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1477 .registers = 5,
1478 .flags = CHIP_NEED_CHECKMODE,
1479
1480
1481 .checkit = tda9840_checkit,
1482 .getrxsubchans = tda9840_getrxsubchans,
1483 .setaudmode = tda9840_setaudmode,
1484
1485 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1486 } }
1487 },
1488 {
1489 .name = "tda9873h",
1490 .insmodopt = &tda9873,
1491 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1492 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1493 .registers = 3,
1494 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1495
1496
1497 .checkit = tda9873_checkit,
1498 .getrxsubchans = tda9873_getrxsubchans,
1499 .setaudmode = tda9873_setaudmode,
1500
1501 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1502 .inputreg = TDA9873_SW,
1503 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1504 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1505 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1506
1507 },
1508 {
1509 .name = "tda9874h/a",
1510 .insmodopt = &tda9874a,
1511 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1512 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1513 .flags = CHIP_NEED_CHECKMODE,
1514
1515
1516 .initialize = tda9874a_initialize,
1517 .checkit = tda9874a_checkit,
1518 .getrxsubchans = tda9874a_getrxsubchans,
1519 .setaudmode = tda9874a_setaudmode,
1520 },
1521 {
1522 .name = "tda9875",
1523 .insmodopt = &tda9875,
1524 .addr_lo = I2C_ADDR_TDA9875 >> 1,
1525 .addr_hi = I2C_ADDR_TDA9875 >> 1,
1526 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1527
1528
1529 .initialize = tda9875_initialize,
1530 .checkit = tda9875_checkit,
1531 .volfunc = tda9875_volume,
1532 .bassfunc = tda9875_bass,
1533 .treblefunc = tda9875_treble,
1534 .leftreg = TDA9875_MVL,
1535 .rightreg = TDA9875_MVR,
1536 .bassreg = TDA9875_MBA,
1537 .treblereg = TDA9875_MTR,
1538 .volinit = 58880,
1539 },
1540 {
1541 .name = "tda9850",
1542 .insmodopt = &tda9850,
1543 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1544 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1545 .registers = 11,
1546
1547 .getrxsubchans = tda985x_getrxsubchans,
1548 .setaudmode = tda985x_setaudmode,
1549
1550 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1551 },
1552 {
1553 .name = "tda9855",
1554 .insmodopt = &tda9855,
1555 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1556 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1557 .registers = 11,
1558 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1559
1560 .leftreg = TDA9855_VL,
1561 .rightreg = TDA9855_VR,
1562 .bassreg = TDA9855_BA,
1563 .treblereg = TDA9855_TR,
1564
1565
1566 .volfunc = tda9855_volume,
1567 .bassfunc = tda9855_bass,
1568 .treblefunc = tda9855_treble,
1569 .getrxsubchans = tda985x_getrxsubchans,
1570 .setaudmode = tda985x_setaudmode,
1571
1572 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1573 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1574 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1575 0x07, 0x10, 0x10, 0x03 }}
1576 },
1577 {
1578 .name = "tea6300",
1579 .insmodopt = &tea6300,
1580 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1581 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1582 .registers = 6,
1583 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1584
1585 .leftreg = TEA6300_VR,
1586 .rightreg = TEA6300_VL,
1587 .bassreg = TEA6300_BA,
1588 .treblereg = TEA6300_TR,
1589
1590
1591 .volfunc = tea6300_shift10,
1592 .bassfunc = tea6300_shift12,
1593 .treblefunc = tea6300_shift12,
1594
1595 .inputreg = TEA6300_S,
1596 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1597 .inputmute = TEA6300_S_GMU,
1598 },
1599 {
1600 .name = "tea6320",
1601 .insmodopt = &tea6320,
1602 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1603 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1604 .registers = 8,
1605 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1606
1607 .leftreg = TEA6320_V,
1608 .rightreg = TEA6320_V,
1609 .bassreg = TEA6320_BA,
1610 .treblereg = TEA6320_TR,
1611
1612
1613 .initialize = tea6320_initialize,
1614 .volfunc = tea6320_volume,
1615 .bassfunc = tea6320_shift11,
1616 .treblefunc = tea6320_shift11,
1617
1618 .inputreg = TEA6320_S,
1619 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1620 .inputmute = TEA6300_S_GMU,
1621 },
1622 {
1623 .name = "tea6420",
1624 .insmodopt = &tea6420,
1625 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1626 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1627 .registers = 1,
1628 .flags = CHIP_HAS_INPUTSEL,
1629
1630 .inputreg = -1,
1631 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1632 .inputmute = TEA6420_S_GMU,
1633 .inputmask = 0x07,
1634 },
1635 {
1636 .name = "tda8425",
1637 .insmodopt = &tda8425,
1638 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1639 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1640 .registers = 9,
1641 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1642
1643 .leftreg = TDA8425_VL,
1644 .rightreg = TDA8425_VR,
1645 .bassreg = TDA8425_BA,
1646 .treblereg = TDA8425_TR,
1647
1648
1649 .volfunc = tda8425_shift10,
1650 .bassfunc = tda8425_shift12,
1651 .treblefunc = tda8425_shift12,
1652 .setaudmode = tda8425_setaudmode,
1653
1654 .inputreg = TDA8425_S1,
1655 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1656 .inputmute = TDA8425_S1_OFF,
1657
1658 },
1659 {
1660 .name = "pic16c54 (PV951)",
1661 .insmodopt = &pic16c54,
1662 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1663 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1664 .registers = 2,
1665 .flags = CHIP_HAS_INPUTSEL,
1666
1667 .inputreg = PIC16C54_REG_MISC,
1668 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1669 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1670 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1671 PIC16C54_MISC_SND_MUTE},
1672 .inputmute = PIC16C54_MISC_SND_MUTE,
1673 },
1674 {
1675 .name = "ta8874z",
1676 .checkit = ta8874z_checkit,
1677 .insmodopt = &ta8874z,
1678 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1679 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1680 .registers = 2,
1681
1682
1683 .getrxsubchans = ta8874z_getrxsubchans,
1684 .setaudmode = ta8874z_setaudmode,
1685
1686 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1687 },
1688 { .name = NULL }
1689};
1690
1691
1692
1693
1694static int tvaudio_s_ctrl(struct v4l2_ctrl *ctrl)
1695{
1696 struct v4l2_subdev *sd = to_sd(ctrl);
1697 struct CHIPSTATE *chip = to_state(sd);
1698 struct CHIPDESC *desc = chip->desc;
1699
1700 switch (ctrl->id) {
1701 case V4L2_CID_AUDIO_MUTE:
1702 chip->muted = ctrl->val;
1703 if (chip->muted)
1704 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1705 else
1706 chip_write_masked(chip,desc->inputreg,
1707 desc->inputmap[chip->input],desc->inputmask);
1708 return 0;
1709 case V4L2_CID_AUDIO_VOLUME: {
1710 u32 volume, balance;
1711 u32 left, right;
1712
1713 volume = chip->volume->val;
1714 balance = chip->balance->val;
1715 left = (min(65536U - balance, 32768U) * volume) / 32768U;
1716 right = (min(balance, 32768U) * volume) / 32768U;
1717
1718 chip_write(chip, desc->leftreg, desc->volfunc(left));
1719 chip_write(chip, desc->rightreg, desc->volfunc(right));
1720 return 0;
1721 }
1722 case V4L2_CID_AUDIO_BASS:
1723 chip_write(chip, desc->bassreg, desc->bassfunc(ctrl->val));
1724 return 0;
1725 case V4L2_CID_AUDIO_TREBLE:
1726 chip_write(chip, desc->treblereg, desc->treblefunc(ctrl->val));
1727 return 0;
1728 }
1729 return -EINVAL;
1730}
1731
1732
1733
1734
1735
1736static int tvaudio_s_radio(struct v4l2_subdev *sd)
1737{
1738 struct CHIPSTATE *chip = to_state(sd);
1739
1740 chip->radio = 1;
1741
1742 return 0;
1743}
1744
1745static int tvaudio_s_routing(struct v4l2_subdev *sd,
1746 u32 input, u32 output, u32 config)
1747{
1748 struct CHIPSTATE *chip = to_state(sd);
1749 struct CHIPDESC *desc = chip->desc;
1750
1751 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1752 return 0;
1753 if (input >= 4)
1754 return -EINVAL;
1755
1756 chip->input = input;
1757 if (chip->muted)
1758 return 0;
1759 chip_write_masked(chip, desc->inputreg,
1760 desc->inputmap[chip->input], desc->inputmask);
1761 return 0;
1762}
1763
1764static int tvaudio_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *vt)
1765{
1766 struct CHIPSTATE *chip = to_state(sd);
1767 struct CHIPDESC *desc = chip->desc;
1768
1769 if (!desc->setaudmode)
1770 return 0;
1771 if (chip->radio)
1772 return 0;
1773
1774 switch (vt->audmode) {
1775 case V4L2_TUNER_MODE_MONO:
1776 case V4L2_TUNER_MODE_STEREO:
1777 case V4L2_TUNER_MODE_LANG1:
1778 case V4L2_TUNER_MODE_LANG2:
1779 case V4L2_TUNER_MODE_LANG1_LANG2:
1780 break;
1781 default:
1782 return -EINVAL;
1783 }
1784 chip->audmode = vt->audmode;
1785
1786 if (chip->thread)
1787 wake_up_process(chip->thread);
1788 else
1789 desc->setaudmode(chip, vt->audmode);
1790
1791 return 0;
1792}
1793
1794static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1795{
1796 struct CHIPSTATE *chip = to_state(sd);
1797 struct CHIPDESC *desc = chip->desc;
1798
1799 if (!desc->getrxsubchans)
1800 return 0;
1801 if (chip->radio)
1802 return 0;
1803
1804 vt->audmode = chip->audmode;
1805 vt->rxsubchans = desc->getrxsubchans(chip);
1806 vt->capability |= V4L2_TUNER_CAP_STEREO |
1807 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1808
1809 return 0;
1810}
1811
1812static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1813{
1814 struct CHIPSTATE *chip = to_state(sd);
1815
1816 chip->radio = 0;
1817 return 0;
1818}
1819
1820static int tvaudio_s_frequency(struct v4l2_subdev *sd, const struct v4l2_frequency *freq)
1821{
1822 struct CHIPSTATE *chip = to_state(sd);
1823 struct CHIPDESC *desc = chip->desc;
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833 if (chip->thread) {
1834 desc->setaudmode(chip, V4L2_TUNER_MODE_MONO);
1835 chip->prevmode = -1;
1836 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1837 }
1838 return 0;
1839}
1840
1841static int tvaudio_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1842{
1843 struct i2c_client *client = v4l2_get_subdevdata(sd);
1844
1845 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVAUDIO, 0);
1846}
1847
1848static int tvaudio_log_status(struct v4l2_subdev *sd)
1849{
1850 struct CHIPSTATE *chip = to_state(sd);
1851 struct CHIPDESC *desc = chip->desc;
1852
1853 v4l2_info(sd, "Chip: %s\n", desc->name);
1854 v4l2_ctrl_handler_log_status(&chip->hdl, sd->name);
1855 return 0;
1856}
1857
1858
1859
1860static const struct v4l2_ctrl_ops tvaudio_ctrl_ops = {
1861 .s_ctrl = tvaudio_s_ctrl,
1862};
1863
1864static const struct v4l2_subdev_core_ops tvaudio_core_ops = {
1865 .log_status = tvaudio_log_status,
1866 .g_chip_ident = tvaudio_g_chip_ident,
1867 .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
1868 .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
1869 .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
1870 .g_ctrl = v4l2_subdev_g_ctrl,
1871 .s_ctrl = v4l2_subdev_s_ctrl,
1872 .queryctrl = v4l2_subdev_queryctrl,
1873 .querymenu = v4l2_subdev_querymenu,
1874 .s_std = tvaudio_s_std,
1875};
1876
1877static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = {
1878 .s_radio = tvaudio_s_radio,
1879 .s_frequency = tvaudio_s_frequency,
1880 .s_tuner = tvaudio_s_tuner,
1881 .g_tuner = tvaudio_g_tuner,
1882};
1883
1884static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = {
1885 .s_routing = tvaudio_s_routing,
1886};
1887
1888static const struct v4l2_subdev_ops tvaudio_ops = {
1889 .core = &tvaudio_core_ops,
1890 .tuner = &tvaudio_tuner_ops,
1891 .audio = &tvaudio_audio_ops,
1892};
1893
1894
1895
1896
1897
1898
1899static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id)
1900{
1901 struct CHIPSTATE *chip;
1902 struct CHIPDESC *desc;
1903 struct v4l2_subdev *sd;
1904
1905 if (debug) {
1906 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1907 printk(KERN_INFO "tvaudio: known chips: ");
1908 for (desc = chiplist; desc->name != NULL; desc++)
1909 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1910 printk("\n");
1911 }
1912
1913 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1914 if (!chip)
1915 return -ENOMEM;
1916 sd = &chip->sd;
1917 v4l2_i2c_subdev_init(sd, client, &tvaudio_ops);
1918
1919
1920 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1);
1921 for (desc = chiplist; desc->name != NULL; desc++) {
1922 if (0 == *(desc->insmodopt))
1923 continue;
1924 if (client->addr < desc->addr_lo ||
1925 client->addr > desc->addr_hi)
1926 continue;
1927 if (desc->checkit && !desc->checkit(chip))
1928 continue;
1929 break;
1930 }
1931 if (desc->name == NULL) {
1932 v4l2_dbg(1, debug, sd, "no matching chip description found\n");
1933 kfree(chip);
1934 return -EIO;
1935 }
1936 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1937 if (desc->flags) {
1938 v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n",
1939 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1940 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1941 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1942 }
1943
1944
1945 if (!id)
1946 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1947 chip->desc = desc;
1948 chip->shadow.count = desc->registers+1;
1949 chip->prevmode = -1;
1950 chip->audmode = V4L2_TUNER_MODE_LANG1;
1951
1952
1953 if (desc->initialize != NULL)
1954 desc->initialize(chip);
1955 else
1956 chip_cmd(chip, "init", &desc->init);
1957
1958 v4l2_ctrl_handler_init(&chip->hdl, 5);
1959 if (desc->flags & CHIP_HAS_INPUTSEL)
1960 v4l2_ctrl_new_std(&chip->hdl, &tvaudio_ctrl_ops,
1961 V4L2_CID_AUDIO_MUTE, 0, 1, 1, 0);
1962 if (desc->flags & CHIP_HAS_VOLUME) {
1963 if (!desc->volfunc) {
1964
1965
1966
1967 v4l2_info(sd, "volume callback undefined!\n");
1968 desc->flags &= ~CHIP_HAS_VOLUME;
1969 } else {
1970 chip->volume = v4l2_ctrl_new_std(&chip->hdl,
1971 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_VOLUME,
1972 0, 65535, 65535 / 100,
1973 desc->volinit ? desc->volinit : 65535);
1974 chip->balance = v4l2_ctrl_new_std(&chip->hdl,
1975 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_BALANCE,
1976 0, 65535, 65535 / 100, 32768);
1977 v4l2_ctrl_cluster(2, &chip->volume);
1978 }
1979 }
1980 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1981 if (!desc->bassfunc || !desc->treblefunc) {
1982
1983
1984
1985 v4l2_info(sd, "bass/treble callbacks undefined!\n");
1986 desc->flags &= ~CHIP_HAS_BASSTREBLE;
1987 } else {
1988 v4l2_ctrl_new_std(&chip->hdl,
1989 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_BASS,
1990 0, 65535, 65535 / 100,
1991 desc->bassinit ? desc->bassinit : 32768);
1992 v4l2_ctrl_new_std(&chip->hdl,
1993 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_TREBLE,
1994 0, 65535, 65535 / 100,
1995 desc->trebleinit ? desc->trebleinit : 32768);
1996 }
1997 }
1998
1999 sd->ctrl_handler = &chip->hdl;
2000 if (chip->hdl.error) {
2001 int err = chip->hdl.error;
2002
2003 v4l2_ctrl_handler_free(&chip->hdl);
2004 kfree(chip);
2005 return err;
2006 }
2007
2008 v4l2_ctrl_handler_setup(&chip->hdl);
2009
2010 chip->thread = NULL;
2011 init_timer(&chip->wt);
2012 if (desc->flags & CHIP_NEED_CHECKMODE) {
2013 if (!desc->getrxsubchans || !desc->setaudmode) {
2014
2015
2016
2017 v4l2_info(sd, "set/get mode callbacks undefined!\n");
2018 return 0;
2019 }
2020
2021 chip->wt.function = chip_thread_wake;
2022 chip->wt.data = (unsigned long)chip;
2023 chip->thread = kthread_run(chip_thread, chip, client->name);
2024 if (IS_ERR(chip->thread)) {
2025 v4l2_warn(sd, "failed to create kthread\n");
2026 chip->thread = NULL;
2027 }
2028 }
2029 return 0;
2030}
2031
2032static int tvaudio_remove(struct i2c_client *client)
2033{
2034 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2035 struct CHIPSTATE *chip = to_state(sd);
2036
2037 del_timer_sync(&chip->wt);
2038 if (chip->thread) {
2039
2040 kthread_stop(chip->thread);
2041 chip->thread = NULL;
2042 }
2043
2044 v4l2_device_unregister_subdev(sd);
2045 v4l2_ctrl_handler_free(&chip->hdl);
2046 kfree(chip);
2047 return 0;
2048}
2049
2050
2051
2052
2053static const struct i2c_device_id tvaudio_id[] = {
2054 { "tvaudio", 0 },
2055 { }
2056};
2057MODULE_DEVICE_TABLE(i2c, tvaudio_id);
2058
2059static struct i2c_driver tvaudio_driver = {
2060 .driver = {
2061 .owner = THIS_MODULE,
2062 .name = "tvaudio",
2063 },
2064 .probe = tvaudio_probe,
2065 .remove = tvaudio_remove,
2066 .id_table = tvaudio_id,
2067};
2068
2069module_i2c_driver(tvaudio_driver);
2070