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28#include <linux/types.h>
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/init.h>
32#include <linux/videodev2.h>
33#include <linux/kmod.h>
34#include <linux/pci.h>
35#include <linux/interrupt.h>
36#include <linux/io.h>
37#include <linux/gpio.h>
38#include <linux/i2c.h>
39#include <linux/delay.h>
40#include <media/v4l2-common.h>
41#include <media/v4l2-device.h>
42#include <media/v4l2-ctrls.h>
43#include <media/v4l2-ioctl.h>
44#include <media/v4l2-fh.h>
45#include <media/v4l2-event.h>
46#include <media/videobuf2-dma-contig.h>
47
48#include "sta2x11_vip.h"
49
50#define DRV_VERSION "1.3"
51
52#ifndef PCI_DEVICE_ID_STMICRO_VIP
53#define PCI_DEVICE_ID_STMICRO_VIP 0xCC0D
54#endif
55
56#define MAX_FRAMES 4
57
58
59#define DVP_CTL 0x00
60#define DVP_TFO 0x04
61#define DVP_TFS 0x08
62#define DVP_BFO 0x0C
63#define DVP_BFS 0x10
64#define DVP_VTP 0x14
65#define DVP_VBP 0x18
66#define DVP_VMP 0x1C
67#define DVP_ITM 0x98
68#define DVP_ITS 0x9C
69#define DVP_STA 0xA0
70#define DVP_HLFLN 0xA8
71#define DVP_RGB 0xC0
72#define DVP_PKZ 0xF0
73
74
75#define DVP_CTL_ENA 0x00000001
76#define DVP_CTL_RST 0x80000000
77#define DVP_CTL_DIS (~0x00040001)
78
79#define DVP_IT_VSB 0x00000008
80#define DVP_IT_VST 0x00000010
81#define DVP_IT_FIFO 0x00000020
82
83#define DVP_HLFLN_SD 0x00000001
84
85#define SAVE_COUNT 8
86#define AUX_COUNT 3
87#define IRQ_COUNT 1
88
89
90struct vip_buffer {
91 struct vb2_buffer vb;
92 struct list_head list;
93 dma_addr_t dma;
94};
95static inline struct vip_buffer *to_vip_buffer(struct vb2_buffer *vb2)
96{
97 return container_of(vb2, struct vip_buffer, vb);
98}
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128struct sta2x11_vip {
129 struct v4l2_device v4l2_dev;
130 struct video_device *video_dev;
131 struct pci_dev *pdev;
132 struct i2c_adapter *adapter;
133 unsigned int register_save_area[IRQ_COUNT + SAVE_COUNT + AUX_COUNT];
134 struct v4l2_subdev *decoder;
135 struct v4l2_ctrl_handler ctrl_hdl;
136
137
138 struct v4l2_pix_format format;
139 v4l2_std_id std;
140 unsigned int input;
141 int disabled;
142 spinlock_t slock;
143
144 struct vb2_alloc_ctx *alloc_ctx;
145 struct vb2_queue vb_vidq;
146 struct list_head buffer_list;
147 unsigned int sequence;
148 struct vip_buffer *active;
149 spinlock_t lock;
150
151
152 int tcount, bcount;
153 int overflow;
154
155 void *iomem;
156 struct vip_config *config;
157};
158
159static const unsigned int registers_to_save[AUX_COUNT] = {
160 DVP_HLFLN, DVP_RGB, DVP_PKZ
161};
162
163static struct v4l2_pix_format formats_50[] = {
164 {
165 .width = 720,
166 .height = 576,
167 .pixelformat = V4L2_PIX_FMT_UYVY,
168 .field = V4L2_FIELD_INTERLACED,
169 .bytesperline = 720 * 2,
170 .sizeimage = 720 * 2 * 576,
171 .colorspace = V4L2_COLORSPACE_SMPTE170M},
172 {
173 .width = 720,
174 .height = 288,
175 .pixelformat = V4L2_PIX_FMT_UYVY,
176 .field = V4L2_FIELD_TOP,
177 .bytesperline = 720 * 2,
178 .sizeimage = 720 * 2 * 288,
179 .colorspace = V4L2_COLORSPACE_SMPTE170M},
180 {
181 .width = 720,
182 .height = 288,
183 .pixelformat = V4L2_PIX_FMT_UYVY,
184 .field = V4L2_FIELD_BOTTOM,
185 .bytesperline = 720 * 2,
186 .sizeimage = 720 * 2 * 288,
187 .colorspace = V4L2_COLORSPACE_SMPTE170M},
188
189};
190
191static struct v4l2_pix_format formats_60[] = {
192 {
193 .width = 720,
194 .height = 480,
195 .pixelformat = V4L2_PIX_FMT_UYVY,
196 .field = V4L2_FIELD_INTERLACED,
197 .bytesperline = 720 * 2,
198 .sizeimage = 720 * 2 * 480,
199 .colorspace = V4L2_COLORSPACE_SMPTE170M},
200 {
201 .width = 720,
202 .height = 240,
203 .pixelformat = V4L2_PIX_FMT_UYVY,
204 .field = V4L2_FIELD_TOP,
205 .bytesperline = 720 * 2,
206 .sizeimage = 720 * 2 * 240,
207 .colorspace = V4L2_COLORSPACE_SMPTE170M},
208 {
209 .width = 720,
210 .height = 240,
211 .pixelformat = V4L2_PIX_FMT_UYVY,
212 .field = V4L2_FIELD_BOTTOM,
213 .bytesperline = 720 * 2,
214 .sizeimage = 720 * 2 * 240,
215 .colorspace = V4L2_COLORSPACE_SMPTE170M},
216};
217
218
219static inline void reg_write(struct sta2x11_vip *vip, unsigned int reg, u32 val)
220{
221 iowrite32((val), (vip->iomem)+(reg));
222}
223
224static inline u32 reg_read(struct sta2x11_vip *vip, unsigned int reg)
225{
226 return ioread32((vip->iomem)+(reg));
227}
228
229static void start_dma(struct sta2x11_vip *vip, struct vip_buffer *vip_buf)
230{
231 unsigned long offset = 0;
232
233 if (vip->format.field == V4L2_FIELD_INTERLACED)
234 offset = vip->format.width * 2;
235
236 spin_lock_irq(&vip->slock);
237
238 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) | DVP_CTL_ENA);
239
240 reg_write(vip, DVP_VTP, (u32)vip_buf->dma);
241 reg_write(vip, DVP_VBP, (u32)vip_buf->dma + offset);
242 spin_unlock_irq(&vip->slock);
243}
244
245
246static void vip_active_buf_next(struct sta2x11_vip *vip)
247{
248
249 spin_lock(&vip->lock);
250 if (list_empty(&vip->buffer_list)) {
251 spin_unlock(&vip->lock);
252 return;
253 }
254 vip->active = list_first_entry(&vip->buffer_list,
255 struct vip_buffer,
256 list);
257
258 vip->tcount = 0;
259 vip->bcount = 0;
260 spin_unlock(&vip->lock);
261 if (vb2_is_streaming(&vip->vb_vidq)) {
262 start_dma(vip, vip->active);
263 }
264}
265
266
267
268static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
269 unsigned int *nbuffers, unsigned int *nplanes,
270 unsigned int sizes[], void *alloc_ctxs[])
271{
272 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
273
274 if (!(*nbuffers) || *nbuffers < MAX_FRAMES)
275 *nbuffers = MAX_FRAMES;
276
277 *nplanes = 1;
278 sizes[0] = vip->format.sizeimage;
279 alloc_ctxs[0] = vip->alloc_ctx;
280
281 vip->sequence = 0;
282 vip->active = NULL;
283 vip->tcount = 0;
284 vip->bcount = 0;
285
286 return 0;
287};
288static int buffer_init(struct vb2_buffer *vb)
289{
290 struct vip_buffer *vip_buf = to_vip_buffer(vb);
291
292 vip_buf->dma = vb2_dma_contig_plane_dma_addr(vb, 0);
293 INIT_LIST_HEAD(&vip_buf->list);
294 return 0;
295}
296
297static int buffer_prepare(struct vb2_buffer *vb)
298{
299 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
300 struct vip_buffer *vip_buf = to_vip_buffer(vb);
301 unsigned long size;
302
303 size = vip->format.sizeimage;
304 if (vb2_plane_size(vb, 0) < size) {
305 v4l2_err(&vip->v4l2_dev, "buffer too small (%lu < %lu)\n",
306 vb2_plane_size(vb, 0), size);
307 return -EINVAL;
308 }
309
310 vb2_set_plane_payload(&vip_buf->vb, 0, size);
311
312 return 0;
313}
314static void buffer_queue(struct vb2_buffer *vb)
315{
316 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
317 struct vip_buffer *vip_buf = to_vip_buffer(vb);
318
319 spin_lock(&vip->lock);
320 list_add_tail(&vip_buf->list, &vip->buffer_list);
321 if (!vip->active) {
322 vip->active = list_first_entry(&vip->buffer_list,
323 struct vip_buffer,
324 list);
325 if (vb2_is_streaming(&vip->vb_vidq))
326 start_dma(vip, vip_buf);
327 }
328 spin_unlock(&vip->lock);
329}
330static int buffer_finish(struct vb2_buffer *vb)
331{
332 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
333 struct vip_buffer *vip_buf = to_vip_buffer(vb);
334
335
336 spin_lock(&vip->lock);
337 list_del_init(&vip_buf->list);
338 spin_unlock(&vip->lock);
339
340 vip_active_buf_next(vip);
341
342 return 0;
343}
344
345static int start_streaming(struct vb2_queue *vq, unsigned int count)
346{
347 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
348
349 spin_lock_irq(&vip->slock);
350
351 reg_write(vip, DVP_ITM, DVP_IT_VSB | DVP_IT_VST);
352 spin_unlock_irq(&vip->slock);
353
354 if (count)
355 start_dma(vip, vip->active);
356
357 return 0;
358}
359
360
361static int stop_streaming(struct vb2_queue *vq)
362{
363 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
364 struct vip_buffer *vip_buf, *node;
365
366
367 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
368
369 reg_write(vip, DVP_ITM, 0);
370
371
372 spin_lock(&vip->lock);
373 list_for_each_entry_safe(vip_buf, node, &vip->buffer_list, list) {
374 vb2_buffer_done(&vip_buf->vb, VB2_BUF_STATE_ERROR);
375 list_del(&vip_buf->list);
376 }
377 spin_unlock(&vip->lock);
378 return 0;
379}
380
381static struct vb2_ops vip_video_qops = {
382 .queue_setup = queue_setup,
383 .buf_init = buffer_init,
384 .buf_prepare = buffer_prepare,
385 .buf_finish = buffer_finish,
386 .buf_queue = buffer_queue,
387 .start_streaming = start_streaming,
388 .stop_streaming = stop_streaming,
389};
390
391
392
393static const struct v4l2_file_operations vip_fops = {
394 .owner = THIS_MODULE,
395 .open = v4l2_fh_open,
396 .release = vb2_fop_release,
397 .unlocked_ioctl = video_ioctl2,
398 .read = vb2_fop_read,
399 .mmap = vb2_fop_mmap,
400 .poll = vb2_fop_poll
401};
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412
413static int vidioc_querycap(struct file *file, void *priv,
414 struct v4l2_capability *cap)
415{
416 struct sta2x11_vip *vip = video_drvdata(file);
417
418 strcpy(cap->driver, KBUILD_MODNAME);
419 strcpy(cap->card, KBUILD_MODNAME);
420 snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s",
421 pci_name(vip->pdev));
422 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
423 V4L2_CAP_STREAMING;
424 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
425
426 return 0;
427}
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441
442static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id std)
443{
444 struct sta2x11_vip *vip = video_drvdata(file);
445 v4l2_std_id oldstd = vip->std, newstd;
446 int status;
447
448 if (V4L2_STD_ALL == std) {
449 v4l2_subdev_call(vip->decoder, core, s_std, std);
450 ssleep(2);
451 v4l2_subdev_call(vip->decoder, video, querystd, &newstd);
452 v4l2_subdev_call(vip->decoder, video, g_input_status, &status);
453 if (status & V4L2_IN_ST_NO_SIGNAL)
454 return -EIO;
455 std = vip->std = newstd;
456 if (oldstd != std) {
457 if (V4L2_STD_525_60 & std)
458 vip->format = formats_60[0];
459 else
460 vip->format = formats_50[0];
461 }
462 return 0;
463 }
464
465 if (oldstd != std) {
466 if (V4L2_STD_525_60 & std)
467 vip->format = formats_60[0];
468 else
469 vip->format = formats_50[0];
470 }
471
472 return v4l2_subdev_call(vip->decoder, core, s_std, std);
473}
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484static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *std)
485{
486 struct sta2x11_vip *vip = video_drvdata(file);
487
488 *std = vip->std;
489 return 0;
490}
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501static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *std)
502{
503 struct sta2x11_vip *vip = video_drvdata(file);
504
505 return v4l2_subdev_call(vip->decoder, video, querystd, std);
506}
507
508static int vidioc_enum_input(struct file *file, void *priv,
509 struct v4l2_input *inp)
510{
511 if (inp->index > 1)
512 return -EINVAL;
513
514 inp->type = V4L2_INPUT_TYPE_CAMERA;
515 inp->std = V4L2_STD_ALL;
516 sprintf(inp->name, "Camera %u", inp->index);
517
518 return 0;
519}
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531
532static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
533{
534 struct sta2x11_vip *vip = video_drvdata(file);
535 int ret;
536
537 if (i > 1)
538 return -EINVAL;
539 ret = v4l2_subdev_call(vip->decoder, video, s_routing, i, 0, 0);
540
541 if (!ret)
542 vip->input = i;
543
544 return 0;
545}
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556static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
557{
558 struct sta2x11_vip *vip = video_drvdata(file);
559
560 *i = vip->input;
561 return 0;
562}
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572
573static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
574 struct v4l2_fmtdesc *f)
575{
576
577 if (f->index != 0)
578 return -EINVAL;
579
580 strcpy(f->description, "4:2:2, packed, UYVY");
581 f->pixelformat = V4L2_PIX_FMT_UYVY;
582 f->flags = 0;
583 return 0;
584}
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601static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
602 struct v4l2_format *f)
603{
604 struct sta2x11_vip *vip = video_drvdata(file);
605 int interlace_lim;
606
607 if (V4L2_PIX_FMT_UYVY != f->fmt.pix.pixelformat) {
608 v4l2_warn(&vip->v4l2_dev, "Invalid format, only UYVY supported\n");
609 return -EINVAL;
610 }
611
612 if (V4L2_STD_525_60 & vip->std)
613 interlace_lim = 240;
614 else
615 interlace_lim = 288;
616
617 switch (f->fmt.pix.field) {
618 default:
619 case V4L2_FIELD_ANY:
620 if (interlace_lim < f->fmt.pix.height)
621 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
622 else
623 f->fmt.pix.field = V4L2_FIELD_BOTTOM;
624 break;
625 case V4L2_FIELD_TOP:
626 case V4L2_FIELD_BOTTOM:
627 if (interlace_lim < f->fmt.pix.height)
628 f->fmt.pix.height = interlace_lim;
629 break;
630 case V4L2_FIELD_INTERLACED:
631 break;
632 }
633
634
635 f->fmt.pix.pixelformat = V4L2_PIX_FMT_UYVY;
636 f->fmt.pix.height &= ~1;
637 if (2 * interlace_lim < f->fmt.pix.height)
638 f->fmt.pix.height = 2 * interlace_lim;
639 if (200 > f->fmt.pix.height)
640 f->fmt.pix.height = 200;
641 f->fmt.pix.width = 720;
642 f->fmt.pix.bytesperline = f->fmt.pix.width * 2;
643 f->fmt.pix.sizeimage = f->fmt.pix.width * 2 * f->fmt.pix.height;
644 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
645 f->fmt.pix.priv = 0;
646 return 0;
647}
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658
659static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
660 struct v4l2_format *f)
661{
662 struct sta2x11_vip *vip = video_drvdata(file);
663 unsigned int t_stop, b_stop, pitch;
664 int ret;
665
666 ret = vidioc_try_fmt_vid_cap(file, priv, f);
667 if (ret)
668 return ret;
669
670 if (vb2_is_busy(&vip->vb_vidq)) {
671
672 v4l2_err(&vip->v4l2_dev, "device busy\n");
673 return -EBUSY;
674 }
675 vip->format = f->fmt.pix;
676 switch (vip->format.field) {
677 case V4L2_FIELD_INTERLACED:
678 t_stop = ((vip->format.height / 2 - 1) << 16) |
679 (2 * vip->format.width - 1);
680 b_stop = t_stop;
681 pitch = 4 * vip->format.width;
682 break;
683 case V4L2_FIELD_TOP:
684 t_stop = ((vip->format.height - 1) << 16) |
685 (2 * vip->format.width - 1);
686 b_stop = (0 << 16) | (2 * vip->format.width - 1);
687 pitch = 2 * vip->format.width;
688 break;
689 case V4L2_FIELD_BOTTOM:
690 t_stop = (0 << 16) | (2 * vip->format.width - 1);
691 b_stop = (vip->format.height << 16) |
692 (2 * vip->format.width - 1);
693 pitch = 2 * vip->format.width;
694 break;
695 default:
696 v4l2_err(&vip->v4l2_dev, "unknown field format\n");
697 return -EINVAL;
698 }
699
700 spin_lock_irq(&vip->slock);
701
702 reg_write(vip, DVP_TFO, 0);
703
704 reg_write(vip, DVP_BFO, 0);
705
706 reg_write(vip, DVP_TFS, t_stop);
707
708 reg_write(vip, DVP_BFS, b_stop);
709
710 reg_write(vip, DVP_VMP, pitch);
711 spin_unlock_irq(&vip->slock);
712
713 return 0;
714}
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724
725static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
726 struct v4l2_format *f)
727{
728 struct sta2x11_vip *vip = video_drvdata(file);
729
730 f->fmt.pix = vip->format;
731
732 return 0;
733}
734
735static const struct v4l2_ioctl_ops vip_ioctl_ops = {
736 .vidioc_querycap = vidioc_querycap,
737
738 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
739 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
740 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
741 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
742
743 .vidioc_create_bufs = vb2_ioctl_create_bufs,
744 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
745 .vidioc_reqbufs = vb2_ioctl_reqbufs,
746 .vidioc_querybuf = vb2_ioctl_querybuf,
747 .vidioc_qbuf = vb2_ioctl_qbuf,
748 .vidioc_dqbuf = vb2_ioctl_dqbuf,
749
750 .vidioc_streamon = vb2_ioctl_streamon,
751 .vidioc_streamoff = vb2_ioctl_streamoff,
752
753 .vidioc_g_std = vidioc_g_std,
754 .vidioc_s_std = vidioc_s_std,
755 .vidioc_querystd = vidioc_querystd,
756
757 .vidioc_enum_input = vidioc_enum_input,
758 .vidioc_g_input = vidioc_g_input,
759 .vidioc_s_input = vidioc_s_input,
760
761 .vidioc_log_status = v4l2_ctrl_log_status,
762
763 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
764 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
765};
766
767static struct video_device video_dev_template = {
768 .name = KBUILD_MODNAME,
769 .release = video_device_release,
770 .fops = &vip_fops,
771 .ioctl_ops = &vip_ioctl_ops,
772 .tvnorms = V4L2_STD_ALL,
773};
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787
788static irqreturn_t vip_irq(int irq, struct sta2x11_vip *vip)
789{
790 unsigned int status;
791
792 status = reg_read(vip, DVP_ITS);
793
794 if (!status)
795 return IRQ_NONE;
796
797 if (status & DVP_IT_FIFO)
798 if (vip->overflow++ > 5)
799 pr_info("VIP: fifo overflow\n");
800
801 if ((status & DVP_IT_VST) && (status & DVP_IT_VSB)) {
802
803
804 return IRQ_HANDLED;
805 }
806
807 if (status & DVP_IT_VST)
808 if ((++vip->tcount) < 2)
809 return IRQ_HANDLED;
810 if (status & DVP_IT_VSB) {
811 vip->bcount++;
812 return IRQ_HANDLED;
813 }
814
815 if (vip->active) {
816
817 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
818
819 do_gettimeofday(&vip->active->vb.v4l2_buf.timestamp);
820 vip->active->vb.v4l2_buf.sequence = vip->sequence++;
821 vb2_buffer_done(&vip->active->vb, VB2_BUF_STATE_DONE);
822 }
823
824 return IRQ_HANDLED;
825}
826
827static void sta2x11_vip_init_register(struct sta2x11_vip *vip)
828{
829
830 spin_lock_irq(&vip->slock);
831
832 reg_read(vip, DVP_ITS);
833
834 reg_write(vip, DVP_HLFLN, DVP_HLFLN_SD);
835
836 reg_write(vip, DVP_CTL, DVP_CTL_RST);
837
838 reg_write(vip, DVP_CTL, 0);
839 spin_unlock_irq(&vip->slock);
840}
841static void sta2x11_vip_clear_register(struct sta2x11_vip *vip)
842{
843 spin_lock_irq(&vip->slock);
844
845 reg_write(vip, DVP_ITM, 0);
846
847 reg_write(vip, DVP_CTL, DVP_CTL_RST);
848
849 reg_write(vip, DVP_CTL, 0);
850
851 reg_read(vip, DVP_ITS);
852 spin_unlock_irq(&vip->slock);
853}
854static int sta2x11_vip_init_buffer(struct sta2x11_vip *vip)
855{
856 int err;
857
858 err = dma_set_coherent_mask(&vip->pdev->dev, DMA_BIT_MASK(29));
859 if (err) {
860 v4l2_err(&vip->v4l2_dev, "Cannot configure coherent mask");
861 return err;
862 }
863 memset(&vip->vb_vidq, 0, sizeof(struct vb2_queue));
864 vip->vb_vidq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
865 vip->vb_vidq.io_modes = VB2_MMAP | VB2_READ;
866 vip->vb_vidq.drv_priv = vip;
867 vip->vb_vidq.buf_struct_size = sizeof(struct vip_buffer);
868 vip->vb_vidq.ops = &vip_video_qops;
869 vip->vb_vidq.mem_ops = &vb2_dma_contig_memops;
870 err = vb2_queue_init(&vip->vb_vidq);
871 if (err)
872 return err;
873 INIT_LIST_HEAD(&vip->buffer_list);
874 spin_lock_init(&vip->lock);
875
876
877 vip->alloc_ctx = vb2_dma_contig_init_ctx(&vip->pdev->dev);
878 if (IS_ERR(vip->alloc_ctx)) {
879 v4l2_err(&vip->v4l2_dev, "Can't allocate buffer context");
880 return PTR_ERR(vip->alloc_ctx);
881 }
882
883 return 0;
884}
885static void sta2x11_vip_release_buffer(struct sta2x11_vip *vip)
886{
887 vb2_dma_contig_cleanup_ctx(vip->alloc_ctx);
888}
889static int sta2x11_vip_init_controls(struct sta2x11_vip *vip)
890{
891
892
893
894
895 v4l2_ctrl_handler_init(&vip->ctrl_hdl, 0);
896
897 vip->v4l2_dev.ctrl_handler = &vip->ctrl_hdl;
898 if (vip->ctrl_hdl.error) {
899 int err = vip->ctrl_hdl.error;
900
901 v4l2_ctrl_handler_free(&vip->ctrl_hdl);
902 return err;
903 }
904
905 return 0;
906}
907
908
909
910
911
912
913
914
915
916static int vip_gpio_reserve(struct device *dev, int pin, int dir,
917 const char *name)
918{
919 int ret;
920
921 if (pin == -1)
922 return 0;
923
924 ret = gpio_request(pin, name);
925 if (ret) {
926 dev_err(dev, "Failed to allocate pin %d (%s)\n", pin, name);
927 return ret;
928 }
929
930 ret = gpio_direction_output(pin, dir);
931 if (ret) {
932 dev_err(dev, "Failed to set direction for pin %d (%s)\n",
933 pin, name);
934 gpio_free(pin);
935 return ret;
936 }
937
938 ret = gpio_export(pin, false);
939 if (ret) {
940 dev_err(dev, "Failed to export pin %d (%s)\n", pin, name);
941 gpio_free(pin);
942 return ret;
943 }
944
945 return 0;
946}
947
948
949
950
951
952
953
954
955static void vip_gpio_release(struct device *dev, int pin, const char *name)
956{
957 if (pin != -1) {
958 dev_dbg(dev, "releasing pin %d (%s)\n", pin, name);
959 gpio_unexport(pin);
960 gpio_free(pin);
961 }
962}
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983static int sta2x11_vip_init_one(struct pci_dev *pdev,
984 const struct pci_device_id *ent)
985{
986 int ret;
987 struct sta2x11_vip *vip;
988 struct vip_config *config;
989
990
991 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(26))) {
992 dev_err(&pdev->dev, "26-bit DMA addressing not available\n");
993 return -EINVAL;
994 }
995
996 ret = pci_enable_device(pdev);
997 if (ret)
998 return ret;
999
1000
1001 config = dev_get_platdata(&pdev->dev);
1002 if (!config) {
1003 dev_info(&pdev->dev, "VIP slot disabled\n");
1004 ret = -EINVAL;
1005 goto disable;
1006 }
1007
1008
1009 ret = vip_gpio_reserve(&pdev->dev, config->pwr_pin, 0,
1010 config->pwr_name);
1011 if (ret)
1012 goto disable;
1013
1014 if (config->reset_pin >= 0) {
1015 ret = vip_gpio_reserve(&pdev->dev, config->reset_pin, 0,
1016 config->reset_name);
1017 if (ret) {
1018 vip_gpio_release(&pdev->dev, config->pwr_pin,
1019 config->pwr_name);
1020 goto disable;
1021 }
1022 }
1023 if (config->pwr_pin != -1) {
1024
1025 usleep_range(5000, 25000);
1026 ret = gpio_direction_output(config->pwr_pin, 1);
1027 }
1028
1029 if (config->reset_pin != -1) {
1030
1031 usleep_range(5000, 25000);
1032 ret = gpio_direction_output(config->reset_pin, 1);
1033 }
1034 usleep_range(5000, 25000);
1035
1036
1037 vip = kzalloc(sizeof(struct sta2x11_vip), GFP_KERNEL);
1038 if (!vip) {
1039 ret = -ENOMEM;
1040 goto release_gpios;
1041 }
1042 vip->pdev = pdev;
1043 vip->std = V4L2_STD_PAL;
1044 vip->format = formats_50[0];
1045 vip->config = config;
1046
1047 ret = sta2x11_vip_init_controls(vip);
1048 if (ret)
1049 goto free_mem;
1050 if (v4l2_device_register(&pdev->dev, &vip->v4l2_dev))
1051 goto free_mem;
1052
1053 dev_dbg(&pdev->dev, "BAR #0 at 0x%lx 0x%lx irq %d\n",
1054 (unsigned long)pci_resource_start(pdev, 0),
1055 (unsigned long)pci_resource_len(pdev, 0), pdev->irq);
1056
1057 pci_set_master(pdev);
1058
1059 ret = pci_request_regions(pdev, KBUILD_MODNAME);
1060 if (ret)
1061 goto unreg;
1062
1063 vip->iomem = pci_iomap(pdev, 0, 0x100);
1064 if (!vip->iomem) {
1065 ret = -ENOMEM;
1066 goto release;
1067 }
1068
1069 pci_enable_msi(pdev);
1070
1071
1072 ret = sta2x11_vip_init_buffer(vip);
1073 if (ret)
1074 goto unmap;
1075
1076 spin_lock_init(&vip->slock);
1077
1078 ret = request_irq(pdev->irq,
1079 (irq_handler_t) vip_irq,
1080 IRQF_SHARED, KBUILD_MODNAME, vip);
1081 if (ret) {
1082 dev_err(&pdev->dev, "request_irq failed\n");
1083 ret = -ENODEV;
1084 goto release_buf;
1085 }
1086
1087
1088 vip->video_dev = video_device_alloc();
1089 if (!vip->video_dev) {
1090 ret = -ENOMEM;
1091 goto release_irq;
1092 }
1093
1094 vip->video_dev = &video_dev_template;
1095 vip->video_dev->v4l2_dev = &vip->v4l2_dev;
1096 vip->video_dev->queue = &vip->vb_vidq;
1097 set_bit(V4L2_FL_USE_FH_PRIO, &vip->video_dev->flags);
1098 video_set_drvdata(vip->video_dev, vip);
1099
1100 ret = video_register_device(vip->video_dev, VFL_TYPE_GRABBER, -1);
1101 if (ret)
1102 goto vrelease;
1103
1104
1105 vip->adapter = i2c_get_adapter(vip->config->i2c_id);
1106 if (!vip->adapter) {
1107 ret = -ENODEV;
1108 dev_err(&pdev->dev, "no I2C adapter found\n");
1109 goto vunreg;
1110 }
1111
1112 vip->decoder = v4l2_i2c_new_subdev(&vip->v4l2_dev, vip->adapter,
1113 "adv7180", vip->config->i2c_addr,
1114 NULL);
1115 if (!vip->decoder) {
1116 ret = -ENODEV;
1117 dev_err(&pdev->dev, "no decoder found\n");
1118 goto vunreg;
1119 }
1120
1121 i2c_put_adapter(vip->adapter);
1122 v4l2_subdev_call(vip->decoder, core, init, 0);
1123
1124 sta2x11_vip_init_register(vip);
1125
1126 dev_info(&pdev->dev, "STA2X11 Video Input Port (VIP) loaded\n");
1127 return 0;
1128
1129vunreg:
1130 video_set_drvdata(vip->video_dev, NULL);
1131vrelease:
1132 if (video_is_registered(vip->video_dev))
1133 video_unregister_device(vip->video_dev);
1134 else
1135 video_device_release(vip->video_dev);
1136release_irq:
1137 free_irq(pdev->irq, vip);
1138release_buf:
1139 sta2x11_vip_release_buffer(vip);
1140 pci_disable_msi(pdev);
1141unmap:
1142 vb2_queue_release(&vip->vb_vidq);
1143 pci_iounmap(pdev, vip->iomem);
1144release:
1145 pci_release_regions(pdev);
1146unreg:
1147 v4l2_device_unregister(&vip->v4l2_dev);
1148free_mem:
1149 kfree(vip);
1150release_gpios:
1151 vip_gpio_release(&pdev->dev, config->reset_pin, config->reset_name);
1152 vip_gpio_release(&pdev->dev, config->pwr_pin, config->pwr_name);
1153disable:
1154
1155
1156
1157
1158 return ret;
1159}
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173static void sta2x11_vip_remove_one(struct pci_dev *pdev)
1174{
1175 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1176 struct sta2x11_vip *vip =
1177 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1178
1179 sta2x11_vip_clear_register(vip);
1180
1181 video_set_drvdata(vip->video_dev, NULL);
1182 video_unregister_device(vip->video_dev);
1183
1184 free_irq(pdev->irq, vip);
1185 pci_disable_msi(pdev);
1186 vb2_queue_release(&vip->vb_vidq);
1187 pci_iounmap(pdev, vip->iomem);
1188 pci_release_regions(pdev);
1189
1190 v4l2_device_unregister(&vip->v4l2_dev);
1191
1192 vip_gpio_release(&pdev->dev, vip->config->pwr_pin,
1193 vip->config->pwr_name);
1194 vip_gpio_release(&pdev->dev, vip->config->reset_pin,
1195 vip->config->reset_name);
1196
1197 kfree(vip);
1198
1199
1200
1201
1202}
1203
1204#ifdef CONFIG_PM
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216static int sta2x11_vip_suspend(struct pci_dev *pdev, pm_message_t state)
1217{
1218 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1219 struct sta2x11_vip *vip =
1220 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1221 unsigned long flags;
1222 int i;
1223
1224 spin_lock_irqsave(&vip->slock, flags);
1225 vip->register_save_area[0] = reg_read(vip, DVP_CTL);
1226 reg_write(vip, DVP_CTL, vip->register_save_area[0] & DVP_CTL_DIS);
1227 vip->register_save_area[SAVE_COUNT] = reg_read(vip, DVP_ITM);
1228 reg_write(vip, DVP_ITM, 0);
1229 for (i = 1; i < SAVE_COUNT; i++)
1230 vip->register_save_area[i] = reg_read(vip, 4 * i);
1231 for (i = 0; i < AUX_COUNT; i++)
1232 vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i] =
1233 reg_read(vip, registers_to_save[i]);
1234 spin_unlock_irqrestore(&vip->slock, flags);
1235
1236 pci_save_state(pdev);
1237 if (pci_set_power_state(pdev, pci_choose_state(pdev, state))) {
1238
1239
1240
1241
1242 vip->disabled = 1;
1243 }
1244
1245 pr_info("VIP: suspend\n");
1246 return 0;
1247}
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260static int sta2x11_vip_resume(struct pci_dev *pdev)
1261{
1262 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1263 struct sta2x11_vip *vip =
1264 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1265 unsigned long flags;
1266 int ret, i;
1267
1268 pr_info("VIP: resume\n");
1269
1270 if (vip->disabled) {
1271 ret = pci_enable_device(pdev);
1272 if (ret) {
1273 pr_warn("VIP: Can't enable device.\n");
1274 return ret;
1275 }
1276 vip->disabled = 0;
1277 }
1278 ret = pci_set_power_state(pdev, PCI_D0);
1279 if (ret) {
1280
1281
1282
1283
1284 pr_warn("VIP: Can't enable device.\n");
1285 vip->disabled = 1;
1286 return ret;
1287 }
1288
1289 pci_restore_state(pdev);
1290
1291 spin_lock_irqsave(&vip->slock, flags);
1292 for (i = 1; i < SAVE_COUNT; i++)
1293 reg_write(vip, 4 * i, vip->register_save_area[i]);
1294 for (i = 0; i < AUX_COUNT; i++)
1295 reg_write(vip, registers_to_save[i],
1296 vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i]);
1297 reg_write(vip, DVP_CTL, vip->register_save_area[0]);
1298 reg_write(vip, DVP_ITM, vip->register_save_area[SAVE_COUNT]);
1299 spin_unlock_irqrestore(&vip->slock, flags);
1300 return 0;
1301}
1302
1303#endif
1304
1305static const struct pci_device_id sta2x11_vip_pci_tbl[] = {
1306 {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIP)},
1307 {0,}
1308};
1309
1310static struct pci_driver sta2x11_vip_driver = {
1311 .name = KBUILD_MODNAME,
1312 .probe = sta2x11_vip_init_one,
1313 .remove = sta2x11_vip_remove_one,
1314 .id_table = sta2x11_vip_pci_tbl,
1315#ifdef CONFIG_PM
1316 .suspend = sta2x11_vip_suspend,
1317 .resume = sta2x11_vip_resume,
1318#endif
1319};
1320
1321static int __init sta2x11_vip_init_module(void)
1322{
1323 return pci_register_driver(&sta2x11_vip_driver);
1324}
1325
1326static void __exit sta2x11_vip_exit_module(void)
1327{
1328 pci_unregister_driver(&sta2x11_vip_driver);
1329}
1330
1331#ifdef MODULE
1332module_init(sta2x11_vip_init_module);
1333module_exit(sta2x11_vip_exit_module);
1334#else
1335late_initcall_sync(sta2x11_vip_init_module);
1336#endif
1337
1338MODULE_DESCRIPTION("STA2X11 Video Input Port driver");
1339MODULE_AUTHOR("Wind River");
1340MODULE_LICENSE("GPL v2");
1341MODULE_SUPPORTED_DEVICE("sta2x11 video input");
1342MODULE_VERSION(DRV_VERSION);
1343MODULE_DEVICE_TABLE(pci, sta2x11_vip_pci_tbl);
1344