linux/drivers/net/ethernet/qlogic/qede/qede.h
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   1/* QLogic qede NIC Driver
   2 * Copyright (c) 2015-2017  QLogic Corporation
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and /or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 */
  32#ifndef _QEDE_H_
  33#define _QEDE_H_
  34#include <linux/compiler.h>
  35#include <linux/version.h>
  36#include <linux/workqueue.h>
  37#include <linux/netdevice.h>
  38#include <linux/interrupt.h>
  39#include <linux/bitmap.h>
  40#include <linux/kernel.h>
  41#include <linux/mutex.h>
  42#include <linux/io.h>
  43#include <linux/qed/common_hsi.h>
  44#include <linux/qed/eth_common.h>
  45#include <linux/qed/qed_if.h>
  46#include <linux/qed/qed_chain.h>
  47#include <linux/qed/qed_eth_if.h>
  48
  49#define QEDE_MAJOR_VERSION              8
  50#define QEDE_MINOR_VERSION              10
  51#define QEDE_REVISION_VERSION           10
  52#define QEDE_ENGINEERING_VERSION        21
  53#define DRV_MODULE_VERSION __stringify(QEDE_MAJOR_VERSION) "."  \
  54                __stringify(QEDE_MINOR_VERSION) "."             \
  55                __stringify(QEDE_REVISION_VERSION) "."          \
  56                __stringify(QEDE_ENGINEERING_VERSION)
  57
  58#define DRV_MODULE_SYM          qede
  59
  60struct qede_stats_common {
  61        u64 no_buff_discards;
  62        u64 packet_too_big_discard;
  63        u64 ttl0_discard;
  64        u64 rx_ucast_bytes;
  65        u64 rx_mcast_bytes;
  66        u64 rx_bcast_bytes;
  67        u64 rx_ucast_pkts;
  68        u64 rx_mcast_pkts;
  69        u64 rx_bcast_pkts;
  70        u64 mftag_filter_discards;
  71        u64 mac_filter_discards;
  72        u64 tx_ucast_bytes;
  73        u64 tx_mcast_bytes;
  74        u64 tx_bcast_bytes;
  75        u64 tx_ucast_pkts;
  76        u64 tx_mcast_pkts;
  77        u64 tx_bcast_pkts;
  78        u64 tx_err_drop_pkts;
  79        u64 coalesced_pkts;
  80        u64 coalesced_events;
  81        u64 coalesced_aborts_num;
  82        u64 non_coalesced_pkts;
  83        u64 coalesced_bytes;
  84
  85        /* port */
  86        u64 rx_64_byte_packets;
  87        u64 rx_65_to_127_byte_packets;
  88        u64 rx_128_to_255_byte_packets;
  89        u64 rx_256_to_511_byte_packets;
  90        u64 rx_512_to_1023_byte_packets;
  91        u64 rx_1024_to_1518_byte_packets;
  92        u64 rx_crc_errors;
  93        u64 rx_mac_crtl_frames;
  94        u64 rx_pause_frames;
  95        u64 rx_pfc_frames;
  96        u64 rx_align_errors;
  97        u64 rx_carrier_errors;
  98        u64 rx_oversize_packets;
  99        u64 rx_jabbers;
 100        u64 rx_undersize_packets;
 101        u64 rx_fragments;
 102        u64 tx_64_byte_packets;
 103        u64 tx_65_to_127_byte_packets;
 104        u64 tx_128_to_255_byte_packets;
 105        u64 tx_256_to_511_byte_packets;
 106        u64 tx_512_to_1023_byte_packets;
 107        u64 tx_1024_to_1518_byte_packets;
 108        u64 tx_pause_frames;
 109        u64 tx_pfc_frames;
 110        u64 brb_truncates;
 111        u64 brb_discards;
 112        u64 tx_mac_ctrl_frames;
 113};
 114
 115struct qede_stats_bb {
 116        u64 rx_1519_to_1522_byte_packets;
 117        u64 rx_1519_to_2047_byte_packets;
 118        u64 rx_2048_to_4095_byte_packets;
 119        u64 rx_4096_to_9216_byte_packets;
 120        u64 rx_9217_to_16383_byte_packets;
 121        u64 tx_1519_to_2047_byte_packets;
 122        u64 tx_2048_to_4095_byte_packets;
 123        u64 tx_4096_to_9216_byte_packets;
 124        u64 tx_9217_to_16383_byte_packets;
 125        u64 tx_lpi_entry_count;
 126        u64 tx_total_collisions;
 127};
 128
 129struct qede_stats_ah {
 130        u64 rx_1519_to_max_byte_packets;
 131        u64 tx_1519_to_max_byte_packets;
 132};
 133
 134struct qede_stats {
 135        struct qede_stats_common common;
 136
 137        union {
 138                struct qede_stats_bb bb;
 139                struct qede_stats_ah ah;
 140        };
 141};
 142
 143struct qede_vlan {
 144        struct list_head list;
 145        u16 vid;
 146        bool configured;
 147};
 148
 149struct qede_rdma_dev {
 150        struct qedr_dev *qedr_dev;
 151        struct list_head entry;
 152        struct list_head roce_event_list;
 153        struct workqueue_struct *roce_wq;
 154};
 155
 156struct qede_dev {
 157        struct qed_dev                  *cdev;
 158        struct net_device               *ndev;
 159        struct pci_dev                  *pdev;
 160
 161        u32                             dp_module;
 162        u8                              dp_level;
 163
 164        u32 flags;
 165#define QEDE_FLAG_IS_VF BIT(0)
 166#define IS_VF(edev)     (!!((edev)->flags & QEDE_FLAG_IS_VF))
 167
 168        const struct qed_eth_ops        *ops;
 169
 170        struct qed_dev_eth_info dev_info;
 171#define QEDE_MAX_RSS_CNT(edev)  ((edev)->dev_info.num_queues)
 172#define QEDE_MAX_TSS_CNT(edev)  ((edev)->dev_info.num_queues)
 173#define QEDE_IS_BB(edev) \
 174        ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_BB)
 175#define QEDE_IS_AH(edev) \
 176        ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_AH)
 177
 178        struct qede_fastpath            *fp_array;
 179        u8                              req_num_tx;
 180        u8                              fp_num_tx;
 181        u8                              req_num_rx;
 182        u8                              fp_num_rx;
 183        u16                             req_queues;
 184        u16                             num_queues;
 185#define QEDE_QUEUE_CNT(edev)    ((edev)->num_queues)
 186#define QEDE_RSS_COUNT(edev)    ((edev)->num_queues - (edev)->fp_num_tx)
 187#define QEDE_RX_QUEUE_IDX(edev, i)      (i)
 188#define QEDE_TSS_COUNT(edev)    ((edev)->num_queues - (edev)->fp_num_rx)
 189
 190        struct qed_int_info             int_info;
 191        unsigned char                   primary_mac[ETH_ALEN];
 192
 193        /* Smaller private varaiant of the RTNL lock */
 194        struct mutex                    qede_lock;
 195        u32                             state; /* Protected by qede_lock */
 196        u16                             rx_buf_size;
 197        u32                             rx_copybreak;
 198
 199        /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */
 200#define ETH_OVERHEAD                    (ETH_HLEN + 8 + 8)
 201        /* Max supported alignment is 256 (8 shift)
 202         * minimal alignment shift 6 is optimal for 57xxx HW performance
 203         */
 204#define QEDE_RX_ALIGN_SHIFT             max(6, min(8, L1_CACHE_SHIFT))
 205        /* We assume skb_build() uses sizeof(struct skb_shared_info) bytes
 206         * at the end of skb->data, to avoid wasting a full cache line.
 207         * This reduces memory use (skb->truesize).
 208         */
 209#define QEDE_FW_RX_ALIGN_END                                    \
 210        max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT,                  \
 211              SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
 212
 213        struct qede_stats               stats;
 214#define QEDE_RSS_INDIR_INITED   BIT(0)
 215#define QEDE_RSS_KEY_INITED     BIT(1)
 216#define QEDE_RSS_CAPS_INITED    BIT(2)
 217        u32 rss_params_inited; /* bit-field to track initialized rss params */
 218        u16 rss_ind_table[128];
 219        u32 rss_key[10];
 220        u8 rss_caps;
 221
 222        u16                     q_num_rx_buffers; /* Must be a power of two */
 223        u16                     q_num_tx_buffers; /* Must be a power of two */
 224
 225        bool gro_disable;
 226        struct list_head vlan_list;
 227        u16 configured_vlans;
 228        u16 non_configured_vlans;
 229        bool accept_any_vlan;
 230        struct delayed_work             sp_task;
 231        unsigned long                   sp_flags;
 232        u16                             vxlan_dst_port;
 233        u16                             geneve_dst_port;
 234
 235        bool wol_enabled;
 236
 237        struct qede_rdma_dev            rdma_info;
 238};
 239
 240enum QEDE_STATE {
 241        QEDE_STATE_CLOSED,
 242        QEDE_STATE_OPEN,
 243};
 244
 245#define HILO_U64(hi, lo)                ((((u64)(hi)) << 32) + (lo))
 246
 247#define MAX_NUM_TC      8
 248#define MAX_NUM_PRI     8
 249
 250/* The driver supports the new build_skb() API:
 251 * RX ring buffer contains pointer to kmalloc() data only,
 252 * skb are built only after the frame was DMA-ed.
 253 */
 254struct sw_rx_data {
 255        struct page *data;
 256        dma_addr_t mapping;
 257        unsigned int page_offset;
 258};
 259
 260enum qede_agg_state {
 261        QEDE_AGG_STATE_NONE  = 0,
 262        QEDE_AGG_STATE_START = 1,
 263        QEDE_AGG_STATE_ERROR = 2
 264};
 265
 266struct qede_agg_info {
 267        /* rx_buf is a data buffer that can be placed / consumed from rx bd
 268         * chain. It has two purposes: We will preallocate the data buffer
 269         * for each aggregation when we open the interface and will place this
 270         * buffer on the rx-bd-ring when we receive TPA_START. We don't want
 271         * to be in a state where allocation fails, as we can't reuse the
 272         * consumer buffer in the rx-chain since FW may still be writing to it
 273         * (since header needs to be modified for TPA).
 274         * The second purpose is to keep a pointer to the bd buffer during
 275         * aggregation.
 276         */
 277        struct sw_rx_data buffer;
 278        dma_addr_t buffer_mapping;
 279
 280        struct sk_buff *skb;
 281
 282        /* We need some structs from the start cookie until termination */
 283        u16 vlan_tag;
 284        u16 start_cqe_bd_len;
 285        u8 start_cqe_placement_offset;
 286
 287        u8 state;
 288        u8 frag_id;
 289
 290        u8 tunnel_type;
 291};
 292
 293struct qede_rx_queue {
 294        __le16 *hw_cons_ptr;
 295        void __iomem *hw_rxq_prod_addr;
 296
 297        /* Required for the allocation of replacement buffers */
 298        struct device *dev;
 299
 300        u16 sw_rx_cons;
 301        u16 sw_rx_prod;
 302
 303        u16 filled_buffers;
 304        u8 rxq_id;
 305
 306        u32 rx_buf_size;
 307        u32 rx_buf_seg_size;
 308
 309        u64 rcv_pkts;
 310
 311        struct sw_rx_data *sw_rx_ring;
 312        struct qed_chain rx_bd_ring;
 313        struct qed_chain rx_comp_ring ____cacheline_aligned;
 314
 315        /* Used once per each NAPI run */
 316        u16 num_rx_buffers;
 317
 318        /* GRO */
 319        struct qede_agg_info tpa_info[ETH_TPA_MAX_AGGS_NUM];
 320
 321        u64 rx_hw_errors;
 322        u64 rx_alloc_errors;
 323        u64 rx_ip_frags;
 324
 325        void *handle;
 326};
 327
 328union db_prod {
 329        struct eth_db_data data;
 330        u32             raw;
 331};
 332
 333struct sw_tx_bd {
 334        struct sk_buff *skb;
 335        u8 flags;
 336/* Set on the first BD descriptor when there is a split BD */
 337#define QEDE_TSO_SPLIT_BD               BIT(0)
 338};
 339
 340struct qede_tx_queue {
 341        bool is_legacy;
 342        u16 sw_tx_cons;
 343        u16 sw_tx_prod;
 344        u16 num_tx_buffers; /* Slowpath only */
 345
 346        u64 xmit_pkts;
 347        u64 stopped_cnt;
 348
 349        __le16 *hw_cons_ptr;
 350
 351        /* Needed for the mapping of packets */
 352        struct device *dev;
 353
 354        void __iomem *doorbell_addr;
 355        union db_prod tx_db;
 356        int index; /* Slowpath only */
 357
 358        struct sw_tx_bd *sw_tx_ring;
 359        struct qed_chain tx_pbl;
 360
 361        /* Slowpath; Should be kept in end [unless missing padding] */
 362        void *handle;
 363};
 364
 365#define BD_UNMAP_ADDR(bd)               HILO_U64(le32_to_cpu((bd)->addr.hi), \
 366                                                 le32_to_cpu((bd)->addr.lo))
 367#define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len)                           \
 368        do {                                                            \
 369                (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr));      \
 370                (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr));      \
 371                (bd)->nbytes = cpu_to_le16(len);                        \
 372        } while (0)
 373#define BD_UNMAP_LEN(bd)                (le16_to_cpu((bd)->nbytes))
 374
 375struct qede_fastpath {
 376        struct qede_dev *edev;
 377#define QEDE_FASTPATH_TX        BIT(0)
 378#define QEDE_FASTPATH_RX        BIT(1)
 379#define QEDE_FASTPATH_COMBINED  (QEDE_FASTPATH_TX | QEDE_FASTPATH_RX)
 380        u8                      type;
 381        u8                      id;
 382        struct napi_struct      napi;
 383        struct qed_sb_info      *sb_info;
 384        struct qede_rx_queue    *rxq;
 385        struct qede_tx_queue    *txq;
 386
 387#define VEC_NAME_SIZE   (sizeof(((struct net_device *)0)->name) + 8)
 388        char    name[VEC_NAME_SIZE];
 389};
 390
 391/* Debug print definitions */
 392#define DP_NAME(edev) ((edev)->ndev->name)
 393
 394#define XMIT_PLAIN              0
 395#define XMIT_L4_CSUM            BIT(0)
 396#define XMIT_LSO                BIT(1)
 397#define XMIT_ENC                BIT(2)
 398#define XMIT_ENC_GSO_L4_CSUM    BIT(3)
 399
 400#define QEDE_CSUM_ERROR                 BIT(0)
 401#define QEDE_CSUM_UNNECESSARY           BIT(1)
 402#define QEDE_TUNN_CSUM_UNNECESSARY      BIT(2)
 403
 404#define QEDE_SP_RX_MODE                 1
 405#define QEDE_SP_VXLAN_PORT_CONFIG       2
 406#define QEDE_SP_GENEVE_PORT_CONFIG      3
 407
 408struct qede_reload_args {
 409        void (*func)(struct qede_dev *edev, struct qede_reload_args *args);
 410        union {
 411                netdev_features_t features;
 412                u16 mtu;
 413        } u;
 414};
 415
 416/* Datapath functions definition */
 417netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev);
 418netdev_features_t qede_features_check(struct sk_buff *skb,
 419                                      struct net_device *dev,
 420                                      netdev_features_t features);
 421void qede_tx_log_print(struct qede_dev *edev, struct qede_fastpath *fp);
 422int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy);
 423int qede_free_tx_pkt(struct qede_dev *edev,
 424                     struct qede_tx_queue *txq, int *len);
 425int qede_poll(struct napi_struct *napi, int budget);
 426irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie);
 427
 428/* Filtering function definitions */
 429void qede_force_mac(void *dev, u8 *mac, bool forced);
 430int qede_set_mac_addr(struct net_device *ndev, void *p);
 431
 432int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid);
 433int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid);
 434void qede_vlan_mark_nonconfigured(struct qede_dev *edev);
 435int qede_configure_vlan_filters(struct qede_dev *edev);
 436
 437int qede_set_features(struct net_device *dev, netdev_features_t features);
 438void qede_set_rx_mode(struct net_device *ndev);
 439void qede_config_rx_mode(struct net_device *ndev);
 440void qede_fill_rss_params(struct qede_dev *edev,
 441                          struct qed_update_vport_rss_params *rss, u8 *update);
 442
 443#ifdef CONFIG_QEDE_VXLAN
 444void qede_add_vxlan_port(struct net_device *dev,
 445                         sa_family_t sa_family, __be16 port);
 446void qede_del_vxlan_port(struct net_device *dev,
 447                         sa_family_t sa_family, __be16 port);
 448#endif
 449
 450#ifdef CONFIG_QEDE_GENEVE
 451void qede_add_geneve_port(struct net_device *dev,
 452                          sa_family_t sa_family, __be16 port);
 453void qede_del_geneve_port(struct net_device *dev,
 454                          sa_family_t sa_family, __be16 port);
 455#endif
 456
 457
 458#ifdef CONFIG_DCB
 459void qede_set_dcbnl_ops(struct net_device *ndev);
 460#endif
 461
 462void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level);
 463void qede_set_ethtool_ops(struct net_device *netdev);
 464void qede_reload(struct qede_dev *edev,
 465                 struct qede_reload_args *args, bool is_locked);
 466int qede_change_mtu(struct net_device *dev, int new_mtu);
 467void qede_fill_by_demand_stats(struct qede_dev *edev);
 468void __qede_lock(struct qede_dev *edev);
 469void __qede_unlock(struct qede_dev *edev);
 470bool qede_has_rx_work(struct qede_rx_queue *rxq);
 471int qede_txq_has_work(struct qede_tx_queue *txq);
 472void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count);
 473void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq);
 474
 475#define RX_RING_SIZE_POW        13
 476#define RX_RING_SIZE            ((u16)BIT(RX_RING_SIZE_POW))
 477#define NUM_RX_BDS_MAX          (RX_RING_SIZE - 1)
 478#define NUM_RX_BDS_MIN          128
 479#define NUM_RX_BDS_DEF          ((u16)BIT(10) - 1)
 480
 481#define TX_RING_SIZE_POW        13
 482#define TX_RING_SIZE            ((u16)BIT(TX_RING_SIZE_POW))
 483#define NUM_TX_BDS_MAX          (TX_RING_SIZE - 1)
 484#define NUM_TX_BDS_MIN          128
 485#define NUM_TX_BDS_DEF          NUM_TX_BDS_MAX
 486
 487#define QEDE_MIN_PKT_LEN        64
 488#define QEDE_RX_HDR_SIZE        256
 489#define for_each_queue(i) for (i = 0; i < edev->num_queues; i++)
 490
 491#endif /* _QEDE_H_ */
 492