LXR linux/tools/perf/util/mem-events.h

   1#ifndef __PERF_MEM_EVENTS_H
   2#define __PERF_MEM_EVENTS_H
   3
   4#include <stdbool.h>
   5#include <stdint.h>
   6#include <stdio.h>
   7#include <linux/types.h>
   8#include "stat.h"
   9
  10struct perf_mem_event {
  11        bool            record;
  12        bool            supported;
  13        const char      *tag;
  14        const char      *name;
  15        const char      *sysfs_name;
  16};
  17
  18enum {
  19        PERF_MEM_EVENTS__LOAD,
  20        PERF_MEM_EVENTS__STORE,
  21        PERF_MEM_EVENTS__MAX,
  22};
  23
  24extern struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX];
  25extern unsigned int perf_mem_events__loads_ldlat;
  26
  27int perf_mem_events__parse(const char *str);
  28int perf_mem_events__init(void);
  29
  30char *perf_mem_events__name(int i);
  31
  32struct mem_info;
  33int perf_mem__tlb_scnprintf(char *out, size_t sz, struct mem_info *mem_info);
  34int perf_mem__lvl_scnprintf(char *out, size_t sz, struct mem_info *mem_info);
  35int perf_mem__snp_scnprintf(char *out, size_t sz, struct mem_info *mem_info);
  36int perf_mem__lck_scnprintf(char *out, size_t sz, struct mem_info *mem_info);
  37
  38int perf_script__meminfo_scnprintf(char *bf, size_t size, struct mem_info *mem_info);
  39
  40struct c2c_stats {
  41        u32     nr_entries;
  42
  43        u32     locks;               /* count of 'lock' transactions */
  44        u32     store;               /* count of all stores in trace */
  45        u32     st_uncache;          /* stores to uncacheable address */
  46        u32     st_noadrs;           /* cacheable store with no address */
  47        u32     st_l1hit;            /* count of stores that hit L1D */
  48        u32     st_l1miss;           /* count of stores that miss L1D */
  49        u32     load;                /* count of all loads in trace */
  50        u32     ld_excl;             /* exclusive loads, rmt/lcl DRAM - snp none/miss */
  51        u32     ld_shared;           /* shared loads, rmt/lcl DRAM - snp hit */
  52        u32     ld_uncache;          /* loads to uncacheable address */
  53        u32     ld_io;               /* loads to io address */
  54        u32     ld_miss;             /* loads miss */
  55        u32     ld_noadrs;           /* cacheable load with no address */
  56        u32     ld_fbhit;            /* count of loads hitting Fill Buffer */
  57        u32     ld_l1hit;            /* count of loads that hit L1D */
  58        u32     ld_l2hit;            /* count of loads that hit L2D */
  59        u32     ld_llchit;           /* count of loads that hit LLC */
  60        u32     lcl_hitm;            /* count of loads with local HITM  */
  61        u32     rmt_hitm;            /* count of loads with remote HITM */
  62        u32     tot_hitm;            /* count of loads with local and remote HITM */
  63        u32     rmt_hit;             /* count of loads with remote hit clean; */
  64        u32     lcl_dram;            /* count of loads miss to local DRAM */
  65        u32     rmt_dram;            /* count of loads miss to remote DRAM */
  66        u32     nomap;               /* count of load/stores with no phys adrs */
  67        u32     noparse;             /* count of unparsable data sources */
  68};
  69
  70struct hist_entry;
  71int c2c_decode_stats(struct c2c_stats *stats, struct mem_info *mi);
  72void c2c_add_stats(struct c2c_stats *stats, struct c2c_stats *add);
  73
  74#endif /* __PERF_MEM_EVENTS_H */
  75