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19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/leds.h>
22#include <linux/gpio.h>
23#include <linux/platform_device.h>
24#include <linux/i2c.h>
25#include <linux/platform_data/at24.h>
26#include <linux/i2c/pcf857x.h>
27
28#include <media/tvp514x.h>
29#include <media/adv7343.h>
30
31#include <linux/mtd/mtd.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <linux/clk.h>
35#include <linux/export.h>
36
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39
40#include <mach/common.h>
41#include <mach/serial.h>
42#include <linux/platform_data/i2c-davinci.h>
43#include <linux/platform_data/mtd-davinci.h>
44#include <mach/clock.h>
45#include <mach/cdce949.h>
46#include <linux/platform_data/mtd-davinci-aemif.h>
47
48#include "davinci.h"
49#include "clock.h"
50
51#define NAND_BLOCK_SIZE SZ_128K
52
53
54
55
56
57static struct mtd_partition davinci_nand_partitions[] = {
58 {
59
60 .name = "bootloader",
61 .offset = MTDPART_OFS_APPEND,
62 .size = 16 * NAND_BLOCK_SIZE,
63 .mask_flags = MTD_WRITEABLE,
64 }, {
65 .name = "kernel",
66 .offset = MTDPART_OFS_APPEND,
67 .size = SZ_4M,
68 .mask_flags = 0,
69 }, {
70 .name = "filesystem",
71 .offset = MTDPART_OFS_APPEND,
72 .size = MTDPART_SIZ_FULL,
73 .mask_flags = 0,
74 }
75};
76
77static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
78 .wsetup = 29,
79 .wstrobe = 24,
80 .whold = 14,
81 .rsetup = 19,
82 .rstrobe = 33,
83 .rhold = 0,
84 .ta = 29,
85};
86
87static struct davinci_nand_pdata davinci_nand_data = {
88 .mask_cle = 0x80000,
89 .mask_ale = 0x40000,
90 .parts = davinci_nand_partitions,
91 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
92 .ecc_mode = NAND_ECC_HW,
93 .ecc_bits = 1,
94 .options = 0,
95};
96
97static struct resource davinci_nand_resources[] = {
98 {
99 .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
100 .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
101 .flags = IORESOURCE_MEM,
102 }, {
103 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
104 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
105 .flags = IORESOURCE_MEM,
106 },
107};
108
109static struct platform_device davinci_nand_device = {
110 .name = "davinci_nand",
111 .id = 0,
112
113 .num_resources = ARRAY_SIZE(davinci_nand_resources),
114 .resource = davinci_nand_resources,
115
116 .dev = {
117 .platform_data = &davinci_nand_data,
118 },
119};
120
121#define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
122
123
124#define DM646X_EVM_ATA_RST BIT(0)
125#define DM646X_EVM_ATA_PWD BIT(1)
126
127
128static int cpld_reg0_probe(struct i2c_client *client,
129 const struct i2c_device_id *id)
130{
131 if (HAS_ATA) {
132 u8 data;
133 struct i2c_msg msg[2] = {
134 {
135 .addr = client->addr,
136 .flags = I2C_M_RD,
137 .len = 1,
138 .buf = &data,
139 },
140 {
141 .addr = client->addr,
142 .flags = 0,
143 .len = 1,
144 .buf = &data,
145 },
146 };
147
148
149 i2c_transfer(client->adapter, msg, 1);
150 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
151 i2c_transfer(client->adapter, msg + 1, 1);
152 }
153
154 return 0;
155}
156
157static const struct i2c_device_id cpld_reg_ids[] = {
158 { "cpld_reg0", 0, },
159 { },
160};
161
162static struct i2c_driver dm6467evm_cpld_driver = {
163 .driver.name = "cpld_reg0",
164 .id_table = cpld_reg_ids,
165 .probe = cpld_reg0_probe,
166};
167
168
169
170static struct gpio_led evm_leds[] = {
171 { .name = "DS1", .active_low = 1, },
172 { .name = "DS2", .active_low = 1, },
173 { .name = "DS3", .active_low = 1, },
174 { .name = "DS4", .active_low = 1, },
175};
176
177static const struct gpio_led_platform_data evm_led_data = {
178 .num_leds = ARRAY_SIZE(evm_leds),
179 .leds = evm_leds,
180};
181
182static struct platform_device *evm_led_dev;
183
184static int evm_led_setup(struct i2c_client *client, int gpio,
185 unsigned int ngpio, void *c)
186{
187 struct gpio_led *leds = evm_leds;
188 int status;
189
190 while (ngpio--) {
191 leds->gpio = gpio++;
192 leds++;
193 }
194
195 evm_led_dev = platform_device_alloc("leds-gpio", 0);
196 platform_device_add_data(evm_led_dev, &evm_led_data,
197 sizeof(evm_led_data));
198
199 evm_led_dev->dev.parent = &client->dev;
200 status = platform_device_add(evm_led_dev);
201 if (status < 0) {
202 platform_device_put(evm_led_dev);
203 evm_led_dev = NULL;
204 }
205 return status;
206}
207
208static int evm_led_teardown(struct i2c_client *client, int gpio,
209 unsigned ngpio, void *c)
210{
211 if (evm_led_dev) {
212 platform_device_unregister(evm_led_dev);
213 evm_led_dev = NULL;
214 }
215 return 0;
216}
217
218static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
219
220static int evm_sw_setup(struct i2c_client *client, int gpio,
221 unsigned ngpio, void *c)
222{
223 int status;
224 int i;
225 char label[10];
226
227 for (i = 0; i < 4; ++i) {
228 snprintf(label, 10, "user_sw%d", i);
229 status = gpio_request(gpio, label);
230 if (status)
231 goto out_free;
232 evm_sw_gpio[i] = gpio++;
233
234 status = gpio_direction_input(evm_sw_gpio[i]);
235 if (status) {
236 gpio_free(evm_sw_gpio[i]);
237 evm_sw_gpio[i] = -EINVAL;
238 goto out_free;
239 }
240
241 status = gpio_export(evm_sw_gpio[i], 0);
242 if (status) {
243 gpio_free(evm_sw_gpio[i]);
244 evm_sw_gpio[i] = -EINVAL;
245 goto out_free;
246 }
247 }
248 return status;
249out_free:
250 for (i = 0; i < 4; ++i) {
251 if (evm_sw_gpio[i] != -EINVAL) {
252 gpio_free(evm_sw_gpio[i]);
253 evm_sw_gpio[i] = -EINVAL;
254 }
255 }
256 return status;
257}
258
259static int evm_sw_teardown(struct i2c_client *client, int gpio,
260 unsigned ngpio, void *c)
261{
262 int i;
263
264 for (i = 0; i < 4; ++i) {
265 if (evm_sw_gpio[i] != -EINVAL) {
266 gpio_unexport(evm_sw_gpio[i]);
267 gpio_free(evm_sw_gpio[i]);
268 evm_sw_gpio[i] = -EINVAL;
269 }
270 }
271 return 0;
272}
273
274static int evm_pcf_setup(struct i2c_client *client, int gpio,
275 unsigned int ngpio, void *c)
276{
277 int status;
278
279 if (ngpio < 8)
280 return -EINVAL;
281
282 status = evm_sw_setup(client, gpio, 4, c);
283 if (status)
284 return status;
285
286 return evm_led_setup(client, gpio+4, 4, c);
287}
288
289static int evm_pcf_teardown(struct i2c_client *client, int gpio,
290 unsigned int ngpio, void *c)
291{
292 BUG_ON(ngpio < 8);
293
294 evm_sw_teardown(client, gpio, 4, c);
295 evm_led_teardown(client, gpio+4, 4, c);
296
297 return 0;
298}
299
300static struct pcf857x_platform_data pcf_data = {
301 .gpio_base = DAVINCI_N_GPIO+1,
302 .setup = evm_pcf_setup,
303 .teardown = evm_pcf_teardown,
304};
305
306
307
308
309
310
311static struct at24_platform_data eeprom_info = {
312 .byte_len = (256*1024) / 8,
313 .page_size = 64,
314 .flags = AT24_FLAG_ADDR16,
315 .setup = davinci_get_mac_addr,
316 .context = (void *)0x7f00,
317};
318
319static u8 dm646x_iis_serializer_direction[] = {
320 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
321};
322
323static u8 dm646x_dit_serializer_direction[] = {
324 TX_MODE,
325};
326
327static struct snd_platform_data dm646x_evm_snd_data[] = {
328 {
329 .tx_dma_offset = 0x400,
330 .rx_dma_offset = 0x400,
331 .op_mode = DAVINCI_MCASP_IIS_MODE,
332 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
333 .tdm_slots = 2,
334 .serial_dir = dm646x_iis_serializer_direction,
335 .asp_chan_q = EVENTQ_0,
336 },
337 {
338 .tx_dma_offset = 0x400,
339 .rx_dma_offset = 0,
340 .op_mode = DAVINCI_MCASP_DIT_MODE,
341 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
342 .tdm_slots = 32,
343 .serial_dir = dm646x_dit_serializer_direction,
344 .asp_chan_q = EVENTQ_0,
345 },
346};
347
348static struct i2c_client *cpld_client;
349
350static int cpld_video_probe(struct i2c_client *client,
351 const struct i2c_device_id *id)
352{
353 cpld_client = client;
354 return 0;
355}
356
357static int cpld_video_remove(struct i2c_client *client)
358{
359 cpld_client = NULL;
360 return 0;
361}
362
363static const struct i2c_device_id cpld_video_id[] = {
364 { "cpld_video", 0 },
365 { }
366};
367
368static struct i2c_driver cpld_video_driver = {
369 .driver = {
370 .name = "cpld_video",
371 },
372 .probe = cpld_video_probe,
373 .remove = cpld_video_remove,
374 .id_table = cpld_video_id,
375};
376
377static void evm_init_cpld(void)
378{
379 i2c_add_driver(&cpld_video_driver);
380}
381
382static struct i2c_board_info __initdata i2c_info[] = {
383 {
384 I2C_BOARD_INFO("24c256", 0x50),
385 .platform_data = &eeprom_info,
386 },
387 {
388 I2C_BOARD_INFO("pcf8574a", 0x38),
389 .platform_data = &pcf_data,
390 },
391 {
392 I2C_BOARD_INFO("cpld_reg0", 0x3a),
393 },
394 {
395 I2C_BOARD_INFO("tlv320aic33", 0x18),
396 },
397 {
398 I2C_BOARD_INFO("cpld_video", 0x3b),
399 },
400 {
401 I2C_BOARD_INFO("cdce949", 0x6c),
402 },
403};
404
405static struct davinci_i2c_platform_data i2c_pdata = {
406 .bus_freq = 100 ,
407 .bus_delay = 0 ,
408};
409
410#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
411#define VCH2CLK_SYSCLK8 (BIT(9))
412#define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
413#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
414#define VCH3CLK_SYSCLK8 (BIT(13))
415#define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
416
417#define VIDCH2CLK (BIT(10))
418#define VIDCH3CLK (BIT(11))
419#define VIDCH1CLK (BIT(4))
420#define TVP7002_INPUT (BIT(4))
421#define TVP5147_INPUT (~BIT(4))
422#define VPIF_INPUT_ONE_CHANNEL (BIT(5))
423#define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
424#define TVP5147_CH0 "tvp514x-0"
425#define TVP5147_CH1 "tvp514x-1"
426
427
428static spinlock_t vpif_reg_lock;
429
430static int set_vpif_clock(int mux_mode, int hd)
431{
432 unsigned long flags;
433 unsigned int value;
434 int val = 0;
435 int err = 0;
436
437 if (!cpld_client)
438 return -ENXIO;
439
440
441 spin_lock_irqsave(&vpif_reg_lock, flags);
442 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
443 value |= (VIDCH3CLK | VIDCH2CLK);
444 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
445 spin_unlock_irqrestore(&vpif_reg_lock, flags);
446
447 val = i2c_smbus_read_byte(cpld_client);
448 if (val < 0)
449 return val;
450
451 if (mux_mode == 1)
452 val &= ~0x40;
453 else
454 val |= 0x40;
455
456 err = i2c_smbus_write_byte(cpld_client, val);
457 if (err)
458 return err;
459
460 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
461 value &= ~(VCH2CLK_MASK);
462 value &= ~(VCH3CLK_MASK);
463
464 if (hd >= 1)
465 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
466 else
467 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
468
469 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
470
471 spin_lock_irqsave(&vpif_reg_lock, flags);
472 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
473
474 value &= ~(VIDCH3CLK | VIDCH2CLK);
475 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
476 spin_unlock_irqrestore(&vpif_reg_lock, flags);
477
478 return 0;
479}
480
481static struct vpif_subdev_info dm646x_vpif_subdev[] = {
482 {
483 .name = "adv7343",
484 .board_info = {
485 I2C_BOARD_INFO("adv7343", 0x2a),
486 },
487 },
488 {
489 .name = "ths7303",
490 .board_info = {
491 I2C_BOARD_INFO("ths7303", 0x2c),
492 },
493 },
494};
495
496static const struct vpif_output dm6467_ch0_outputs[] = {
497 {
498 .output = {
499 .index = 0,
500 .name = "Composite",
501 .type = V4L2_OUTPUT_TYPE_ANALOG,
502 .capabilities = V4L2_OUT_CAP_STD,
503 .std = V4L2_STD_ALL,
504 },
505 .subdev_name = "adv7343",
506 .output_route = ADV7343_COMPOSITE_ID,
507 },
508 {
509 .output = {
510 .index = 1,
511 .name = "Component",
512 .type = V4L2_OUTPUT_TYPE_ANALOG,
513 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
514 },
515 .subdev_name = "adv7343",
516 .output_route = ADV7343_COMPONENT_ID,
517 },
518 {
519 .output = {
520 .index = 2,
521 .name = "S-Video",
522 .type = V4L2_OUTPUT_TYPE_ANALOG,
523 .capabilities = V4L2_OUT_CAP_STD,
524 .std = V4L2_STD_ALL,
525 },
526 .subdev_name = "adv7343",
527 .output_route = ADV7343_SVIDEO_ID,
528 },
529};
530
531static struct vpif_display_config dm646x_vpif_display_config = {
532 .set_clock = set_vpif_clock,
533 .subdevinfo = dm646x_vpif_subdev,
534 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
535 .chan_config[0] = {
536 .outputs = dm6467_ch0_outputs,
537 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
538 },
539 .card_name = "DM646x EVM",
540};
541
542
543
544
545
546
547
548
549
550static int setup_vpif_input_path(int channel, const char *sub_dev_name)
551{
552 int err = 0;
553 int val;
554
555
556 if (channel != 0)
557 return 0;
558
559 if (!cpld_client)
560 return -ENXIO;
561
562 val = i2c_smbus_read_byte(cpld_client);
563 if (val < 0)
564 return val;
565
566 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
567 !strcmp(sub_dev_name, TVP5147_CH1))
568 val &= TVP5147_INPUT;
569 else
570 val |= TVP7002_INPUT;
571
572 err = i2c_smbus_write_byte(cpld_client, val);
573 if (err)
574 return err;
575 return 0;
576}
577
578
579
580
581
582
583
584static int setup_vpif_input_channel_mode(int mux_mode)
585{
586 unsigned long flags;
587 int err = 0;
588 int val;
589 u32 value;
590
591 if (!cpld_client)
592 return -ENXIO;
593
594 val = i2c_smbus_read_byte(cpld_client);
595 if (val < 0)
596 return val;
597
598 spin_lock_irqsave(&vpif_reg_lock, flags);
599 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
600 if (mux_mode) {
601 val &= VPIF_INPUT_TWO_CHANNEL;
602 value |= VIDCH1CLK;
603 } else {
604 val |= VPIF_INPUT_ONE_CHANNEL;
605 value &= ~VIDCH1CLK;
606 }
607 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
608 spin_unlock_irqrestore(&vpif_reg_lock, flags);
609
610 err = i2c_smbus_write_byte(cpld_client, val);
611 if (err)
612 return err;
613
614 return 0;
615}
616
617static struct tvp514x_platform_data tvp5146_pdata = {
618 .clk_polarity = 0,
619 .hs_polarity = 1,
620 .vs_polarity = 1
621};
622
623#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
624
625static struct vpif_subdev_info vpif_capture_sdev_info[] = {
626 {
627 .name = TVP5147_CH0,
628 .board_info = {
629 I2C_BOARD_INFO("tvp5146", 0x5d),
630 .platform_data = &tvp5146_pdata,
631 },
632 },
633 {
634 .name = TVP5147_CH1,
635 .board_info = {
636 I2C_BOARD_INFO("tvp5146", 0x5c),
637 .platform_data = &tvp5146_pdata,
638 },
639 },
640};
641
642static const struct vpif_input dm6467_ch0_inputs[] = {
643 {
644 .input = {
645 .index = 0,
646 .name = "Composite",
647 .type = V4L2_INPUT_TYPE_CAMERA,
648 .capabilities = V4L2_IN_CAP_STD,
649 .std = TVP514X_STD_ALL,
650 },
651 .subdev_name = TVP5147_CH0,
652 .input_route = INPUT_CVBS_VI2B,
653 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
654 },
655};
656
657static const struct vpif_input dm6467_ch1_inputs[] = {
658 {
659 .input = {
660 .index = 0,
661 .name = "S-Video",
662 .type = V4L2_INPUT_TYPE_CAMERA,
663 .capabilities = V4L2_IN_CAP_STD,
664 .std = TVP514X_STD_ALL,
665 },
666 .subdev_name = TVP5147_CH1,
667 .input_route = INPUT_SVIDEO_VI2C_VI1C,
668 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
669 },
670};
671
672static struct vpif_capture_config dm646x_vpif_capture_cfg = {
673 .setup_input_path = setup_vpif_input_path,
674 .setup_input_channel_mode = setup_vpif_input_channel_mode,
675 .subdev_info = vpif_capture_sdev_info,
676 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
677 .chan_config[0] = {
678 .inputs = dm6467_ch0_inputs,
679 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
680 .vpif_if = {
681 .if_type = VPIF_IF_BT656,
682 .hd_pol = 1,
683 .vd_pol = 1,
684 .fid_pol = 0,
685 },
686 },
687 .chan_config[1] = {
688 .inputs = dm6467_ch1_inputs,
689 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
690 .vpif_if = {
691 .if_type = VPIF_IF_BT656,
692 .hd_pol = 1,
693 .vd_pol = 1,
694 .fid_pol = 0,
695 },
696 },
697};
698
699static void __init evm_init_video(void)
700{
701 spin_lock_init(&vpif_reg_lock);
702
703 dm646x_setup_vpif(&dm646x_vpif_display_config,
704 &dm646x_vpif_capture_cfg);
705}
706
707static void __init evm_init_i2c(void)
708{
709 davinci_init_i2c(&i2c_pdata);
710 i2c_add_driver(&dm6467evm_cpld_driver);
711 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
712 evm_init_cpld();
713 evm_init_video();
714}
715
716#define CDCE949_XIN_RATE 27000000
717
718
719static struct clk cdce_clk_in = {
720 .name = "cdce_xin",
721 .rate = CDCE949_XIN_RATE,
722};
723
724static struct clk_lookup cdce_clks[] = {
725 CLK(NULL, "xin", &cdce_clk_in),
726 CLK(NULL, NULL, NULL),
727};
728
729static void __init cdce_clk_init(void)
730{
731 struct clk_lookup *c;
732 struct clk *clk;
733
734 for (c = cdce_clks; c->clk; c++) {
735 clk = c->clk;
736 clkdev_add(c);
737 clk_register(clk);
738 }
739}
740
741#define DM6467T_EVM_REF_FREQ 33000000
742
743static void __init davinci_map_io(void)
744{
745 dm646x_init();
746
747 if (machine_is_davinci_dm6467tevm())
748 davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
749
750 cdce_clk_init();
751}
752
753static struct davinci_uart_config uart_config __initdata = {
754 .enabled_uarts = (1 << 0),
755};
756
757#define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
758
759
760
761
762
763static const s16 dm646x_dma_rsv_chans[][2] = {
764
765 { 0, 4},
766 {13, 3},
767 {24, 4},
768 {30, 2},
769 {54, 3},
770 {-1, -1}
771};
772
773static const s16 dm646x_dma_rsv_slots[][2] = {
774
775 { 0, 4},
776 {13, 3},
777 {24, 4},
778 {30, 2},
779 {54, 3},
780 {128, 384},
781 {-1, -1}
782};
783
784static struct edma_rsv_info dm646x_edma_rsv[] = {
785 {
786 .rsv_chans = dm646x_dma_rsv_chans,
787 .rsv_slots = dm646x_dma_rsv_slots,
788 },
789};
790
791static __init void evm_init(void)
792{
793 struct davinci_soc_info *soc_info = &davinci_soc_info;
794
795 evm_init_i2c();
796 davinci_serial_init(&uart_config);
797 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
798 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
799
800 if (machine_is_davinci_dm6467tevm())
801 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
802
803 platform_device_register(&davinci_nand_device);
804
805 dm646x_init_edma(dm646x_edma_rsv);
806
807 if (HAS_ATA)
808 davinci_init_ide();
809
810 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
811}
812
813MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
814 .atag_offset = 0x100,
815 .map_io = davinci_map_io,
816 .init_irq = davinci_irq_init,
817 .init_time = davinci_timer_init,
818 .init_machine = evm_init,
819 .init_late = davinci_init_late,
820 .dma_zone_size = SZ_128M,
821 .restart = davinci_restart,
822MACHINE_END
823
824MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
825 .atag_offset = 0x100,
826 .map_io = davinci_map_io,
827 .init_irq = davinci_irq_init,
828 .init_time = davinci_timer_init,
829 .init_machine = evm_init,
830 .init_late = davinci_init_late,
831 .dma_zone_size = SZ_128M,
832 .restart = davinci_restart,
833MACHINE_END
834
835
