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11#ifndef __ASM_ARCH_MXC_COMMON_H__
12#define __ASM_ARCH_MXC_COMMON_H__
13
14struct platform_device;
15struct pt_regs;
16struct clk;
17enum mxc_cpu_pwr_mode;
18
19extern void mx1_map_io(void);
20extern void mx21_map_io(void);
21extern void mx25_map_io(void);
22extern void mx27_map_io(void);
23extern void mx31_map_io(void);
24extern void mx35_map_io(void);
25extern void mx51_map_io(void);
26extern void mx53_map_io(void);
27extern void imx1_init_early(void);
28extern void imx21_init_early(void);
29extern void imx25_init_early(void);
30extern void imx27_init_early(void);
31extern void imx31_init_early(void);
32extern void imx35_init_early(void);
33extern void imx51_init_early(void);
34extern void imx53_init_early(void);
35extern void mxc_init_irq(void __iomem *);
36extern void tzic_init_irq(void __iomem *);
37extern void mx1_init_irq(void);
38extern void mx21_init_irq(void);
39extern void mx25_init_irq(void);
40extern void mx27_init_irq(void);
41extern void mx31_init_irq(void);
42extern void mx35_init_irq(void);
43extern void mx51_init_irq(void);
44extern void mx53_init_irq(void);
45extern void imx1_soc_init(void);
46extern void imx21_soc_init(void);
47extern void imx25_soc_init(void);
48extern void imx27_soc_init(void);
49extern void imx31_soc_init(void);
50extern void imx35_soc_init(void);
51extern void imx51_soc_init(void);
52extern void imx51_init_late(void);
53extern void imx53_init_late(void);
54extern void epit_timer_init(void __iomem *base, int irq);
55extern void mxc_timer_init(void __iomem *, int);
56extern int mx1_clocks_init(unsigned long fref);
57extern int mx21_clocks_init(unsigned long lref, unsigned long fref);
58extern int mx25_clocks_init(void);
59extern int mx27_clocks_init(unsigned long fref);
60extern int mx31_clocks_init(unsigned long fref);
61extern int mx35_clocks_init(void);
62extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
63 unsigned long ckih1, unsigned long ckih2);
64extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
65 unsigned long ckih1, unsigned long ckih2);
66extern int mx25_clocks_init_dt(void);
67extern int mx27_clocks_init_dt(void);
68extern int mx31_clocks_init_dt(void);
69extern int mx51_clocks_init_dt(void);
70extern int mx53_clocks_init_dt(void);
71extern int mx6q_clocks_init(void);
72extern struct platform_device *mxc_register_gpio(char *name, int id,
73 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
74extern void mxc_set_cpu_type(unsigned int type);
75extern void mxc_restart(char, const char *);
76extern void mxc_arch_reset_init(void __iomem *);
77extern int mx53_revision(void);
78extern int imx6q_revision(void);
79extern int mx53_display_revision(void);
80extern void imx_set_aips(void __iomem *);
81extern int mxc_device_init(void);
82
83enum mxc_cpu_pwr_mode {
84 WAIT_CLOCKED,
85 WAIT_UNCLOCKED,
86 WAIT_UNCLOCKED_POWER_OFF,
87 STOP_POWER_ON,
88 STOP_POWER_OFF,
89};
90
91enum mx3_cpu_pwr_mode {
92 MX3_RUN,
93 MX3_WAIT,
94 MX3_DOZE,
95 MX3_SLEEP,
96};
97
98extern void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
99extern void imx_print_silicon_rev(const char *cpu, int srev);
100
101void avic_handle_irq(struct pt_regs *);
102void tzic_handle_irq(struct pt_regs *);
103
104#define imx1_handle_irq avic_handle_irq
105#define imx21_handle_irq avic_handle_irq
106#define imx25_handle_irq avic_handle_irq
107#define imx27_handle_irq avic_handle_irq
108#define imx31_handle_irq avic_handle_irq
109#define imx35_handle_irq avic_handle_irq
110#define imx51_handle_irq tzic_handle_irq
111#define imx53_handle_irq tzic_handle_irq
112
113extern void imx_enable_cpu(int cpu, bool enable);
114extern void imx_set_cpu_jump(int cpu, void *jump_addr);
115extern u32 imx_get_cpu_arg(int cpu);
116extern void imx_set_cpu_arg(int cpu, u32 arg);
117extern void v7_cpu_resume(void);
118#ifdef CONFIG_SMP
119extern void v7_secondary_startup(void);
120extern void imx_scu_map_io(void);
121extern void imx_smp_prepare(void);
122extern void imx_scu_standby_enable(void);
123#else
124static inline void imx_scu_map_io(void) {}
125static inline void imx_smp_prepare(void) {}
126static inline void imx_scu_standby_enable(void) {}
127#endif
128extern void imx_src_init(void);
129extern void imx_src_prepare_restart(void);
130extern void imx_gpc_init(void);
131extern void imx_gpc_pre_suspend(void);
132extern void imx_gpc_post_resume(void);
133extern void imx_gpc_mask_all(void);
134extern void imx_gpc_restore_all(void);
135extern void imx_anatop_init(void);
136extern void imx_anatop_pre_suspend(void);
137extern void imx_anatop_post_resume(void);
138extern void imx_anatop_usb_chrg_detect_disable(void);
139extern u32 imx_anatop_get_digprog(void);
140extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
141extern void imx6q_set_chicken_bit(void);
142
143extern void imx_cpu_die(unsigned int cpu);
144extern int imx_cpu_kill(unsigned int cpu);
145
146#ifdef CONFIG_PM
147extern void imx6q_pm_init(void);
148extern void imx51_pm_init(void);
149extern void imx53_pm_init(void);
150#else
151static inline void imx6q_pm_init(void) {}
152static inline void imx51_pm_init(void) {}
153static inline void imx53_pm_init(void) {}
154#endif
155
156#ifdef CONFIG_NEON
157extern int mx51_neon_fixup(void);
158#else
159static inline int mx51_neon_fixup(void) { return 0; }
160#endif
161
162extern struct smp_operations imx_smp_ops;
163
164#endif
165
