1#include <linux/device.h>
2#include <linux/cpu.h>
3#include <linux/smp.h>
4#include <linux/percpu.h>
5#include <linux/init.h>
6#include <linux/sched.h>
7#include <linux/export.h>
8#include <linux/nodemask.h>
9#include <linux/cpumask.h>
10#include <linux/notifier.h>
11
12#include <asm/current.h>
13#include <asm/processor.h>
14#include <asm/cputable.h>
15#include <asm/hvcall.h>
16#include <asm/prom.h>
17#include <asm/machdep.h>
18#include <asm/smp.h>
19#include <asm/pmc.h>
20#include <asm/firmware.h>
21#include <asm/ppc_asm.h>
22#include <asm/setup.h>
23
24#include "cacheinfo.h"
25
26#ifdef CONFIG_PPC64
27#include <asm/paca.h>
28#include <asm/lppaca.h>
29#endif
30
31static DEFINE_PER_CPU(struct cpu, cpu_devices);
32
33
34
35
36
37#ifdef CONFIG_PPC64
38
39
40DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
41
42static ssize_t store_smt_snooze_delay(struct device *dev,
43 struct device_attribute *attr,
44 const char *buf,
45 size_t count)
46{
47 struct cpu *cpu = container_of(dev, struct cpu, dev);
48 ssize_t ret;
49 long snooze;
50
51 ret = sscanf(buf, "%ld", &snooze);
52 if (ret != 1)
53 return -EINVAL;
54
55 per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
56 return count;
57}
58
59static ssize_t show_smt_snooze_delay(struct device *dev,
60 struct device_attribute *attr,
61 char *buf)
62{
63 struct cpu *cpu = container_of(dev, struct cpu, dev);
64
65 return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
66}
67
68static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
69 store_smt_snooze_delay);
70
71static int __init setup_smt_snooze_delay(char *str)
72{
73 unsigned int cpu;
74 long snooze;
75
76 if (!cpu_has_feature(CPU_FTR_SMT))
77 return 1;
78
79 snooze = simple_strtol(str, NULL, 10);
80 for_each_possible_cpu(cpu)
81 per_cpu(smt_snooze_delay, cpu) = snooze;
82
83 return 1;
84}
85__setup("smt-snooze-delay=", setup_smt_snooze_delay);
86
87#endif
88
89
90
91
92
93
94static DEFINE_PER_CPU(char, pmcs_enabled);
95
96void ppc_enable_pmcs(void)
97{
98 ppc_set_pmu_inuse(1);
99
100
101 if (__get_cpu_var(pmcs_enabled))
102 return;
103
104 __get_cpu_var(pmcs_enabled) = 1;
105
106 if (ppc_md.enable_pmcs)
107 ppc_md.enable_pmcs();
108}
109EXPORT_SYMBOL(ppc_enable_pmcs);
110
111#define __SYSFS_SPRSETUP_READ_WRITE(NAME, ADDRESS, EXTRA) \
112static void read_##NAME(void *val) \
113{ \
114 *(unsigned long *)val = mfspr(ADDRESS); \
115} \
116static void write_##NAME(void *val) \
117{ \
118 EXTRA; \
119 mtspr(ADDRESS, *(unsigned long *)val); \
120}
121
122#define __SYSFS_SPRSETUP_SHOW_STORE(NAME) \
123static ssize_t show_##NAME(struct device *dev, \
124 struct device_attribute *attr, \
125 char *buf) \
126{ \
127 struct cpu *cpu = container_of(dev, struct cpu, dev); \
128 unsigned long val; \
129 smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1); \
130 return sprintf(buf, "%lx\n", val); \
131} \
132static ssize_t __used \
133 store_##NAME(struct device *dev, struct device_attribute *attr, \
134 const char *buf, size_t count) \
135{ \
136 struct cpu *cpu = container_of(dev, struct cpu, dev); \
137 unsigned long val; \
138 int ret = sscanf(buf, "%lx", &val); \
139 if (ret != 1) \
140 return -EINVAL; \
141 smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
142 return count; \
143}
144
145#define SYSFS_PMCSETUP(NAME, ADDRESS) \
146 __SYSFS_SPRSETUP_READ_WRITE(NAME, ADDRESS, ppc_enable_pmcs()) \
147 __SYSFS_SPRSETUP_SHOW_STORE(NAME)
148#define SYSFS_SPRSETUP(NAME, ADDRESS) \
149 __SYSFS_SPRSETUP_READ_WRITE(NAME, ADDRESS, ) \
150 __SYSFS_SPRSETUP_SHOW_STORE(NAME)
151
152#define SYSFS_SPRSETUP_SHOW_STORE(NAME) \
153 __SYSFS_SPRSETUP_SHOW_STORE(NAME)
154
155
156
157
158
159#if defined(CONFIG_PPC64)
160#define HAS_PPC_PMC_CLASSIC 1
161#define HAS_PPC_PMC_IBM 1
162#define HAS_PPC_PMC_PA6T 1
163#elif defined(CONFIG_6xx)
164#define HAS_PPC_PMC_CLASSIC 1
165#define HAS_PPC_PMC_IBM 1
166#define HAS_PPC_PMC_G4 1
167#endif
168
169
170#ifdef HAS_PPC_PMC_CLASSIC
171SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
172SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
173SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
174SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
175SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
176SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
177SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
178SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
179
180#ifdef HAS_PPC_PMC_G4
181SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
182#endif
183
184#ifdef CONFIG_PPC64
185SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
186SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
187
188SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
189SYSFS_SPRSETUP(purr, SPRN_PURR);
190SYSFS_SPRSETUP(spurr, SPRN_SPURR);
191SYSFS_SPRSETUP(pir, SPRN_PIR);
192
193#ifdef CONFIG_PPC_BOOK3S_64
194extern bool rfi_flush;
195static ssize_t show_rfi_flush(struct device *dev,
196 struct device_attribute *attr, char *buf)
197{
198 return sprintf(buf, "%d\n", rfi_flush ? 1 : 0);
199}
200
201static ssize_t __used store_rfi_flush(struct device *dev,
202 struct device_attribute *attr, const char *buf,
203 size_t count)
204{
205 int val;
206 int ret = 0;
207
208 ret = sscanf(buf, "%d", &val);
209 if (ret != 1)
210 return -EINVAL;
211
212 if (val == 1)
213 rfi_flush_enable(true);
214 else if (val == 0)
215 rfi_flush_enable(false);
216 else
217 return -EINVAL;
218
219 return count;
220}
221
222static DEVICE_ATTR(rfi_flush, 0600,
223 show_rfi_flush, store_rfi_flush);
224
225static void sysfs_create_rfi_flush(void)
226{
227 device_create_file(cpu_subsys.dev_root, &dev_attr_rfi_flush);
228}
229#endif
230
231
232
233
234
235
236static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
237static DEVICE_ATTR(spurr, 0400, show_spurr, NULL);
238static DEVICE_ATTR(purr, 0400, show_purr, store_purr);
239static DEVICE_ATTR(pir, 0400, show_pir, NULL);
240
241static unsigned long dscr_default;
242
243static void read_dscr(void *val)
244{
245 *(unsigned long *)val = get_paca()->dscr_default;
246}
247
248static void write_dscr(void *val)
249{
250 get_paca()->dscr_default = *(unsigned long *)val;
251 if (!current->thread.dscr_inherit) {
252 current->thread.dscr = *(unsigned long *)val;
253 mtspr(SPRN_DSCR, *(unsigned long *)val);
254 }
255}
256
257SYSFS_SPRSETUP_SHOW_STORE(dscr);
258static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
259
260static void add_write_permission_dev_attr(struct device_attribute *attr)
261{
262 attr->attr.mode |= 0200;
263}
264
265static ssize_t show_dscr_default(struct device *dev,
266 struct device_attribute *attr, char *buf)
267{
268 return sprintf(buf, "%lx\n", dscr_default);
269}
270
271static ssize_t __used store_dscr_default(struct device *dev,
272 struct device_attribute *attr, const char *buf,
273 size_t count)
274{
275 unsigned long val;
276 int ret = 0;
277
278 ret = sscanf(buf, "%lx", &val);
279 if (ret != 1)
280 return -EINVAL;
281 dscr_default = val;
282
283 on_each_cpu(write_dscr, &val, 1);
284
285 return count;
286}
287
288static DEVICE_ATTR(dscr_default, 0600,
289 show_dscr_default, store_dscr_default);
290
291static void sysfs_create_dscr_default(void)
292{
293 int err = 0;
294 if (cpu_has_feature(CPU_FTR_DSCR))
295 err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
296}
297#endif
298
299#ifdef HAS_PPC_PMC_PA6T
300SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
301SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
302SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
303SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
304SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
305SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
306#ifdef CONFIG_DEBUG_KERNEL
307SYSFS_SPRSETUP(hid0, SPRN_HID0);
308SYSFS_SPRSETUP(hid1, SPRN_HID1);
309SYSFS_SPRSETUP(hid4, SPRN_HID4);
310SYSFS_SPRSETUP(hid5, SPRN_HID5);
311SYSFS_SPRSETUP(ima0, SPRN_PA6T_IMA0);
312SYSFS_SPRSETUP(ima1, SPRN_PA6T_IMA1);
313SYSFS_SPRSETUP(ima2, SPRN_PA6T_IMA2);
314SYSFS_SPRSETUP(ima3, SPRN_PA6T_IMA3);
315SYSFS_SPRSETUP(ima4, SPRN_PA6T_IMA4);
316SYSFS_SPRSETUP(ima5, SPRN_PA6T_IMA5);
317SYSFS_SPRSETUP(ima6, SPRN_PA6T_IMA6);
318SYSFS_SPRSETUP(ima7, SPRN_PA6T_IMA7);
319SYSFS_SPRSETUP(ima8, SPRN_PA6T_IMA8);
320SYSFS_SPRSETUP(ima9, SPRN_PA6T_IMA9);
321SYSFS_SPRSETUP(imaat, SPRN_PA6T_IMAAT);
322SYSFS_SPRSETUP(btcr, SPRN_PA6T_BTCR);
323SYSFS_SPRSETUP(pccr, SPRN_PA6T_PCCR);
324SYSFS_SPRSETUP(rpccr, SPRN_PA6T_RPCCR);
325SYSFS_SPRSETUP(der, SPRN_PA6T_DER);
326SYSFS_SPRSETUP(mer, SPRN_PA6T_MER);
327SYSFS_SPRSETUP(ber, SPRN_PA6T_BER);
328SYSFS_SPRSETUP(ier, SPRN_PA6T_IER);
329SYSFS_SPRSETUP(sier, SPRN_PA6T_SIER);
330SYSFS_SPRSETUP(siar, SPRN_PA6T_SIAR);
331SYSFS_SPRSETUP(tsr0, SPRN_PA6T_TSR0);
332SYSFS_SPRSETUP(tsr1, SPRN_PA6T_TSR1);
333SYSFS_SPRSETUP(tsr2, SPRN_PA6T_TSR2);
334SYSFS_SPRSETUP(tsr3, SPRN_PA6T_TSR3);
335#endif
336#endif
337
338#ifdef HAS_PPC_PMC_IBM
339static struct device_attribute ibm_common_attrs[] = {
340 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
341 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
342};
343#endif
344
345#ifdef HAS_PPC_PMC_G4
346static struct device_attribute g4_common_attrs[] = {
347 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
348 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
349 __ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
350};
351#endif
352
353static struct device_attribute classic_pmc_attrs[] = {
354 __ATTR(pmc1, 0600, show_pmc1, store_pmc1),
355 __ATTR(pmc2, 0600, show_pmc2, store_pmc2),
356 __ATTR(pmc3, 0600, show_pmc3, store_pmc3),
357 __ATTR(pmc4, 0600, show_pmc4, store_pmc4),
358 __ATTR(pmc5, 0600, show_pmc5, store_pmc5),
359 __ATTR(pmc6, 0600, show_pmc6, store_pmc6),
360#ifdef CONFIG_PPC64
361 __ATTR(pmc7, 0600, show_pmc7, store_pmc7),
362 __ATTR(pmc8, 0600, show_pmc8, store_pmc8),
363#endif
364};
365
366#ifdef HAS_PPC_PMC_PA6T
367static struct device_attribute pa6t_attrs[] = {
368 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
369 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
370 __ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
371 __ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
372 __ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
373 __ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
374 __ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
375 __ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
376#ifdef CONFIG_DEBUG_KERNEL
377 __ATTR(hid0, 0600, show_hid0, store_hid0),
378 __ATTR(hid1, 0600, show_hid1, store_hid1),
379 __ATTR(hid4, 0600, show_hid4, store_hid4),
380 __ATTR(hid5, 0600, show_hid5, store_hid5),
381 __ATTR(ima0, 0600, show_ima0, store_ima0),
382 __ATTR(ima1, 0600, show_ima1, store_ima1),
383 __ATTR(ima2, 0600, show_ima2, store_ima2),
384 __ATTR(ima3, 0600, show_ima3, store_ima3),
385 __ATTR(ima4, 0600, show_ima4, store_ima4),
386 __ATTR(ima5, 0600, show_ima5, store_ima5),
387 __ATTR(ima6, 0600, show_ima6, store_ima6),
388 __ATTR(ima7, 0600, show_ima7, store_ima7),
389 __ATTR(ima8, 0600, show_ima8, store_ima8),
390 __ATTR(ima9, 0600, show_ima9, store_ima9),
391 __ATTR(imaat, 0600, show_imaat, store_imaat),
392 __ATTR(btcr, 0600, show_btcr, store_btcr),
393 __ATTR(pccr, 0600, show_pccr, store_pccr),
394 __ATTR(rpccr, 0600, show_rpccr, store_rpccr),
395 __ATTR(der, 0600, show_der, store_der),
396 __ATTR(mer, 0600, show_mer, store_mer),
397 __ATTR(ber, 0600, show_ber, store_ber),
398 __ATTR(ier, 0600, show_ier, store_ier),
399 __ATTR(sier, 0600, show_sier, store_sier),
400 __ATTR(siar, 0600, show_siar, store_siar),
401 __ATTR(tsr0, 0600, show_tsr0, store_tsr0),
402 __ATTR(tsr1, 0600, show_tsr1, store_tsr1),
403 __ATTR(tsr2, 0600, show_tsr2, store_tsr2),
404 __ATTR(tsr3, 0600, show_tsr3, store_tsr3),
405#endif
406};
407#endif
408#endif
409
410static void register_cpu_online(unsigned int cpu)
411{
412 struct cpu *c = &per_cpu(cpu_devices, cpu);
413 struct device *s = &c->dev;
414 struct device_attribute *attrs, *pmc_attrs;
415 int i, nattrs;
416
417#ifdef CONFIG_PPC64
418 if (cpu_has_feature(CPU_FTR_SMT))
419 device_create_file(s, &dev_attr_smt_snooze_delay);
420#endif
421
422
423 switch (cur_cpu_spec->pmc_type) {
424#ifdef HAS_PPC_PMC_IBM
425 case PPC_PMC_IBM:
426 attrs = ibm_common_attrs;
427 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
428 pmc_attrs = classic_pmc_attrs;
429 break;
430#endif
431#ifdef HAS_PPC_PMC_G4
432 case PPC_PMC_G4:
433 attrs = g4_common_attrs;
434 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
435 pmc_attrs = classic_pmc_attrs;
436 break;
437#endif
438#ifdef HAS_PPC_PMC_PA6T
439 case PPC_PMC_PA6T:
440
441 attrs = pa6t_attrs;
442 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
443 pmc_attrs = NULL;
444 break;
445#endif
446 default:
447 attrs = NULL;
448 nattrs = 0;
449 pmc_attrs = NULL;
450 }
451
452 for (i = 0; i < nattrs; i++)
453 device_create_file(s, &attrs[i]);
454
455 if (pmc_attrs)
456 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
457 device_create_file(s, &pmc_attrs[i]);
458
459#ifdef CONFIG_PPC64
460 if (cpu_has_feature(CPU_FTR_MMCRA))
461 device_create_file(s, &dev_attr_mmcra);
462
463 if (cpu_has_feature(CPU_FTR_PURR)) {
464 if (!firmware_has_feature(FW_FEATURE_LPAR))
465 add_write_permission_dev_attr(&dev_attr_purr);
466 device_create_file(s, &dev_attr_purr);
467 }
468
469 if (cpu_has_feature(CPU_FTR_SPURR))
470 device_create_file(s, &dev_attr_spurr);
471
472 if (cpu_has_feature(CPU_FTR_DSCR))
473 device_create_file(s, &dev_attr_dscr);
474
475 if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
476 device_create_file(s, &dev_attr_pir);
477#endif
478
479 cacheinfo_cpu_online(cpu);
480}
481
482#ifdef CONFIG_HOTPLUG_CPU
483static void unregister_cpu_online(unsigned int cpu)
484{
485 struct cpu *c = &per_cpu(cpu_devices, cpu);
486 struct device *s = &c->dev;
487 struct device_attribute *attrs, *pmc_attrs;
488 int i, nattrs;
489
490 BUG_ON(!c->hotpluggable);
491
492#ifdef CONFIG_PPC64
493 if (cpu_has_feature(CPU_FTR_SMT))
494 device_remove_file(s, &dev_attr_smt_snooze_delay);
495#endif
496
497
498 switch (cur_cpu_spec->pmc_type) {
499#ifdef HAS_PPC_PMC_IBM
500 case PPC_PMC_IBM:
501 attrs = ibm_common_attrs;
502 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
503 pmc_attrs = classic_pmc_attrs;
504 break;
505#endif
506#ifdef HAS_PPC_PMC_G4
507 case PPC_PMC_G4:
508 attrs = g4_common_attrs;
509 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
510 pmc_attrs = classic_pmc_attrs;
511 break;
512#endif
513#ifdef HAS_PPC_PMC_PA6T
514 case PPC_PMC_PA6T:
515
516 attrs = pa6t_attrs;
517 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
518 pmc_attrs = NULL;
519 break;
520#endif
521 default:
522 attrs = NULL;
523 nattrs = 0;
524 pmc_attrs = NULL;
525 }
526
527 for (i = 0; i < nattrs; i++)
528 device_remove_file(s, &attrs[i]);
529
530 if (pmc_attrs)
531 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
532 device_remove_file(s, &pmc_attrs[i]);
533
534#ifdef CONFIG_PPC64
535 if (cpu_has_feature(CPU_FTR_MMCRA))
536 device_remove_file(s, &dev_attr_mmcra);
537
538 if (cpu_has_feature(CPU_FTR_PURR))
539 device_remove_file(s, &dev_attr_purr);
540
541 if (cpu_has_feature(CPU_FTR_SPURR))
542 device_remove_file(s, &dev_attr_spurr);
543
544 if (cpu_has_feature(CPU_FTR_DSCR))
545 device_remove_file(s, &dev_attr_dscr);
546
547 if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
548 device_remove_file(s, &dev_attr_pir);
549#endif
550
551 cacheinfo_cpu_offline(cpu);
552}
553
554#ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
555ssize_t arch_cpu_probe(const char *buf, size_t count)
556{
557 if (ppc_md.cpu_probe)
558 return ppc_md.cpu_probe(buf, count);
559
560 return -EINVAL;
561}
562
563ssize_t arch_cpu_release(const char *buf, size_t count)
564{
565 if (ppc_md.cpu_release)
566 return ppc_md.cpu_release(buf, count);
567
568 return -EINVAL;
569}
570#endif
571
572#endif
573
574static int sysfs_cpu_notify(struct notifier_block *self,
575 unsigned long action, void *hcpu)
576{
577 unsigned int cpu = (unsigned int)(long)hcpu;
578
579 switch (action) {
580 case CPU_ONLINE:
581 case CPU_ONLINE_FROZEN:
582 register_cpu_online(cpu);
583 break;
584#ifdef CONFIG_HOTPLUG_CPU
585 case CPU_DEAD:
586 case CPU_DEAD_FROZEN:
587 unregister_cpu_online(cpu);
588 break;
589#endif
590 }
591 return NOTIFY_OK;
592}
593
594static struct notifier_block sysfs_cpu_nb = {
595 .notifier_call = sysfs_cpu_notify,
596};
597
598static DEFINE_MUTEX(cpu_mutex);
599
600int cpu_add_dev_attr(struct device_attribute *attr)
601{
602 int cpu;
603
604 mutex_lock(&cpu_mutex);
605
606 for_each_possible_cpu(cpu) {
607 device_create_file(get_cpu_device(cpu), attr);
608 }
609
610 mutex_unlock(&cpu_mutex);
611 return 0;
612}
613EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
614
615int cpu_add_dev_attr_group(struct attribute_group *attrs)
616{
617 int cpu;
618 struct device *dev;
619 int ret;
620
621 mutex_lock(&cpu_mutex);
622
623 for_each_possible_cpu(cpu) {
624 dev = get_cpu_device(cpu);
625 ret = sysfs_create_group(&dev->kobj, attrs);
626 WARN_ON(ret != 0);
627 }
628
629 mutex_unlock(&cpu_mutex);
630 return 0;
631}
632EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
633
634
635void cpu_remove_dev_attr(struct device_attribute *attr)
636{
637 int cpu;
638
639 mutex_lock(&cpu_mutex);
640
641 for_each_possible_cpu(cpu) {
642 device_remove_file(get_cpu_device(cpu), attr);
643 }
644
645 mutex_unlock(&cpu_mutex);
646}
647EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
648
649void cpu_remove_dev_attr_group(struct attribute_group *attrs)
650{
651 int cpu;
652 struct device *dev;
653
654 mutex_lock(&cpu_mutex);
655
656 for_each_possible_cpu(cpu) {
657 dev = get_cpu_device(cpu);
658 sysfs_remove_group(&dev->kobj, attrs);
659 }
660
661 mutex_unlock(&cpu_mutex);
662}
663EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
664
665
666
667
668#ifdef CONFIG_NUMA
669static void register_nodes(void)
670{
671 int i;
672
673 for (i = 0; i < MAX_NUMNODES; i++)
674 register_one_node(i);
675}
676
677int sysfs_add_device_to_node(struct device *dev, int nid)
678{
679 struct node *node = node_devices[nid];
680 return sysfs_create_link(&node->dev.kobj, &dev->kobj,
681 kobject_name(&dev->kobj));
682}
683EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
684
685void sysfs_remove_device_from_node(struct device *dev, int nid)
686{
687 struct node *node = node_devices[nid];
688 sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
689}
690EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
691
692#else
693static void register_nodes(void)
694{
695 return;
696}
697
698#endif
699
700
701static ssize_t show_physical_id(struct device *dev,
702 struct device_attribute *attr, char *buf)
703{
704 struct cpu *cpu = container_of(dev, struct cpu, dev);
705
706 return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
707}
708static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
709
710static int __init topology_init(void)
711{
712 int cpu;
713
714 register_nodes();
715
716 cpu_notifier_register_begin();
717
718 for_each_possible_cpu(cpu) {
719 struct cpu *c = &per_cpu(cpu_devices, cpu);
720
721
722
723
724
725
726
727
728 if (ppc_md.cpu_die)
729 c->hotpluggable = 1;
730
731 if (cpu_online(cpu) || c->hotpluggable) {
732 register_cpu(c, cpu);
733
734 device_create_file(&c->dev, &dev_attr_physical_id);
735 }
736
737 if (cpu_online(cpu))
738 register_cpu_online(cpu);
739 }
740
741 __register_cpu_notifier(&sysfs_cpu_nb);
742
743 cpu_notifier_register_done();
744
745#ifdef CONFIG_PPC64
746 sysfs_create_dscr_default();
747#ifdef CONFIG_PPC_BOOK3S
748 sysfs_create_rfi_flush();
749#endif
750#endif
751
752 return 0;
753}
754subsys_initcall(topology_init);
755
