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26#include <drm/drmP.h>
27#include <drm/drm_crtc.h>
28#include <drm/drm_fourcc.h>
29
30#include "nouveau_drv.h"
31
32#include "nouveau_bo.h"
33#include "nouveau_connector.h"
34#include "nouveau_display.h"
35#include "nvreg.h"
36#include "disp.h"
37
38struct nouveau_plane {
39 struct drm_plane base;
40 bool flip;
41 struct nouveau_bo *cur;
42
43 struct {
44 struct drm_property *colorkey;
45 struct drm_property *contrast;
46 struct drm_property *brightness;
47 struct drm_property *hue;
48 struct drm_property *saturation;
49 struct drm_property *iturbt_709;
50 } props;
51
52 int colorkey;
53 int contrast;
54 int brightness;
55 int hue;
56 int saturation;
57 int iturbt_709;
58
59 void (*set_params)(struct nouveau_plane *);
60};
61
62static uint32_t formats[] = {
63 DRM_FORMAT_YUYV,
64 DRM_FORMAT_UYVY,
65 DRM_FORMAT_NV12,
66 DRM_FORMAT_NV21,
67};
68
69
70
71
72
73
74
75static inline int
76sin_mul(int degrees, int factor)
77{
78 if (degrees > 180) {
79 degrees -= 180;
80 factor *= -1;
81 }
82 return factor * 4 * degrees * (180 - degrees) /
83 (40500 - degrees * (180 - degrees));
84}
85
86
87static inline int
88cos_mul(int degrees, int factor)
89{
90 return sin_mul((degrees + 90) % 360, factor);
91}
92
93static int
94verify_scaling(const struct drm_framebuffer *fb, uint8_t shift,
95 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h,
96 uint32_t crtc_w, uint32_t crtc_h)
97{
98 if (crtc_w < (src_w >> shift) || crtc_h < (src_h >> shift)) {
99 DRM_DEBUG_KMS("Unsuitable framebuffer scaling: %dx%d -> %dx%d\n",
100 src_w, src_h, crtc_w, crtc_h);
101 return -ERANGE;
102 }
103
104 if (src_x != 0 || src_y != 0) {
105 DRM_DEBUG_KMS("Unsuitable framebuffer offset: %d,%d\n",
106 src_x, src_y);
107 return -ERANGE;
108 }
109
110 return 0;
111}
112
113static int
114nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
115 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
116 unsigned int crtc_w, unsigned int crtc_h,
117 uint32_t src_x, uint32_t src_y,
118 uint32_t src_w, uint32_t src_h,
119 struct drm_modeset_acquire_ctx *ctx)
120{
121 struct nouveau_drm *drm = nouveau_drm(plane->dev);
122 struct nvif_object *dev = &drm->client.device.object;
123 struct nouveau_plane *nv_plane =
124 container_of(plane, struct nouveau_plane, base);
125 struct nouveau_framebuffer *nv_fb = nouveau_framebuffer(fb);
126 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
127 struct nouveau_bo *cur = nv_plane->cur;
128 bool flip = nv_plane->flip;
129 int soff = NV_PCRTC0_SIZE * nv_crtc->index;
130 int soff2 = NV_PCRTC0_SIZE * !nv_crtc->index;
131 unsigned shift = drm->client.device.info.chipset >= 0x30 ? 1 : 3;
132 unsigned format = 0;
133 int ret;
134
135
136 src_x >>= 16;
137 src_y >>= 16;
138 src_w >>= 16;
139 src_h >>= 16;
140
141 ret = verify_scaling(fb, shift, 0, 0, src_w, src_h, crtc_w, crtc_h);
142 if (ret)
143 return ret;
144
145 ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM, false);
146 if (ret)
147 return ret;
148
149 nv_plane->cur = nv_fb->nvbo;
150
151 nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff, NV_CRTC_FSEL_OVERLAY, NV_CRTC_FSEL_OVERLAY);
152 nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff2, NV_CRTC_FSEL_OVERLAY, 0);
153
154 nvif_wr32(dev, NV_PVIDEO_BASE(flip), 0);
155 nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_fb->nvbo->bo.offset);
156 nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w);
157 nvif_wr32(dev, NV_PVIDEO_POINT_IN(flip), src_y << 16 | src_x);
158 nvif_wr32(dev, NV_PVIDEO_DS_DX(flip), (src_w << 20) / crtc_w);
159 nvif_wr32(dev, NV_PVIDEO_DT_DY(flip), (src_h << 20) / crtc_h);
160 nvif_wr32(dev, NV_PVIDEO_POINT_OUT(flip), crtc_y << 16 | crtc_x);
161 nvif_wr32(dev, NV_PVIDEO_SIZE_OUT(flip), crtc_h << 16 | crtc_w);
162
163 if (fb->format->format == DRM_FORMAT_YUYV ||
164 fb->format->format == DRM_FORMAT_NV12)
165 format |= NV_PVIDEO_FORMAT_COLOR_LE_CR8YB8CB8YA8;
166 if (fb->format->format == DRM_FORMAT_NV12 ||
167 fb->format->format == DRM_FORMAT_NV21)
168 format |= NV_PVIDEO_FORMAT_PLANAR;
169 if (nv_plane->iturbt_709)
170 format |= NV_PVIDEO_FORMAT_MATRIX_ITURBT709;
171 if (nv_plane->colorkey & (1 << 24))
172 format |= NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY;
173
174 if (format & NV_PVIDEO_FORMAT_PLANAR) {
175 nvif_wr32(dev, NV_PVIDEO_UVPLANE_BASE(flip), 0);
176 nvif_wr32(dev, NV_PVIDEO_UVPLANE_OFFSET_BUFF(flip),
177 nv_fb->nvbo->bo.offset + fb->offsets[1]);
178 }
179 nvif_wr32(dev, NV_PVIDEO_FORMAT(flip), format | fb->pitches[0]);
180 nvif_wr32(dev, NV_PVIDEO_STOP, 0);
181
182 nvif_wr32(dev, NV_PVIDEO_BUFFER, flip ? 0x10 : 0x1);
183 nv_plane->flip = !flip;
184
185 if (cur)
186 nouveau_bo_unpin(cur);
187
188 return 0;
189}
190
191static int
192nv10_disable_plane(struct drm_plane *plane,
193 struct drm_modeset_acquire_ctx *ctx)
194{
195 struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object;
196 struct nouveau_plane *nv_plane =
197 container_of(plane, struct nouveau_plane, base);
198
199 nvif_wr32(dev, NV_PVIDEO_STOP, 1);
200 if (nv_plane->cur) {
201 nouveau_bo_unpin(nv_plane->cur);
202 nv_plane->cur = NULL;
203 }
204
205 return 0;
206}
207
208static void
209nv_destroy_plane(struct drm_plane *plane)
210{
211 drm_plane_force_disable(plane);
212 drm_plane_cleanup(plane);
213 kfree(plane);
214}
215
216static void
217nv10_set_params(struct nouveau_plane *plane)
218{
219 struct nvif_object *dev = &nouveau_drm(plane->base.dev)->client.device.object;
220 u32 luma = (plane->brightness - 512) << 16 | plane->contrast;
221 u32 chroma = ((sin_mul(plane->hue, plane->saturation) & 0xffff) << 16) |
222 (cos_mul(plane->hue, plane->saturation) & 0xffff);
223 u32 format = 0;
224
225 nvif_wr32(dev, NV_PVIDEO_LUMINANCE(0), luma);
226 nvif_wr32(dev, NV_PVIDEO_LUMINANCE(1), luma);
227 nvif_wr32(dev, NV_PVIDEO_CHROMINANCE(0), chroma);
228 nvif_wr32(dev, NV_PVIDEO_CHROMINANCE(1), chroma);
229 nvif_wr32(dev, NV_PVIDEO_COLOR_KEY, plane->colorkey & 0xffffff);
230
231 if (plane->cur) {
232 if (plane->iturbt_709)
233 format |= NV_PVIDEO_FORMAT_MATRIX_ITURBT709;
234 if (plane->colorkey & (1 << 24))
235 format |= NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY;
236 nvif_mask(dev, NV_PVIDEO_FORMAT(plane->flip),
237 NV_PVIDEO_FORMAT_MATRIX_ITURBT709 |
238 NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY,
239 format);
240 }
241}
242
243static int
244nv_set_property(struct drm_plane *plane,
245 struct drm_property *property,
246 uint64_t value)
247{
248 struct nouveau_plane *nv_plane =
249 container_of(plane, struct nouveau_plane, base);
250
251 if (property == nv_plane->props.colorkey)
252 nv_plane->colorkey = value;
253 else if (property == nv_plane->props.contrast)
254 nv_plane->contrast = value;
255 else if (property == nv_plane->props.brightness)
256 nv_plane->brightness = value;
257 else if (property == nv_plane->props.hue)
258 nv_plane->hue = value;
259 else if (property == nv_plane->props.saturation)
260 nv_plane->saturation = value;
261 else if (property == nv_plane->props.iturbt_709)
262 nv_plane->iturbt_709 = value;
263 else
264 return -EINVAL;
265
266 if (nv_plane->set_params)
267 nv_plane->set_params(nv_plane);
268 return 0;
269}
270
271static const struct drm_plane_funcs nv10_plane_funcs = {
272 .update_plane = nv10_update_plane,
273 .disable_plane = nv10_disable_plane,
274 .set_property = nv_set_property,
275 .destroy = nv_destroy_plane,
276};
277
278static void
279nv10_overlay_init(struct drm_device *device)
280{
281 struct nouveau_drm *drm = nouveau_drm(device);
282 struct nouveau_plane *plane = kzalloc(sizeof(struct nouveau_plane), GFP_KERNEL);
283 unsigned int num_formats = ARRAY_SIZE(formats);
284 int ret;
285
286 if (!plane)
287 return;
288
289 switch (drm->client.device.info.chipset) {
290 case 0x10:
291 case 0x11:
292 case 0x15:
293 case 0x1a:
294 case 0x20:
295 num_formats = 2;
296 break;
297 }
298
299 ret = drm_plane_init(device, &plane->base, 3 ,
300 &nv10_plane_funcs,
301 formats, num_formats, false);
302 if (ret)
303 goto err;
304
305
306 plane->props.colorkey = drm_property_create_range(
307 device, 0, "colorkey", 0, 0x01ffffff);
308 plane->props.contrast = drm_property_create_range(
309 device, 0, "contrast", 0, 8192 - 1);
310 plane->props.brightness = drm_property_create_range(
311 device, 0, "brightness", 0, 1024);
312 plane->props.hue = drm_property_create_range(
313 device, 0, "hue", 0, 359);
314 plane->props.saturation = drm_property_create_range(
315 device, 0, "saturation", 0, 8192 - 1);
316 plane->props.iturbt_709 = drm_property_create_range(
317 device, 0, "iturbt_709", 0, 1);
318 if (!plane->props.colorkey ||
319 !plane->props.contrast ||
320 !plane->props.brightness ||
321 !plane->props.hue ||
322 !plane->props.saturation ||
323 !plane->props.iturbt_709)
324 goto cleanup;
325
326 plane->colorkey = 0;
327 drm_object_attach_property(&plane->base.base,
328 plane->props.colorkey, plane->colorkey);
329
330 plane->contrast = 0x1000;
331 drm_object_attach_property(&plane->base.base,
332 plane->props.contrast, plane->contrast);
333
334 plane->brightness = 512;
335 drm_object_attach_property(&plane->base.base,
336 plane->props.brightness, plane->brightness);
337
338 plane->hue = 0;
339 drm_object_attach_property(&plane->base.base,
340 plane->props.hue, plane->hue);
341
342 plane->saturation = 0x1000;
343 drm_object_attach_property(&plane->base.base,
344 plane->props.saturation, plane->saturation);
345
346 plane->iturbt_709 = 0;
347 drm_object_attach_property(&plane->base.base,
348 plane->props.iturbt_709, plane->iturbt_709);
349
350 plane->set_params = nv10_set_params;
351 nv10_set_params(plane);
352 drm_plane_force_disable(&plane->base);
353 return;
354cleanup:
355 drm_plane_cleanup(&plane->base);
356err:
357 kfree(plane);
358 NV_ERROR(drm, "Failed to create plane\n");
359}
360
361static int
362nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
363 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
364 unsigned int crtc_w, unsigned int crtc_h,
365 uint32_t src_x, uint32_t src_y,
366 uint32_t src_w, uint32_t src_h,
367 struct drm_modeset_acquire_ctx *ctx)
368{
369 struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object;
370 struct nouveau_plane *nv_plane =
371 container_of(plane, struct nouveau_plane, base);
372 struct nouveau_framebuffer *nv_fb = nouveau_framebuffer(fb);
373 struct nouveau_bo *cur = nv_plane->cur;
374 uint32_t overlay = 1;
375 int brightness = (nv_plane->brightness - 512) * 62 / 512;
376 int ret, i;
377
378
379 src_x >>= 16;
380 src_y >>= 16;
381 src_w >>= 16;
382 src_h >>= 16;
383
384 ret = verify_scaling(fb, 0, src_x, src_y, src_w, src_h, crtc_w, crtc_h);
385 if (ret)
386 return ret;
387
388 ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM, false);
389 if (ret)
390 return ret;
391
392 nv_plane->cur = nv_fb->nvbo;
393
394 nvif_wr32(dev, NV_PVIDEO_OE_STATE, 0);
395 nvif_wr32(dev, NV_PVIDEO_SU_STATE, 0);
396 nvif_wr32(dev, NV_PVIDEO_RM_STATE, 0);
397
398 for (i = 0; i < 2; i++) {
399 nvif_wr32(dev, NV_PVIDEO_BUFF0_START_ADDRESS + 4 * i,
400 nv_fb->nvbo->bo.offset);
401 nvif_wr32(dev, NV_PVIDEO_BUFF0_PITCH_LENGTH + 4 * i,
402 fb->pitches[0]);
403 nvif_wr32(dev, NV_PVIDEO_BUFF0_OFFSET + 4 * i, 0);
404 }
405 nvif_wr32(dev, NV_PVIDEO_WINDOW_START, crtc_y << 16 | crtc_x);
406 nvif_wr32(dev, NV_PVIDEO_WINDOW_SIZE, crtc_h << 16 | crtc_w);
407 nvif_wr32(dev, NV_PVIDEO_STEP_SIZE,
408 (uint32_t)(((src_h - 1) << 11) / (crtc_h - 1)) << 16 | (uint32_t)(((src_w - 1) << 11) / (crtc_w - 1)));
409
410
411 nvif_wr32(dev, NV_PVIDEO_RED_CSC_OFFSET, 0x69 - brightness);
412 nvif_wr32(dev, NV_PVIDEO_GREEN_CSC_OFFSET, 0x3e + brightness);
413 nvif_wr32(dev, NV_PVIDEO_BLUE_CSC_OFFSET, 0x89 - brightness);
414 nvif_wr32(dev, NV_PVIDEO_CSC_ADJUST, 0);
415
416 nvif_wr32(dev, NV_PVIDEO_CONTROL_Y, 0x001);
417 nvif_wr32(dev, NV_PVIDEO_CONTROL_X, 0x111);
418
419 nvif_wr32(dev, NV_PVIDEO_FIFO_BURST_LENGTH, 0x03);
420 nvif_wr32(dev, NV_PVIDEO_FIFO_THRES_SIZE, 0x38);
421
422 nvif_wr32(dev, NV_PVIDEO_KEY, nv_plane->colorkey);
423
424 if (nv_plane->colorkey & (1 << 24))
425 overlay |= 0x10;
426 if (fb->format->format == DRM_FORMAT_YUYV)
427 overlay |= 0x100;
428
429 nvif_wr32(dev, NV_PVIDEO_OVERLAY, overlay);
430
431 nvif_wr32(dev, NV_PVIDEO_SU_STATE, nvif_rd32(dev, NV_PVIDEO_SU_STATE) ^ (1 << 16));
432
433 if (cur)
434 nouveau_bo_unpin(cur);
435
436 return 0;
437}
438
439static int
440nv04_disable_plane(struct drm_plane *plane,
441 struct drm_modeset_acquire_ctx *ctx)
442{
443 struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object;
444 struct nouveau_plane *nv_plane =
445 container_of(plane, struct nouveau_plane, base);
446
447 nvif_mask(dev, NV_PVIDEO_OVERLAY, 1, 0);
448 nvif_wr32(dev, NV_PVIDEO_OE_STATE, 0);
449 nvif_wr32(dev, NV_PVIDEO_SU_STATE, 0);
450 nvif_wr32(dev, NV_PVIDEO_RM_STATE, 0);
451 if (nv_plane->cur) {
452 nouveau_bo_unpin(nv_plane->cur);
453 nv_plane->cur = NULL;
454 }
455
456 return 0;
457}
458
459static const struct drm_plane_funcs nv04_plane_funcs = {
460 .update_plane = nv04_update_plane,
461 .disable_plane = nv04_disable_plane,
462 .set_property = nv_set_property,
463 .destroy = nv_destroy_plane,
464};
465
466static void
467nv04_overlay_init(struct drm_device *device)
468{
469 struct nouveau_drm *drm = nouveau_drm(device);
470 struct nouveau_plane *plane = kzalloc(sizeof(struct nouveau_plane), GFP_KERNEL);
471 int ret;
472
473 if (!plane)
474 return;
475
476 ret = drm_plane_init(device, &plane->base, 1 ,
477 &nv04_plane_funcs,
478 formats, 2, false);
479 if (ret)
480 goto err;
481
482
483 plane->props.colorkey = drm_property_create_range(
484 device, 0, "colorkey", 0, 0x01ffffff);
485 plane->props.brightness = drm_property_create_range(
486 device, 0, "brightness", 0, 1024);
487 if (!plane->props.colorkey ||
488 !plane->props.brightness)
489 goto cleanup;
490
491 plane->colorkey = 0;
492 drm_object_attach_property(&plane->base.base,
493 plane->props.colorkey, plane->colorkey);
494
495 plane->brightness = 512;
496 drm_object_attach_property(&plane->base.base,
497 plane->props.brightness, plane->brightness);
498
499 drm_plane_force_disable(&plane->base);
500 return;
501cleanup:
502 drm_plane_cleanup(&plane->base);
503err:
504 kfree(plane);
505 NV_ERROR(drm, "Failed to create plane\n");
506}
507
508void
509nouveau_overlay_init(struct drm_device *device)
510{
511 struct nvif_device *dev = &nouveau_drm(device)->client.device;
512 if (dev->info.chipset < 0x10)
513 nv04_overlay_init(device);
514 else if (dev->info.chipset <= 0x40)
515 nv10_overlay_init(device);
516}
517
