linux/drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c
<<
>>
Prefs
   1/*
   2 * Copyright 2015 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs <bskeggs@redhat.com>
  23 */
  24#include "priv.h"
  25#include "chan.h"
  26
  27#include <engine/fifo.h>
  28
  29bool
  30nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data)
  31{
  32        struct nvkm_sw_chan *chan;
  33        bool handled = false;
  34        unsigned long flags;
  35
  36        spin_lock_irqsave(&sw->engine.lock, flags);
  37        list_for_each_entry(chan, &sw->chan, head) {
  38                if (chan->fifo->chid == chid) {
  39                        handled = nvkm_sw_chan_mthd(chan, subc, mthd, data);
  40                        list_del(&chan->head);
  41                        list_add(&chan->head, &sw->chan);
  42                        break;
  43                }
  44        }
  45        spin_unlock_irqrestore(&sw->engine.lock, flags);
  46        return handled;
  47}
  48
  49static int
  50nvkm_sw_oclass_new(const struct nvkm_oclass *oclass, void *data, u32 size,
  51                   struct nvkm_object **pobject)
  52{
  53        struct nvkm_sw_chan *chan = nvkm_sw_chan(oclass->parent);
  54        const struct nvkm_sw_chan_sclass *sclass = oclass->engn;
  55        return sclass->ctor(chan, oclass, data, size, pobject);
  56}
  57
  58static int
  59nvkm_sw_oclass_get(struct nvkm_oclass *oclass, int index)
  60{
  61        struct nvkm_sw *sw = nvkm_sw(oclass->engine);
  62        int c = 0;
  63
  64        while (sw->func->sclass[c].ctor) {
  65                if (c++ == index) {
  66                        oclass->engn = &sw->func->sclass[index];
  67                        oclass->base =  sw->func->sclass[index].base;
  68                        oclass->base.ctor = nvkm_sw_oclass_new;
  69                        return index;
  70                }
  71        }
  72
  73        return c;
  74}
  75
  76static int
  77nvkm_sw_cclass_get(struct nvkm_fifo_chan *fifoch,
  78                   const struct nvkm_oclass *oclass,
  79                   struct nvkm_object **pobject)
  80{
  81        struct nvkm_sw *sw = nvkm_sw(oclass->engine);
  82        return sw->func->chan_new(sw, fifoch, oclass, pobject);
  83}
  84
  85static void *
  86nvkm_sw_dtor(struct nvkm_engine *engine)
  87{
  88        return nvkm_sw(engine);
  89}
  90
  91static const struct nvkm_engine_func
  92nvkm_sw = {
  93        .dtor = nvkm_sw_dtor,
  94        .fifo.cclass = nvkm_sw_cclass_get,
  95        .fifo.sclass = nvkm_sw_oclass_get,
  96};
  97
  98int
  99nvkm_sw_new_(const struct nvkm_sw_func *func, struct nvkm_device *device,
 100             int index, struct nvkm_sw **psw)
 101{
 102        struct nvkm_sw *sw;
 103
 104        if (!(sw = *psw = kzalloc(sizeof(*sw), GFP_KERNEL)))
 105                return -ENOMEM;
 106        INIT_LIST_HEAD(&sw->chan);
 107        sw->func = func;
 108
 109        return nvkm_engine_ctor(&nvkm_sw, device, index, true, &sw->engine);
 110}
 111