linux/drivers/media/i2c/mt9t001.c
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   1/*
   2 * Driver for MT9T001 CMOS Image Sensor from Aptina (Micron)
   3 *
   4 * Copyright (C) 2010-2011, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
   5 *
   6 * Based on the MT9M001 driver,
   7 *
   8 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License version 2 as
  12 * published by the Free Software Foundation.
  13 */
  14
  15#include <linux/i2c.h>
  16#include <linux/module.h>
  17#include <linux/log2.h>
  18#include <linux/slab.h>
  19#include <linux/videodev2.h>
  20#include <linux/v4l2-mediabus.h>
  21
  22#include <media/mt9t001.h>
  23#include <media/v4l2-ctrls.h>
  24#include <media/v4l2-device.h>
  25#include <media/v4l2-subdev.h>
  26
  27#define MT9T001_PIXEL_ARRAY_HEIGHT                      1568
  28#define MT9T001_PIXEL_ARRAY_WIDTH                       2112
  29
  30#define MT9T001_CHIP_VERSION                            0x00
  31#define         MT9T001_CHIP_ID                         0x1621
  32#define MT9T001_ROW_START                               0x01
  33#define         MT9T001_ROW_START_MIN                   0
  34#define         MT9T001_ROW_START_DEF                   20
  35#define         MT9T001_ROW_START_MAX                   1534
  36#define MT9T001_COLUMN_START                            0x02
  37#define         MT9T001_COLUMN_START_MIN                0
  38#define         MT9T001_COLUMN_START_DEF                32
  39#define         MT9T001_COLUMN_START_MAX                2046
  40#define MT9T001_WINDOW_HEIGHT                           0x03
  41#define         MT9T001_WINDOW_HEIGHT_MIN               1
  42#define         MT9T001_WINDOW_HEIGHT_DEF               1535
  43#define         MT9T001_WINDOW_HEIGHT_MAX               1567
  44#define MT9T001_WINDOW_WIDTH                            0x04
  45#define         MT9T001_WINDOW_WIDTH_MIN                1
  46#define         MT9T001_WINDOW_WIDTH_DEF                2047
  47#define         MT9T001_WINDOW_WIDTH_MAX                2111
  48#define MT9T001_HORIZONTAL_BLANKING                     0x05
  49#define         MT9T001_HORIZONTAL_BLANKING_MIN         21
  50#define         MT9T001_HORIZONTAL_BLANKING_MAX         1023
  51#define MT9T001_VERTICAL_BLANKING                       0x06
  52#define         MT9T001_VERTICAL_BLANKING_MIN           3
  53#define         MT9T001_VERTICAL_BLANKING_MAX           1023
  54#define MT9T001_OUTPUT_CONTROL                          0x07
  55#define         MT9T001_OUTPUT_CONTROL_SYNC             (1 << 0)
  56#define         MT9T001_OUTPUT_CONTROL_CHIP_ENABLE      (1 << 1)
  57#define         MT9T001_OUTPUT_CONTROL_TEST_DATA        (1 << 6)
  58#define MT9T001_SHUTTER_WIDTH_HIGH                      0x08
  59#define MT9T001_SHUTTER_WIDTH_LOW                       0x09
  60#define         MT9T001_SHUTTER_WIDTH_MIN               1
  61#define         MT9T001_SHUTTER_WIDTH_DEF               1561
  62#define         MT9T001_SHUTTER_WIDTH_MAX               (1024 * 1024)
  63#define MT9T001_PIXEL_CLOCK                             0x0a
  64#define         MT9T001_PIXEL_CLOCK_INVERT              (1 << 15)
  65#define         MT9T001_PIXEL_CLOCK_SHIFT_MASK          (7 << 8)
  66#define         MT9T001_PIXEL_CLOCK_SHIFT_SHIFT         8
  67#define         MT9T001_PIXEL_CLOCK_DIVIDE_MASK         (0x7f << 0)
  68#define MT9T001_FRAME_RESTART                           0x0b
  69#define MT9T001_SHUTTER_DELAY                           0x0c
  70#define         MT9T001_SHUTTER_DELAY_MAX               2047
  71#define MT9T001_RESET                                   0x0d
  72#define MT9T001_READ_MODE1                              0x1e
  73#define         MT9T001_READ_MODE_SNAPSHOT              (1 << 8)
  74#define         MT9T001_READ_MODE_STROBE_ENABLE         (1 << 9)
  75#define         MT9T001_READ_MODE_STROBE_WIDTH          (1 << 10)
  76#define         MT9T001_READ_MODE_STROBE_OVERRIDE       (1 << 11)
  77#define MT9T001_READ_MODE2                              0x20
  78#define         MT9T001_READ_MODE_BAD_FRAMES            (1 << 0)
  79#define         MT9T001_READ_MODE_LINE_VALID_CONTINUOUS (1 << 9)
  80#define         MT9T001_READ_MODE_LINE_VALID_FRAME      (1 << 10)
  81#define MT9T001_READ_MODE3                              0x21
  82#define         MT9T001_READ_MODE_GLOBAL_RESET          (1 << 0)
  83#define         MT9T001_READ_MODE_GHST_CTL              (1 << 1)
  84#define MT9T001_ROW_ADDRESS_MODE                        0x22
  85#define         MT9T001_ROW_SKIP_MASK                   (7 << 0)
  86#define         MT9T001_ROW_BIN_MASK                    (3 << 3)
  87#define         MT9T001_ROW_BIN_SHIFT                   3
  88#define MT9T001_COLUMN_ADDRESS_MODE                     0x23
  89#define         MT9T001_COLUMN_SKIP_MASK                (7 << 0)
  90#define         MT9T001_COLUMN_BIN_MASK                 (3 << 3)
  91#define         MT9T001_COLUMN_BIN_SHIFT                3
  92#define MT9T001_GREEN1_GAIN                             0x2b
  93#define MT9T001_BLUE_GAIN                               0x2c
  94#define MT9T001_RED_GAIN                                0x2d
  95#define MT9T001_GREEN2_GAIN                             0x2e
  96#define MT9T001_TEST_DATA                               0x32
  97#define MT9T001_GLOBAL_GAIN                             0x35
  98#define         MT9T001_GLOBAL_GAIN_MIN                 8
  99#define         MT9T001_GLOBAL_GAIN_MAX                 1024
 100#define MT9T001_BLACK_LEVEL                             0x49
 101#define MT9T001_ROW_BLACK_DEFAULT_OFFSET                0x4b
 102#define MT9T001_BLC_DELTA_THRESHOLDS                    0x5d
 103#define MT9T001_CAL_THRESHOLDS                          0x5f
 104#define MT9T001_GREEN1_OFFSET                           0x60
 105#define MT9T001_GREEN2_OFFSET                           0x61
 106#define MT9T001_BLACK_LEVEL_CALIBRATION                 0x62
 107#define         MT9T001_BLACK_LEVEL_OVERRIDE            (1 << 0)
 108#define         MT9T001_BLACK_LEVEL_DISABLE_OFFSET      (1 << 1)
 109#define         MT9T001_BLACK_LEVEL_RECALCULATE         (1 << 12)
 110#define         MT9T001_BLACK_LEVEL_LOCK_RED_BLUE       (1 << 13)
 111#define         MT9T001_BLACK_LEVEL_LOCK_GREEN          (1 << 14)
 112#define MT9T001_RED_OFFSET                              0x63
 113#define MT9T001_BLUE_OFFSET                             0x64
 114
 115struct mt9t001 {
 116        struct v4l2_subdev subdev;
 117        struct media_pad pad;
 118
 119        struct v4l2_mbus_framefmt format;
 120        struct v4l2_rect crop;
 121
 122        struct v4l2_ctrl_handler ctrls;
 123        struct v4l2_ctrl *gains[4];
 124
 125        u16 output_control;
 126        u16 black_level;
 127};
 128
 129static inline struct mt9t001 *to_mt9t001(struct v4l2_subdev *sd)
 130{
 131        return container_of(sd, struct mt9t001, subdev);
 132}
 133
 134static int mt9t001_read(struct i2c_client *client, u8 reg)
 135{
 136        return i2c_smbus_read_word_swapped(client, reg);
 137}
 138
 139static int mt9t001_write(struct i2c_client *client, u8 reg, u16 data)
 140{
 141        return i2c_smbus_write_word_swapped(client, reg, data);
 142}
 143
 144static int mt9t001_set_output_control(struct mt9t001 *mt9t001, u16 clear,
 145                                      u16 set)
 146{
 147        struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
 148        u16 value = (mt9t001->output_control & ~clear) | set;
 149        int ret;
 150
 151        if (value == mt9t001->output_control)
 152                return 0;
 153
 154        ret = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, value);
 155        if (ret < 0)
 156                return ret;
 157
 158        mt9t001->output_control = value;
 159        return 0;
 160}
 161
 162/* -----------------------------------------------------------------------------
 163 * V4L2 subdev video operations
 164 */
 165
 166static struct v4l2_mbus_framefmt *
 167__mt9t001_get_pad_format(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
 168                         unsigned int pad, enum v4l2_subdev_format_whence which)
 169{
 170        switch (which) {
 171        case V4L2_SUBDEV_FORMAT_TRY:
 172                return v4l2_subdev_get_try_format(fh, pad);
 173        case V4L2_SUBDEV_FORMAT_ACTIVE:
 174                return &mt9t001->format;
 175        default:
 176                return NULL;
 177        }
 178}
 179
 180static struct v4l2_rect *
 181__mt9t001_get_pad_crop(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
 182                       unsigned int pad, enum v4l2_subdev_format_whence which)
 183{
 184        switch (which) {
 185        case V4L2_SUBDEV_FORMAT_TRY:
 186                return v4l2_subdev_get_try_crop(fh, pad);
 187        case V4L2_SUBDEV_FORMAT_ACTIVE:
 188                return &mt9t001->crop;
 189        default:
 190                return NULL;
 191        }
 192}
 193
 194static int mt9t001_s_stream(struct v4l2_subdev *subdev, int enable)
 195{
 196        const u16 mode = MT9T001_OUTPUT_CONTROL_CHIP_ENABLE;
 197        struct i2c_client *client = v4l2_get_subdevdata(subdev);
 198        struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 199        struct v4l2_mbus_framefmt *format = &mt9t001->format;
 200        struct v4l2_rect *crop = &mt9t001->crop;
 201        unsigned int hratio;
 202        unsigned int vratio;
 203        int ret;
 204
 205        if (!enable)
 206                return mt9t001_set_output_control(mt9t001, mode, 0);
 207
 208        /* Configure the window size and row/column bin */
 209        hratio = DIV_ROUND_CLOSEST(crop->width, format->width);
 210        vratio = DIV_ROUND_CLOSEST(crop->height, format->height);
 211
 212        ret = mt9t001_write(client, MT9T001_ROW_ADDRESS_MODE, hratio - 1);
 213        if (ret < 0)
 214                return ret;
 215
 216        ret = mt9t001_write(client, MT9T001_COLUMN_ADDRESS_MODE, vratio - 1);
 217        if (ret < 0)
 218                return ret;
 219
 220        ret = mt9t001_write(client, MT9T001_COLUMN_START, crop->left);
 221        if (ret < 0)
 222                return ret;
 223
 224        ret = mt9t001_write(client, MT9T001_ROW_START, crop->top);
 225        if (ret < 0)
 226                return ret;
 227
 228        ret = mt9t001_write(client, MT9T001_WINDOW_WIDTH, crop->width - 1);
 229        if (ret < 0)
 230                return ret;
 231
 232        ret = mt9t001_write(client, MT9T001_WINDOW_HEIGHT, crop->height - 1);
 233        if (ret < 0)
 234                return ret;
 235
 236        /* Switch to master "normal" mode */
 237        return mt9t001_set_output_control(mt9t001, 0, mode);
 238}
 239
 240static int mt9t001_enum_mbus_code(struct v4l2_subdev *subdev,
 241                                  struct v4l2_subdev_fh *fh,
 242                                  struct v4l2_subdev_mbus_code_enum *code)
 243{
 244        if (code->index > 0)
 245                return -EINVAL;
 246
 247        code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
 248        return 0;
 249}
 250
 251static int mt9t001_enum_frame_size(struct v4l2_subdev *subdev,
 252                                   struct v4l2_subdev_fh *fh,
 253                                   struct v4l2_subdev_frame_size_enum *fse)
 254{
 255        if (fse->index >= 8 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
 256                return -EINVAL;
 257
 258        fse->min_width = (MT9T001_WINDOW_WIDTH_DEF + 1) / fse->index;
 259        fse->max_width = fse->min_width;
 260        fse->min_height = (MT9T001_WINDOW_HEIGHT_DEF + 1) / fse->index;
 261        fse->max_height = fse->min_height;
 262
 263        return 0;
 264}
 265
 266static int mt9t001_get_format(struct v4l2_subdev *subdev,
 267                              struct v4l2_subdev_fh *fh,
 268                              struct v4l2_subdev_format *format)
 269{
 270        struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 271
 272        format->format = *__mt9t001_get_pad_format(mt9t001, fh, format->pad,
 273                                                   format->which);
 274        return 0;
 275}
 276
 277static int mt9t001_set_format(struct v4l2_subdev *subdev,
 278                              struct v4l2_subdev_fh *fh,
 279                              struct v4l2_subdev_format *format)
 280{
 281        struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 282        struct v4l2_mbus_framefmt *__format;
 283        struct v4l2_rect *__crop;
 284        unsigned int width;
 285        unsigned int height;
 286        unsigned int hratio;
 287        unsigned int vratio;
 288
 289        __crop = __mt9t001_get_pad_crop(mt9t001, fh, format->pad,
 290                                        format->which);
 291
 292        /* Clamp the width and height to avoid dividing by zero. */
 293        width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
 294                        max(__crop->width / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
 295                        __crop->width);
 296        height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
 297                         max(__crop->height / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
 298                         __crop->height);
 299
 300        hratio = DIV_ROUND_CLOSEST(__crop->width, width);
 301        vratio = DIV_ROUND_CLOSEST(__crop->height, height);
 302
 303        __format = __mt9t001_get_pad_format(mt9t001, fh, format->pad,
 304                                            format->which);
 305        __format->width = __crop->width / hratio;
 306        __format->height = __crop->height / vratio;
 307
 308        format->format = *__format;
 309
 310        return 0;
 311}
 312
 313static int mt9t001_get_crop(struct v4l2_subdev *subdev,
 314                            struct v4l2_subdev_fh *fh,
 315                            struct v4l2_subdev_crop *crop)
 316{
 317        struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 318
 319        crop->rect = *__mt9t001_get_pad_crop(mt9t001, fh, crop->pad,
 320                                             crop->which);
 321        return 0;
 322}
 323
 324static int mt9t001_set_crop(struct v4l2_subdev *subdev,
 325                            struct v4l2_subdev_fh *fh,
 326                            struct v4l2_subdev_crop *crop)
 327{
 328        struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 329        struct v4l2_mbus_framefmt *__format;
 330        struct v4l2_rect *__crop;
 331        struct v4l2_rect rect;
 332
 333        /* Clamp the crop rectangle boundaries and align them to a multiple of 2
 334         * pixels.
 335         */
 336        rect.left = clamp(ALIGN(crop->rect.left, 2),
 337                          MT9T001_COLUMN_START_MIN,
 338                          MT9T001_COLUMN_START_MAX);
 339        rect.top = clamp(ALIGN(crop->rect.top, 2),
 340                         MT9T001_ROW_START_MIN,
 341                         MT9T001_ROW_START_MAX);
 342        rect.width = clamp(ALIGN(crop->rect.width, 2),
 343                           MT9T001_WINDOW_WIDTH_MIN + 1,
 344                           MT9T001_WINDOW_WIDTH_MAX + 1);
 345        rect.height = clamp(ALIGN(crop->rect.height, 2),
 346                            MT9T001_WINDOW_HEIGHT_MIN + 1,
 347                            MT9T001_WINDOW_HEIGHT_MAX + 1);
 348
 349        rect.width = min(rect.width, MT9T001_PIXEL_ARRAY_WIDTH - rect.left);
 350        rect.height = min(rect.height, MT9T001_PIXEL_ARRAY_HEIGHT - rect.top);
 351
 352        __crop = __mt9t001_get_pad_crop(mt9t001, fh, crop->pad, crop->which);
 353
 354        if (rect.width != __crop->width || rect.height != __crop->height) {
 355                /* Reset the output image size if the crop rectangle size has
 356                 * been modified.
 357                 */
 358                __format = __mt9t001_get_pad_format(mt9t001, fh, crop->pad,
 359                                                    crop->which);
 360                __format->width = rect.width;
 361                __format->height = rect.height;
 362        }
 363
 364        *__crop = rect;
 365        crop->rect = rect;
 366
 367        return 0;
 368}
 369
 370/* -----------------------------------------------------------------------------
 371 * V4L2 subdev control operations
 372 */
 373
 374#define V4L2_CID_TEST_PATTERN_COLOR     (V4L2_CID_USER_BASE | 0x1001)
 375#define V4L2_CID_BLACK_LEVEL_AUTO       (V4L2_CID_USER_BASE | 0x1002)
 376#define V4L2_CID_BLACK_LEVEL_OFFSET     (V4L2_CID_USER_BASE | 0x1003)
 377#define V4L2_CID_BLACK_LEVEL_CALIBRATE  (V4L2_CID_USER_BASE | 0x1004)
 378
 379#define V4L2_CID_GAIN_RED               (V4L2_CTRL_CLASS_CAMERA | 0x1001)
 380#define V4L2_CID_GAIN_GREEN_RED         (V4L2_CTRL_CLASS_CAMERA | 0x1002)
 381#define V4L2_CID_GAIN_GREEN_BLUE        (V4L2_CTRL_CLASS_CAMERA | 0x1003)
 382#define V4L2_CID_GAIN_BLUE              (V4L2_CTRL_CLASS_CAMERA | 0x1004)
 383
 384static u16 mt9t001_gain_value(s32 *gain)
 385{
 386        /* Gain is controlled by 2 analog stages and a digital stage. Valid
 387         * values for the 3 stages are
 388         *
 389         * Stage                Min     Max     Step
 390         * ------------------------------------------
 391         * First analog stage   x1      x2      1
 392         * Second analog stage  x1      x4      0.125
 393         * Digital stage        x1      x16     0.125
 394         *
 395         * To minimize noise, the gain stages should be used in the second
 396         * analog stage, first analog stage, digital stage order. Gain from a
 397         * previous stage should be pushed to its maximum value before the next
 398         * stage is used.
 399         */
 400        if (*gain <= 32)
 401                return *gain;
 402
 403        if (*gain <= 64) {
 404                *gain &= ~1;
 405                return (1 << 6) | (*gain >> 1);
 406        }
 407
 408        *gain &= ~7;
 409        return ((*gain - 64) << 5) | (1 << 6) | 32;
 410}
 411
 412static int mt9t001_ctrl_freeze(struct mt9t001 *mt9t001, bool freeze)
 413{
 414        return mt9t001_set_output_control(mt9t001,
 415                freeze ? 0 : MT9T001_OUTPUT_CONTROL_SYNC,
 416                freeze ? MT9T001_OUTPUT_CONTROL_SYNC : 0);
 417}
 418
 419static int mt9t001_s_ctrl(struct v4l2_ctrl *ctrl)
 420{
 421        static const u8 gains[4] = {
 422                MT9T001_RED_GAIN, MT9T001_GREEN1_GAIN,
 423                MT9T001_GREEN2_GAIN, MT9T001_BLUE_GAIN
 424        };
 425
 426        struct mt9t001 *mt9t001 =
 427                        container_of(ctrl->handler, struct mt9t001, ctrls);
 428        struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
 429        unsigned int count;
 430        unsigned int i;
 431        u16 value;
 432        int ret;
 433
 434        switch (ctrl->id) {
 435        case V4L2_CID_GAIN_RED:
 436        case V4L2_CID_GAIN_GREEN_RED:
 437        case V4L2_CID_GAIN_GREEN_BLUE:
 438        case V4L2_CID_GAIN_BLUE:
 439
 440                /* Disable control updates if more than one control has changed
 441                 * in the cluster.
 442                 */
 443                for (i = 0, count = 0; i < 4; ++i) {
 444                        struct v4l2_ctrl *gain = mt9t001->gains[i];
 445
 446                        if (gain->val != gain->cur.val)
 447                                count++;
 448                }
 449
 450                if (count > 1) {
 451                        ret = mt9t001_ctrl_freeze(mt9t001, true);
 452                        if (ret < 0)
 453                                return ret;
 454                }
 455
 456                /* Update the gain controls. */
 457                for (i = 0; i < 4; ++i) {
 458                        struct v4l2_ctrl *gain = mt9t001->gains[i];
 459
 460                        if (gain->val == gain->cur.val)
 461                                continue;
 462
 463                        value = mt9t001_gain_value(&gain->val);
 464                        ret = mt9t001_write(client, gains[i], value);
 465                        if (ret < 0) {
 466                                mt9t001_ctrl_freeze(mt9t001, false);
 467                                return ret;
 468                        }
 469                }
 470
 471                /* Enable control updates. */
 472                if (count > 1) {
 473                        ret = mt9t001_ctrl_freeze(mt9t001, false);
 474                        if (ret < 0)
 475                                return ret;
 476                }
 477
 478                break;
 479
 480        case V4L2_CID_EXPOSURE:
 481                ret = mt9t001_write(client, MT9T001_SHUTTER_WIDTH_LOW,
 482                                    ctrl->val & 0xffff);
 483                if (ret < 0)
 484                        return ret;
 485
 486                return mt9t001_write(client, MT9T001_SHUTTER_WIDTH_HIGH,
 487                                     ctrl->val >> 16);
 488
 489        case V4L2_CID_TEST_PATTERN:
 490                return mt9t001_set_output_control(mt9t001,
 491                        ctrl->val ? 0 : MT9T001_OUTPUT_CONTROL_TEST_DATA,
 492                        ctrl->val ? MT9T001_OUTPUT_CONTROL_TEST_DATA : 0);
 493
 494        case V4L2_CID_TEST_PATTERN_COLOR:
 495                return mt9t001_write(client, MT9T001_TEST_DATA, ctrl->val << 2);
 496
 497        case V4L2_CID_BLACK_LEVEL_AUTO:
 498                value = ctrl->val ? 0 : MT9T001_BLACK_LEVEL_OVERRIDE;
 499                ret = mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
 500                                    value);
 501                if (ret < 0)
 502                        return ret;
 503
 504                mt9t001->black_level = value;
 505                break;
 506
 507        case V4L2_CID_BLACK_LEVEL_OFFSET:
 508                ret = mt9t001_write(client, MT9T001_GREEN1_OFFSET, ctrl->val);
 509                if (ret < 0)
 510                        return ret;
 511
 512                ret = mt9t001_write(client, MT9T001_GREEN2_OFFSET, ctrl->val);
 513                if (ret < 0)
 514                        return ret;
 515
 516                ret = mt9t001_write(client, MT9T001_RED_OFFSET, ctrl->val);
 517                if (ret < 0)
 518                        return ret;
 519
 520                return mt9t001_write(client, MT9T001_BLUE_OFFSET, ctrl->val);
 521
 522        case V4L2_CID_BLACK_LEVEL_CALIBRATE:
 523                return mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
 524                                     MT9T001_BLACK_LEVEL_RECALCULATE |
 525                                     mt9t001->black_level);
 526        }
 527
 528        return 0;
 529}
 530
 531static struct v4l2_ctrl_ops mt9t001_ctrl_ops = {
 532        .s_ctrl = mt9t001_s_ctrl,
 533};
 534
 535static const char * const mt9t001_test_pattern_menu[] = {
 536        "Disabled",
 537        "Enabled",
 538};
 539
 540static const struct v4l2_ctrl_config mt9t001_ctrls[] = {
 541        {
 542                .ops            = &mt9t001_ctrl_ops,
 543                .id             = V4L2_CID_TEST_PATTERN_COLOR,
 544                .type           = V4L2_CTRL_TYPE_INTEGER,
 545                .name           = "Test Pattern Color",
 546                .min            = 0,
 547                .max            = 1023,
 548                .step           = 1,
 549                .def            = 0,
 550                .flags          = 0,
 551        }, {
 552                .ops            = &mt9t001_ctrl_ops,
 553                .id             = V4L2_CID_BLACK_LEVEL_AUTO,
 554                .type           = V4L2_CTRL_TYPE_BOOLEAN,
 555                .name           = "Black Level, Auto",
 556                .min            = 0,
 557                .max            = 1,
 558                .step           = 1,
 559                .def            = 1,
 560                .flags          = 0,
 561        }, {
 562                .ops            = &mt9t001_ctrl_ops,
 563                .id             = V4L2_CID_BLACK_LEVEL_OFFSET,
 564                .type           = V4L2_CTRL_TYPE_INTEGER,
 565                .name           = "Black Level, Offset",
 566                .min            = -256,
 567                .max            = 255,
 568                .step           = 1,
 569                .def            = 32,
 570                .flags          = 0,
 571        }, {
 572                .ops            = &mt9t001_ctrl_ops,
 573                .id             = V4L2_CID_BLACK_LEVEL_CALIBRATE,
 574                .type           = V4L2_CTRL_TYPE_BUTTON,
 575                .name           = "Black Level, Calibrate",
 576                .min            = 0,
 577                .max            = 0,
 578                .step           = 0,
 579                .def            = 0,
 580                .flags          = V4L2_CTRL_FLAG_WRITE_ONLY,
 581        },
 582};
 583
 584static const struct v4l2_ctrl_config mt9t001_gains[] = {
 585        {
 586                .ops            = &mt9t001_ctrl_ops,
 587                .id             = V4L2_CID_GAIN_RED,
 588                .type           = V4L2_CTRL_TYPE_INTEGER,
 589                .name           = "Gain, Red",
 590                .min            = MT9T001_GLOBAL_GAIN_MIN,
 591                .max            = MT9T001_GLOBAL_GAIN_MAX,
 592                .step           = 1,
 593                .def            = MT9T001_GLOBAL_GAIN_MIN,
 594                .flags          = 0,
 595        }, {
 596                .ops            = &mt9t001_ctrl_ops,
 597                .id             = V4L2_CID_GAIN_GREEN_RED,
 598                .type           = V4L2_CTRL_TYPE_INTEGER,
 599                .name           = "Gain, Green (R)",
 600                .min            = MT9T001_GLOBAL_GAIN_MIN,
 601                .max            = MT9T001_GLOBAL_GAIN_MAX,
 602                .step           = 1,
 603                .def            = MT9T001_GLOBAL_GAIN_MIN,
 604                .flags          = 0,
 605        }, {
 606                .ops            = &mt9t001_ctrl_ops,
 607                .id             = V4L2_CID_GAIN_GREEN_BLUE,
 608                .type           = V4L2_CTRL_TYPE_INTEGER,
 609                .name           = "Gain, Green (B)",
 610                .min            = MT9T001_GLOBAL_GAIN_MIN,
 611                .max            = MT9T001_GLOBAL_GAIN_MAX,
 612                .step           = 1,
 613                .def            = MT9T001_GLOBAL_GAIN_MIN,
 614                .flags          = 0,
 615        }, {
 616                .ops            = &mt9t001_ctrl_ops,
 617                .id             = V4L2_CID_GAIN_BLUE,
 618                .type           = V4L2_CTRL_TYPE_INTEGER,
 619                .name           = "Gain, Blue",
 620                .min            = MT9T001_GLOBAL_GAIN_MIN,
 621                .max            = MT9T001_GLOBAL_GAIN_MAX,
 622                .step           = 1,
 623                .def            = MT9T001_GLOBAL_GAIN_MIN,
 624                .flags          = 0,
 625        },
 626};
 627
 628/* -----------------------------------------------------------------------------
 629 * V4L2 subdev internal operations
 630 */
 631
 632static int mt9t001_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
 633{
 634        struct v4l2_mbus_framefmt *format;
 635        struct v4l2_rect *crop;
 636
 637        crop = v4l2_subdev_get_try_crop(fh, 0);
 638        crop->left = MT9T001_COLUMN_START_DEF;
 639        crop->top = MT9T001_ROW_START_DEF;
 640        crop->width = MT9T001_WINDOW_WIDTH_DEF + 1;
 641        crop->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
 642
 643        format = v4l2_subdev_get_try_format(fh, 0);
 644        format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
 645        format->width = MT9T001_WINDOW_WIDTH_DEF + 1;
 646        format->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
 647        format->field = V4L2_FIELD_NONE;
 648        format->colorspace = V4L2_COLORSPACE_SRGB;
 649
 650        return 0;
 651}
 652
 653static struct v4l2_subdev_video_ops mt9t001_subdev_video_ops = {
 654        .s_stream = mt9t001_s_stream,
 655};
 656
 657static struct v4l2_subdev_pad_ops mt9t001_subdev_pad_ops = {
 658        .enum_mbus_code = mt9t001_enum_mbus_code,
 659        .enum_frame_size = mt9t001_enum_frame_size,
 660        .get_fmt = mt9t001_get_format,
 661        .set_fmt = mt9t001_set_format,
 662        .get_crop = mt9t001_get_crop,
 663        .set_crop = mt9t001_set_crop,
 664};
 665
 666static struct v4l2_subdev_ops mt9t001_subdev_ops = {
 667        .video = &mt9t001_subdev_video_ops,
 668        .pad = &mt9t001_subdev_pad_ops,
 669};
 670
 671static struct v4l2_subdev_internal_ops mt9t001_subdev_internal_ops = {
 672        .open = mt9t001_open,
 673};
 674
 675static int mt9t001_video_probe(struct i2c_client *client)
 676{
 677        struct mt9t001_platform_data *pdata = client->dev.platform_data;
 678        s32 data;
 679        int ret;
 680
 681        dev_info(&client->dev, "Probing MT9T001 at address 0x%02x\n",
 682                 client->addr);
 683
 684        /* Reset the chip and stop data read out */
 685        ret = mt9t001_write(client, MT9T001_RESET, 1);
 686        if (ret < 0)
 687                return ret;
 688
 689        ret = mt9t001_write(client, MT9T001_RESET, 0);
 690        if (ret < 0)
 691                return ret;
 692
 693        ret  = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, 0);
 694        if (ret < 0)
 695                return ret;
 696
 697        /* Configure the pixel clock polarity */
 698        if (pdata->clk_pol) {
 699                ret  = mt9t001_write(client, MT9T001_PIXEL_CLOCK,
 700                                     MT9T001_PIXEL_CLOCK_INVERT);
 701                if (ret < 0)
 702                        return ret;
 703        }
 704
 705        /* Read and check the sensor version */
 706        data = mt9t001_read(client, MT9T001_CHIP_VERSION);
 707        if (data != MT9T001_CHIP_ID) {
 708                dev_err(&client->dev, "MT9T001 not detected, wrong version "
 709                        "0x%04x\n", data);
 710                return -ENODEV;
 711        }
 712
 713        dev_info(&client->dev, "MT9T001 detected at address 0x%02x\n",
 714                 client->addr);
 715
 716        return ret;
 717}
 718
 719static int mt9t001_probe(struct i2c_client *client,
 720                         const struct i2c_device_id *did)
 721{
 722        struct mt9t001_platform_data *pdata = client->dev.platform_data;
 723        struct mt9t001 *mt9t001;
 724        unsigned int i;
 725        int ret;
 726
 727        if (pdata == NULL) {
 728                dev_err(&client->dev, "No platform data\n");
 729                return -EINVAL;
 730        }
 731
 732        if (!i2c_check_functionality(client->adapter,
 733                                     I2C_FUNC_SMBUS_WORD_DATA)) {
 734                dev_warn(&client->adapter->dev,
 735                         "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
 736                return -EIO;
 737        }
 738
 739        ret = mt9t001_video_probe(client);
 740        if (ret < 0)
 741                return ret;
 742
 743        mt9t001 = kzalloc(sizeof(*mt9t001), GFP_KERNEL);
 744        if (!mt9t001)
 745                return -ENOMEM;
 746
 747        v4l2_ctrl_handler_init(&mt9t001->ctrls, ARRAY_SIZE(mt9t001_ctrls) +
 748                                                ARRAY_SIZE(mt9t001_gains) + 4);
 749
 750        v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
 751                          V4L2_CID_EXPOSURE, MT9T001_SHUTTER_WIDTH_MIN,
 752                          MT9T001_SHUTTER_WIDTH_MAX, 1,
 753                          MT9T001_SHUTTER_WIDTH_DEF);
 754        v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
 755                          V4L2_CID_BLACK_LEVEL, 1, 1, 1, 1);
 756        v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
 757                          V4L2_CID_PIXEL_RATE, pdata->ext_clk, pdata->ext_clk,
 758                          1, pdata->ext_clk);
 759        v4l2_ctrl_new_std_menu_items(&mt9t001->ctrls, &mt9t001_ctrl_ops,
 760                        V4L2_CID_TEST_PATTERN,
 761                        ARRAY_SIZE(mt9t001_test_pattern_menu) - 1, 0,
 762                        0, mt9t001_test_pattern_menu);
 763
 764        for (i = 0; i < ARRAY_SIZE(mt9t001_ctrls); ++i)
 765                v4l2_ctrl_new_custom(&mt9t001->ctrls, &mt9t001_ctrls[i], NULL);
 766
 767        for (i = 0; i < ARRAY_SIZE(mt9t001_gains); ++i)
 768                mt9t001->gains[i] = v4l2_ctrl_new_custom(&mt9t001->ctrls,
 769                        &mt9t001_gains[i], NULL);
 770
 771        v4l2_ctrl_cluster(ARRAY_SIZE(mt9t001_gains), mt9t001->gains);
 772
 773        mt9t001->subdev.ctrl_handler = &mt9t001->ctrls;
 774
 775        if (mt9t001->ctrls.error) {
 776                printk(KERN_INFO "%s: control initialization error %d\n",
 777                       __func__, mt9t001->ctrls.error);
 778                ret = -EINVAL;
 779                goto done;
 780        }
 781
 782        mt9t001->crop.left = MT9T001_COLUMN_START_DEF;
 783        mt9t001->crop.top = MT9T001_ROW_START_DEF;
 784        mt9t001->crop.width = MT9T001_WINDOW_WIDTH_DEF + 1;
 785        mt9t001->crop.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
 786
 787        mt9t001->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
 788        mt9t001->format.width = MT9T001_WINDOW_WIDTH_DEF + 1;
 789        mt9t001->format.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
 790        mt9t001->format.field = V4L2_FIELD_NONE;
 791        mt9t001->format.colorspace = V4L2_COLORSPACE_SRGB;
 792
 793        v4l2_i2c_subdev_init(&mt9t001->subdev, client, &mt9t001_subdev_ops);
 794        mt9t001->subdev.internal_ops = &mt9t001_subdev_internal_ops;
 795        mt9t001->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 796
 797        mt9t001->pad.flags = MEDIA_PAD_FL_SOURCE;
 798        ret = media_entity_init(&mt9t001->subdev.entity, 1, &mt9t001->pad, 0);
 799
 800done:
 801        if (ret < 0) {
 802                v4l2_ctrl_handler_free(&mt9t001->ctrls);
 803                media_entity_cleanup(&mt9t001->subdev.entity);
 804                kfree(mt9t001);
 805        }
 806
 807        return ret;
 808}
 809
 810static int mt9t001_remove(struct i2c_client *client)
 811{
 812        struct v4l2_subdev *subdev = i2c_get_clientdata(client);
 813        struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 814
 815        v4l2_ctrl_handler_free(&mt9t001->ctrls);
 816        v4l2_device_unregister_subdev(subdev);
 817        media_entity_cleanup(&subdev->entity);
 818        kfree(mt9t001);
 819        return 0;
 820}
 821
 822static const struct i2c_device_id mt9t001_id[] = {
 823        { "mt9t001", 0 },
 824        { }
 825};
 826MODULE_DEVICE_TABLE(i2c, mt9t001_id);
 827
 828static struct i2c_driver mt9t001_driver = {
 829        .driver = {
 830                .name = "mt9t001",
 831        },
 832        .probe          = mt9t001_probe,
 833        .remove         = mt9t001_remove,
 834        .id_table       = mt9t001_id,
 835};
 836
 837module_i2c_driver(mt9t001_driver);
 838
 839MODULE_DESCRIPTION("Aptina (Micron) MT9T001 Camera driver");
 840MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
 841MODULE_LICENSE("GPL");
 842