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20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/types.h>
23#include <linux/slab.h>
24#include <linux/spinlock.h>
25#include <linux/platform_device.h>
26#include <linux/clk.h>
27#include <linux/io.h>
28#include <linux/err.h>
29#include <linux/pm_runtime.h>
30#include <linux/platform_data/usb-omap.h>
31#include <linux/of.h>
32
33#define USBTLL_DRIVER_NAME "usbhs_tll"
34
35
36#define OMAP_USBTLL_REVISION (0x00)
37#define OMAP_USBTLL_SYSCONFIG (0x10)
38#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
39#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
40#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
41#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
42#define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
43
44#define OMAP_USBTLL_SYSSTATUS (0x14)
45#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
46
47#define OMAP_USBTLL_IRQSTATUS (0x18)
48#define OMAP_USBTLL_IRQENABLE (0x1C)
49
50#define OMAP_TLL_SHARED_CONF (0x30)
51#define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
52#define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
53#define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
54#define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
55#define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
56
57#define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
58#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
59#define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 << 16)
60#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 << 15)
61#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
62#define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
63#define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
64#define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
65#define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI (2 << 1)
66#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
67#define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
68
69#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
70#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
71#define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
72#define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
73#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
74#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
75#define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
76#define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
77#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
78#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
79
80#define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
81#define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
82#define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
83#define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
84#define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
85#define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
86#define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
87#define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
88#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
89
90#define OMAP_REV2_TLL_CHANNEL_COUNT 2
91#define OMAP_TLL_CHANNEL_COUNT 3
92#define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
93#define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
94#define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
95
96
97#define OMAP_USBTLL_REV1 0x00000015
98#define OMAP_USBTLL_REV2 0x00000018
99#define OMAP_USBTLL_REV3 0x00000004
100#define OMAP_USBTLL_REV4 0x00000006
101
102#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
103
104
105#define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
106 (x) != OMAP_EHCI_PORT_MODE_PHY)
107
108struct usbtll_omap {
109 int nch;
110 struct clk **ch_clk;
111 void __iomem *base;
112};
113
114
115
116static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
117static struct device *tll_dev;
118static DEFINE_SPINLOCK(tll_lock);
119
120
121
122static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
123{
124 __raw_writel(val, base + reg);
125}
126
127static inline u32 usbtll_read(void __iomem *base, u32 reg)
128{
129 return __raw_readl(base + reg);
130}
131
132static inline void usbtll_writeb(void __iomem *base, u8 reg, u8 val)
133{
134 __raw_writeb(val, base + reg);
135}
136
137static inline u8 usbtll_readb(void __iomem *base, u8 reg)
138{
139 return __raw_readb(base + reg);
140}
141
142
143
144static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
145{
146 switch (pmode) {
147 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
148 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
149 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
150 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
151 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
152 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
153 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
154 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
155 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
156 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
157 return true;
158
159 default:
160 return false;
161 }
162}
163
164
165
166
167
168static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
169{
170 switch (mode) {
171 case OMAP_USBHS_PORT_MODE_UNUSED:
172 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
173 return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
174
175 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
176 return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
177
178 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
179 return OMAP_TLL_FSLSMODE_3PIN_PHY;
180
181 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
182 return OMAP_TLL_FSLSMODE_4PIN_PHY;
183
184 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
185 return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
186
187 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
188 return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
189
190 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
191 return OMAP_TLL_FSLSMODE_3PIN_TLL;
192
193 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
194 return OMAP_TLL_FSLSMODE_4PIN_TLL;
195
196 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
197 return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
198
199 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
200 return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
201 default:
202 pr_warn("Invalid port mode, using default\n");
203 return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
204 }
205}
206
207
208
209
210
211
212static int usbtll_omap_probe(struct platform_device *pdev)
213{
214 struct device *dev = &pdev->dev;
215 struct resource *res;
216 struct usbtll_omap *tll;
217 int ret = 0;
218 int i, ver;
219
220 dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
221
222 tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL);
223 if (!tll) {
224 dev_err(dev, "Memory allocation failed\n");
225 return -ENOMEM;
226 }
227
228 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
229 tll->base = devm_ioremap_resource(dev, res);
230 if (IS_ERR(tll->base))
231 return PTR_ERR(tll->base);
232
233 platform_set_drvdata(pdev, tll);
234 pm_runtime_enable(dev);
235 pm_runtime_get_sync(dev);
236
237 ver = usbtll_read(tll->base, OMAP_USBTLL_REVISION);
238 switch (ver) {
239 case OMAP_USBTLL_REV1:
240 case OMAP_USBTLL_REV4:
241 tll->nch = OMAP_TLL_CHANNEL_COUNT;
242 break;
243 case OMAP_USBTLL_REV2:
244 case OMAP_USBTLL_REV3:
245 tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
246 break;
247 default:
248 tll->nch = OMAP_TLL_CHANNEL_COUNT;
249 dev_dbg(dev,
250 "USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
251 ver, tll->nch);
252 break;
253 }
254
255 tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk * [tll->nch]),
256 GFP_KERNEL);
257 if (!tll->ch_clk) {
258 ret = -ENOMEM;
259 dev_err(dev, "Couldn't allocate memory for channel clocks\n");
260 goto err_clk_alloc;
261 }
262
263 for (i = 0; i < tll->nch; i++) {
264 char clkname[] = "usb_tll_hs_usb_chx_clk";
265
266 snprintf(clkname, sizeof(clkname),
267 "usb_tll_hs_usb_ch%d_clk", i);
268 tll->ch_clk[i] = clk_get(dev, clkname);
269
270 if (IS_ERR(tll->ch_clk[i]))
271 dev_dbg(dev, "can't get clock : %s\n", clkname);
272 }
273
274 pm_runtime_put_sync(dev);
275
276 spin_lock(&tll_lock);
277 tll_dev = dev;
278 spin_unlock(&tll_lock);
279
280 return 0;
281
282err_clk_alloc:
283 pm_runtime_put_sync(dev);
284 pm_runtime_disable(dev);
285
286 return ret;
287}
288
289
290
291
292
293
294
295static int usbtll_omap_remove(struct platform_device *pdev)
296{
297 struct usbtll_omap *tll = platform_get_drvdata(pdev);
298 int i;
299
300 spin_lock(&tll_lock);
301 tll_dev = NULL;
302 spin_unlock(&tll_lock);
303
304 for (i = 0; i < tll->nch; i++)
305 if (!IS_ERR(tll->ch_clk[i]))
306 clk_put(tll->ch_clk[i]);
307
308 pm_runtime_disable(&pdev->dev);
309 return 0;
310}
311
312static const struct of_device_id usbtll_omap_dt_ids[] = {
313 { .compatible = "ti,usbhs-tll" },
314 { }
315};
316
317MODULE_DEVICE_TABLE(of, usbtll_omap_dt_ids);
318
319static struct platform_driver usbtll_omap_driver = {
320 .driver = {
321 .name = (char *)usbtll_driver_name,
322 .owner = THIS_MODULE,
323 .of_match_table = of_match_ptr(usbtll_omap_dt_ids),
324 },
325 .probe = usbtll_omap_probe,
326 .remove = usbtll_omap_remove,
327};
328
329int omap_tll_init(struct usbhs_omap_platform_data *pdata)
330{
331 int i;
332 bool needs_tll;
333 unsigned reg;
334 struct usbtll_omap *tll;
335
336 spin_lock(&tll_lock);
337
338 if (!tll_dev) {
339 spin_unlock(&tll_lock);
340 return -ENODEV;
341 }
342
343 tll = dev_get_drvdata(tll_dev);
344
345 needs_tll = false;
346 for (i = 0; i < tll->nch; i++)
347 needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);
348
349 pm_runtime_get_sync(tll_dev);
350
351 if (needs_tll) {
352 void __iomem *base = tll->base;
353
354
355 reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
356 reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
357 | OMAP_TLL_SHARED_CONF_USB_DIVRATION);
358 reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
359 reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
360
361 usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
362
363
364 for (i = 0; i < tll->nch; i++) {
365 reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));
366
367 if (is_ohci_port(pdata->port_mode[i])) {
368 reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
369 << OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
370 reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
371 } else if (pdata->port_mode[i] ==
372 OMAP_EHCI_PORT_MODE_TLL) {
373
374
375
376
377 reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
378 | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
379 | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
380 } else if (pdata->port_mode[i] ==
381 OMAP_EHCI_PORT_MODE_HSIC) {
382
383
384
385 reg |= OMAP_TLL_CHANNEL_CONF_DRVVBUS
386 | OMAP_TLL_CHANNEL_CONF_CHRGVBUS
387 | OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI
388 | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
389 } else {
390 continue;
391 }
392 reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
393 usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
394
395 usbtll_writeb(base,
396 OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
397 0xbe);
398 }
399 }
400
401 pm_runtime_put_sync(tll_dev);
402
403 spin_unlock(&tll_lock);
404
405 return 0;
406}
407EXPORT_SYMBOL_GPL(omap_tll_init);
408
409int omap_tll_enable(struct usbhs_omap_platform_data *pdata)
410{
411 int i;
412 struct usbtll_omap *tll;
413
414 spin_lock(&tll_lock);
415
416 if (!tll_dev) {
417 spin_unlock(&tll_lock);
418 return -ENODEV;
419 }
420
421 tll = dev_get_drvdata(tll_dev);
422
423 pm_runtime_get_sync(tll_dev);
424
425 for (i = 0; i < tll->nch; i++) {
426 if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
427 int r;
428
429 if (IS_ERR(tll->ch_clk[i]))
430 continue;
431
432 r = clk_enable(tll->ch_clk[i]);
433 if (r) {
434 dev_err(tll_dev,
435 "Error enabling ch %d clock: %d\n", i, r);
436 }
437 }
438 }
439
440 spin_unlock(&tll_lock);
441
442 return 0;
443}
444EXPORT_SYMBOL_GPL(omap_tll_enable);
445
446int omap_tll_disable(struct usbhs_omap_platform_data *pdata)
447{
448 int i;
449 struct usbtll_omap *tll;
450
451 spin_lock(&tll_lock);
452
453 if (!tll_dev) {
454 spin_unlock(&tll_lock);
455 return -ENODEV;
456 }
457
458 tll = dev_get_drvdata(tll_dev);
459
460 for (i = 0; i < tll->nch; i++) {
461 if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
462 if (!IS_ERR(tll->ch_clk[i]))
463 clk_disable(tll->ch_clk[i]);
464 }
465 }
466
467 pm_runtime_put_sync(tll_dev);
468
469 spin_unlock(&tll_lock);
470
471 return 0;
472}
473EXPORT_SYMBOL_GPL(omap_tll_disable);
474
475MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
476MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
477MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
478MODULE_LICENSE("GPL v2");
479MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
480
481static int __init omap_usbtll_drvinit(void)
482{
483 return platform_driver_register(&usbtll_omap_driver);
484}
485
486
487
488
489
490
491fs_initcall(omap_usbtll_drvinit);
492
493static void __exit omap_usbtll_drvexit(void)
494{
495 platform_driver_unregister(&usbtll_omap_driver);
496}
497module_exit(omap_usbtll_drvexit);
498
