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30
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
33#include <linux/types.h>
34#include <linux/bitops.h>
35#include <linux/module.h>
36#include <linux/pci.h>
37#include <linux/netdevice.h>
38#include <linux/vmalloc.h>
39#include <linux/string.h>
40#include <linux/in.h>
41#include <linux/ip.h>
42#include <linux/tcp.h>
43#include <linux/sctp.h>
44#include <linux/ipv6.h>
45#include <linux/slab.h>
46#include <net/checksum.h>
47#include <net/ip6_checksum.h>
48#include <linux/ethtool.h>
49#include <linux/if.h>
50#include <linux/if_vlan.h>
51#include <linux/prefetch.h>
52#include <net/mpls.h>
53
54#include "ixgbevf.h"
55
56const char ixgbevf_driver_name[] = "ixgbevf";
57static const char ixgbevf_driver_string[] =
58 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
59
60#define DRV_VERSION "4.1.0-k-rh7.5"
61const char ixgbevf_driver_version[] = DRV_VERSION;
62static char ixgbevf_copyright[] =
63 "Copyright (c) 2009 - 2015 Intel Corporation.";
64
65static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
66 [board_82599_vf] = &ixgbevf_82599_vf_info,
67 [board_82599_vf_hv] = &ixgbevf_82599_vf_hv_info,
68 [board_X540_vf] = &ixgbevf_X540_vf_info,
69 [board_X540_vf_hv] = &ixgbevf_X540_vf_hv_info,
70 [board_X550_vf] = &ixgbevf_X550_vf_info,
71 [board_X550_vf_hv] = &ixgbevf_X550_vf_hv_info,
72 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
73 [board_X550EM_x_vf_hv] = &ixgbevf_X550EM_x_vf_hv_info,
74 [board_x550em_a_vf] = &ixgbevf_x550em_a_vf_info,
75};
76
77
78
79
80
81
82
83
84
85static const struct pci_device_id ixgbevf_pci_tbl[] = {
86 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
87 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF_HV), board_82599_vf_hv },
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF_HV), board_X540_vf_hv },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF_HV), board_X550_vf_hv },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv},
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf },
95
96 {0, }
97};
98MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
99
100MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
101MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
102MODULE_LICENSE("GPL");
103MODULE_VERSION(DRV_VERSION);
104
105#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
106static int debug = -1;
107module_param(debug, int, 0);
108MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
109
110static struct workqueue_struct *ixgbevf_wq;
111
112static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
113{
114 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
115 !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
116 !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
117 queue_work(ixgbevf_wq, &adapter->service_task);
118}
119
120static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
121{
122 BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
123
124
125 smp_mb__before_atomic();
126 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
127}
128
129
130static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
131static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
132static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
133
134static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
135{
136 struct ixgbevf_adapter *adapter = hw->back;
137
138 if (!hw->hw_addr)
139 return;
140 hw->hw_addr = NULL;
141 dev_err(&adapter->pdev->dev, "Adapter removed\n");
142 if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
143 ixgbevf_service_event_schedule(adapter);
144}
145
146static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
147{
148 u32 value;
149
150
151
152
153
154
155
156 if (reg == IXGBE_VFSTATUS) {
157 ixgbevf_remove_adapter(hw);
158 return;
159 }
160 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
161 if (value == IXGBE_FAILED_READ_REG)
162 ixgbevf_remove_adapter(hw);
163}
164
165u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
166{
167 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
168 u32 value;
169
170 if (IXGBE_REMOVED(reg_addr))
171 return IXGBE_FAILED_READ_REG;
172 value = readl(reg_addr + reg);
173 if (unlikely(value == IXGBE_FAILED_READ_REG))
174 ixgbevf_check_remove(hw, reg);
175 return value;
176}
177
178
179
180
181
182
183
184
185static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
186 u8 queue, u8 msix_vector)
187{
188 u32 ivar, index;
189 struct ixgbe_hw *hw = &adapter->hw;
190
191 if (direction == -1) {
192
193 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
194 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
195 ivar &= ~0xFF;
196 ivar |= msix_vector;
197 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
198 } else {
199
200 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
201 index = ((16 * (queue & 1)) + (8 * direction));
202 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
203 ivar &= ~(0xFF << index);
204 ivar |= (msix_vector << index);
205 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
206 }
207}
208
209static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
210 struct ixgbevf_tx_buffer *tx_buffer)
211{
212 if (tx_buffer->skb) {
213 dev_kfree_skb_any(tx_buffer->skb);
214 if (dma_unmap_len(tx_buffer, len))
215 dma_unmap_single(tx_ring->dev,
216 dma_unmap_addr(tx_buffer, dma),
217 dma_unmap_len(tx_buffer, len),
218 DMA_TO_DEVICE);
219 } else if (dma_unmap_len(tx_buffer, len)) {
220 dma_unmap_page(tx_ring->dev,
221 dma_unmap_addr(tx_buffer, dma),
222 dma_unmap_len(tx_buffer, len),
223 DMA_TO_DEVICE);
224 }
225 tx_buffer->next_to_watch = NULL;
226 tx_buffer->skb = NULL;
227 dma_unmap_len_set(tx_buffer, len, 0);
228
229}
230
231static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
232{
233 return ring->stats.packets;
234}
235
236static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
237{
238 struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
239 struct ixgbe_hw *hw = &adapter->hw;
240
241 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
242 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
243
244 if (head != tail)
245 return (head < tail) ?
246 tail - head : (tail + ring->count - head);
247
248 return 0;
249}
250
251static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
252{
253 u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
254 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
255 u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
256
257 clear_check_for_tx_hang(tx_ring);
258
259
260
261
262
263
264 if ((tx_done_old == tx_done) && tx_pending) {
265
266 return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
267 &tx_ring->state);
268 }
269
270 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
271
272
273 tx_ring->tx_stats.tx_done_old = tx_done;
274
275 return false;
276}
277
278static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
279{
280
281 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
282 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
283 ixgbevf_service_event_schedule(adapter);
284 }
285}
286
287
288
289
290
291static void ixgbevf_tx_timeout(struct net_device *netdev)
292{
293 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
294
295 ixgbevf_tx_timeout_reset(adapter);
296}
297
298
299
300
301
302
303
304static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
305 struct ixgbevf_ring *tx_ring, int napi_budget)
306{
307 struct ixgbevf_adapter *adapter = q_vector->adapter;
308 struct ixgbevf_tx_buffer *tx_buffer;
309 union ixgbe_adv_tx_desc *tx_desc;
310 unsigned int total_bytes = 0, total_packets = 0;
311 unsigned int budget = tx_ring->count / 2;
312 unsigned int i = tx_ring->next_to_clean;
313
314 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
315 return true;
316
317 tx_buffer = &tx_ring->tx_buffer_info[i];
318 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
319 i -= tx_ring->count;
320
321 do {
322 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
323
324
325 if (!eop_desc)
326 break;
327
328
329 read_barrier_depends();
330
331
332 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
333 break;
334
335
336 tx_buffer->next_to_watch = NULL;
337
338
339 total_bytes += tx_buffer->bytecount;
340 total_packets += tx_buffer->gso_segs;
341
342
343 napi_consume_skb(tx_buffer->skb, napi_budget);
344
345
346 dma_unmap_single(tx_ring->dev,
347 dma_unmap_addr(tx_buffer, dma),
348 dma_unmap_len(tx_buffer, len),
349 DMA_TO_DEVICE);
350
351
352 tx_buffer->skb = NULL;
353 dma_unmap_len_set(tx_buffer, len, 0);
354
355
356 while (tx_desc != eop_desc) {
357 tx_buffer++;
358 tx_desc++;
359 i++;
360 if (unlikely(!i)) {
361 i -= tx_ring->count;
362 tx_buffer = tx_ring->tx_buffer_info;
363 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
364 }
365
366
367 if (dma_unmap_len(tx_buffer, len)) {
368 dma_unmap_page(tx_ring->dev,
369 dma_unmap_addr(tx_buffer, dma),
370 dma_unmap_len(tx_buffer, len),
371 DMA_TO_DEVICE);
372 dma_unmap_len_set(tx_buffer, len, 0);
373 }
374 }
375
376
377 tx_buffer++;
378 tx_desc++;
379 i++;
380 if (unlikely(!i)) {
381 i -= tx_ring->count;
382 tx_buffer = tx_ring->tx_buffer_info;
383 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
384 }
385
386
387 prefetch(tx_desc);
388
389
390 budget--;
391 } while (likely(budget));
392
393 i += tx_ring->count;
394 tx_ring->next_to_clean = i;
395 u64_stats_update_begin(&tx_ring->syncp);
396 tx_ring->stats.bytes += total_bytes;
397 tx_ring->stats.packets += total_packets;
398 u64_stats_update_end(&tx_ring->syncp);
399 q_vector->tx.total_bytes += total_bytes;
400 q_vector->tx.total_packets += total_packets;
401
402 if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
403 struct ixgbe_hw *hw = &adapter->hw;
404 union ixgbe_adv_tx_desc *eop_desc;
405
406 eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
407
408 pr_err("Detected Tx Unit Hang\n"
409 " Tx Queue <%d>\n"
410 " TDH, TDT <%x>, <%x>\n"
411 " next_to_use <%x>\n"
412 " next_to_clean <%x>\n"
413 "tx_buffer_info[next_to_clean]\n"
414 " next_to_watch <%p>\n"
415 " eop_desc->wb.status <%x>\n"
416 " time_stamp <%lx>\n"
417 " jiffies <%lx>\n",
418 tx_ring->queue_index,
419 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
420 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
421 tx_ring->next_to_use, i,
422 eop_desc, (eop_desc ? eop_desc->wb.status : 0),
423 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
424
425 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
426
427
428 ixgbevf_tx_timeout_reset(adapter);
429
430 return true;
431 }
432
433#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
434 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
435 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
436
437
438
439 smp_mb();
440
441 if (__netif_subqueue_stopped(tx_ring->netdev,
442 tx_ring->queue_index) &&
443 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
444 netif_wake_subqueue(tx_ring->netdev,
445 tx_ring->queue_index);
446 ++tx_ring->tx_stats.restart_queue;
447 }
448 }
449
450 return !!budget;
451}
452
453
454
455
456
457
458static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
459 struct sk_buff *skb)
460{
461 napi_gro_receive(&q_vector->napi, skb);
462}
463
464#define IXGBE_RSS_L4_TYPES_MASK \
465 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
466 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
467 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
468 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
469
470static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
471 union ixgbe_adv_rx_desc *rx_desc,
472 struct sk_buff *skb)
473{
474 u16 rss_type;
475
476 if (!(ring->netdev->features & NETIF_F_RXHASH))
477 return;
478
479 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
480 IXGBE_RXDADV_RSSTYPE_MASK;
481
482 if (!rss_type)
483 return;
484
485 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
486 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
487 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
488}
489
490
491
492
493
494
495
496static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
497 union ixgbe_adv_rx_desc *rx_desc,
498 struct sk_buff *skb)
499{
500 skb_checksum_none_assert(skb);
501
502
503 if (!(ring->netdev->features & NETIF_F_RXCSUM))
504 return;
505
506
507 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
508 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
509 ring->rx_stats.csum_err++;
510 return;
511 }
512
513 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
514 return;
515
516 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
517 ring->rx_stats.csum_err++;
518 return;
519 }
520
521
522 skb->ip_summed = CHECKSUM_UNNECESSARY;
523}
524
525
526
527
528
529
530
531
532
533
534
535static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
536 union ixgbe_adv_rx_desc *rx_desc,
537 struct sk_buff *skb)
538{
539 ixgbevf_rx_hash(rx_ring, rx_desc, skb);
540 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
541
542 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
543 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
544 unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
545
546 if (test_bit(vid & VLAN_VID_MASK, active_vlans))
547 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
548 }
549
550 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
551}
552
553
554
555
556
557
558
559
560
561
562
563
564static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
565 union ixgbe_adv_rx_desc *rx_desc)
566{
567 u32 ntc = rx_ring->next_to_clean + 1;
568
569
570 ntc = (ntc < rx_ring->count) ? ntc : 0;
571 rx_ring->next_to_clean = ntc;
572
573 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
574
575 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
576 return false;
577
578 return true;
579}
580
581static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
582 struct ixgbevf_rx_buffer *bi)
583{
584 struct page *page = bi->page;
585 dma_addr_t dma = bi->dma;
586
587
588 if (likely(page))
589 return true;
590
591
592 page = dev_alloc_page();
593 if (unlikely(!page)) {
594 rx_ring->rx_stats.alloc_rx_page_failed++;
595 return false;
596 }
597
598
599 dma = dma_map_page(rx_ring->dev, page, 0,
600 PAGE_SIZE, DMA_FROM_DEVICE);
601
602
603
604
605 if (dma_mapping_error(rx_ring->dev, dma)) {
606 __free_page(page);
607
608 rx_ring->rx_stats.alloc_rx_buff_failed++;
609 return false;
610 }
611
612 bi->dma = dma;
613 bi->page = page;
614 bi->page_offset = 0;
615
616 return true;
617}
618
619
620
621
622
623
624static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
625 u16 cleaned_count)
626{
627 union ixgbe_adv_rx_desc *rx_desc;
628 struct ixgbevf_rx_buffer *bi;
629 unsigned int i = rx_ring->next_to_use;
630
631
632 if (!cleaned_count || !rx_ring->netdev)
633 return;
634
635 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
636 bi = &rx_ring->rx_buffer_info[i];
637 i -= rx_ring->count;
638
639 do {
640 if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
641 break;
642
643
644
645
646 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
647
648 rx_desc++;
649 bi++;
650 i++;
651 if (unlikely(!i)) {
652 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
653 bi = rx_ring->rx_buffer_info;
654 i -= rx_ring->count;
655 }
656
657
658 rx_desc->read.hdr_addr = 0;
659
660 cleaned_count--;
661 } while (cleaned_count);
662
663 i += rx_ring->count;
664
665 if (rx_ring->next_to_use != i) {
666
667 rx_ring->next_to_use = i;
668
669
670 rx_ring->next_to_alloc = i;
671
672
673
674
675
676
677 wmb();
678 ixgbevf_write_tail(rx_ring, i);
679 }
680}
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
701 union ixgbe_adv_rx_desc *rx_desc,
702 struct sk_buff *skb)
703{
704
705 if (unlikely(ixgbevf_test_staterr(rx_desc,
706 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
707 struct net_device *netdev = rx_ring->netdev;
708
709 if (!(netdev->features & NETIF_F_RXALL)) {
710 dev_kfree_skb_any(skb);
711 return true;
712 }
713 }
714
715
716 if (eth_skb_pad(skb))
717 return true;
718
719 return false;
720}
721
722
723
724
725
726
727
728
729static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
730 struct ixgbevf_rx_buffer *old_buff)
731{
732 struct ixgbevf_rx_buffer *new_buff;
733 u16 nta = rx_ring->next_to_alloc;
734
735 new_buff = &rx_ring->rx_buffer_info[nta];
736
737
738 nta++;
739 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
740
741
742 new_buff->page = old_buff->page;
743 new_buff->dma = old_buff->dma;
744 new_buff->page_offset = old_buff->page_offset;
745
746
747 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
748 new_buff->page_offset,
749 IXGBEVF_RX_BUFSZ,
750 DMA_FROM_DEVICE);
751}
752
753static inline bool ixgbevf_page_is_reserved(struct page *page)
754{
755 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
756}
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773static bool ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
774 struct ixgbevf_rx_buffer *rx_buffer,
775 union ixgbe_adv_rx_desc *rx_desc,
776 struct sk_buff *skb)
777{
778 struct page *page = rx_buffer->page;
779 unsigned char *va = page_address(page) + rx_buffer->page_offset;
780 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
781#if (PAGE_SIZE < 8192)
782 unsigned int truesize = IXGBEVF_RX_BUFSZ;
783#else
784 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
785#endif
786 unsigned int pull_len;
787
788 if (unlikely(skb_is_nonlinear(skb)))
789 goto add_tail_frag;
790
791 if (likely(size <= IXGBEVF_RX_HDR_SIZE)) {
792 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
793
794
795 if (likely(!ixgbevf_page_is_reserved(page)))
796 return true;
797
798
799 put_page(page);
800 return false;
801 }
802
803
804
805
806 pull_len = eth_get_headlen(va, IXGBEVF_RX_HDR_SIZE);
807
808
809 memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
810
811
812 va += pull_len;
813 size -= pull_len;
814
815add_tail_frag:
816 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
817 (unsigned long)va & ~PAGE_MASK, size, truesize);
818
819
820 if (unlikely(ixgbevf_page_is_reserved(page)))
821 return false;
822
823#if (PAGE_SIZE < 8192)
824
825 if (unlikely(page_count(page) != 1))
826 return false;
827
828
829 rx_buffer->page_offset ^= IXGBEVF_RX_BUFSZ;
830
831#else
832
833 rx_buffer->page_offset += truesize;
834
835 if (rx_buffer->page_offset > (PAGE_SIZE - IXGBEVF_RX_BUFSZ))
836 return false;
837
838#endif
839
840
841
842 page_ref_inc(page);
843
844 return true;
845}
846
847static struct sk_buff *ixgbevf_fetch_rx_buffer(struct ixgbevf_ring *rx_ring,
848 union ixgbe_adv_rx_desc *rx_desc,
849 struct sk_buff *skb)
850{
851 struct ixgbevf_rx_buffer *rx_buffer;
852 struct page *page;
853
854 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
855 page = rx_buffer->page;
856 prefetchw(page);
857
858 if (likely(!skb)) {
859 void *page_addr = page_address(page) +
860 rx_buffer->page_offset;
861
862
863 prefetch(page_addr);
864#if L1_CACHE_BYTES < 128
865 prefetch(page_addr + L1_CACHE_BYTES);
866#endif
867
868
869 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
870 IXGBEVF_RX_HDR_SIZE);
871 if (unlikely(!skb)) {
872 rx_ring->rx_stats.alloc_rx_buff_failed++;
873 return NULL;
874 }
875
876
877
878
879
880 prefetchw(skb->data);
881 }
882
883
884 dma_sync_single_range_for_cpu(rx_ring->dev,
885 rx_buffer->dma,
886 rx_buffer->page_offset,
887 IXGBEVF_RX_BUFSZ,
888 DMA_FROM_DEVICE);
889
890
891 if (ixgbevf_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
892
893 ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
894 } else {
895
896 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
897 PAGE_SIZE, DMA_FROM_DEVICE);
898 }
899
900
901 rx_buffer->dma = 0;
902 rx_buffer->page = NULL;
903
904 return skb;
905}
906
907static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
908 u32 qmask)
909{
910 struct ixgbe_hw *hw = &adapter->hw;
911
912 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
913}
914
915static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
916 struct ixgbevf_ring *rx_ring,
917 int budget)
918{
919 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
920 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
921 struct sk_buff *skb = rx_ring->skb;
922
923 while (likely(total_rx_packets < budget)) {
924 union ixgbe_adv_rx_desc *rx_desc;
925
926
927 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
928 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
929 cleaned_count = 0;
930 }
931
932 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
933
934 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
935 break;
936
937
938
939
940
941 rmb();
942
943
944 skb = ixgbevf_fetch_rx_buffer(rx_ring, rx_desc, skb);
945
946
947 if (!skb)
948 break;
949
950 cleaned_count++;
951
952
953 if (ixgbevf_is_non_eop(rx_ring, rx_desc))
954 continue;
955
956
957 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
958 skb = NULL;
959 continue;
960 }
961
962
963 total_rx_bytes += skb->len;
964
965
966
967
968 if ((skb->pkt_type == PACKET_BROADCAST ||
969 skb->pkt_type == PACKET_MULTICAST) &&
970 ether_addr_equal(rx_ring->netdev->dev_addr,
971 eth_hdr(skb)->h_source)) {
972 dev_kfree_skb_irq(skb);
973 continue;
974 }
975
976
977 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
978
979 ixgbevf_rx_skb(q_vector, skb);
980
981
982 skb = NULL;
983
984
985 total_rx_packets++;
986 }
987
988
989 rx_ring->skb = skb;
990
991 u64_stats_update_begin(&rx_ring->syncp);
992 rx_ring->stats.packets += total_rx_packets;
993 rx_ring->stats.bytes += total_rx_bytes;
994 u64_stats_update_end(&rx_ring->syncp);
995 q_vector->rx.total_packets += total_rx_packets;
996 q_vector->rx.total_bytes += total_rx_bytes;
997
998 return total_rx_packets;
999}
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009static int ixgbevf_poll(struct napi_struct *napi, int budget)
1010{
1011 struct ixgbevf_q_vector *q_vector =
1012 container_of(napi, struct ixgbevf_q_vector, napi);
1013 struct ixgbevf_adapter *adapter = q_vector->adapter;
1014 struct ixgbevf_ring *ring;
1015 int per_ring_budget, work_done = 0;
1016 bool clean_complete = true;
1017
1018 ixgbevf_for_each_ring(ring, q_vector->tx) {
1019 if (!ixgbevf_clean_tx_irq(q_vector, ring, budget))
1020 clean_complete = false;
1021 }
1022
1023 if (budget <= 0)
1024 return budget;
1025
1026
1027
1028
1029 if (q_vector->rx.count > 1)
1030 per_ring_budget = max(budget/q_vector->rx.count, 1);
1031 else
1032 per_ring_budget = budget;
1033
1034 ixgbevf_for_each_ring(ring, q_vector->rx) {
1035 int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
1036 per_ring_budget);
1037 work_done += cleaned;
1038 if (cleaned >= per_ring_budget)
1039 clean_complete = false;
1040 }
1041
1042
1043 if (!clean_complete)
1044 return budget;
1045
1046 napi_complete_done(napi, work_done);
1047 if (adapter->rx_itr_setting == 1)
1048 ixgbevf_set_itr(q_vector);
1049 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1050 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
1051 ixgbevf_irq_enable_queues(adapter,
1052 BIT(q_vector->v_idx));
1053
1054 return 0;
1055}
1056
1057
1058
1059
1060
1061void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
1062{
1063 struct ixgbevf_adapter *adapter = q_vector->adapter;
1064 struct ixgbe_hw *hw = &adapter->hw;
1065 int v_idx = q_vector->v_idx;
1066 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1067
1068
1069
1070
1071 itr_reg |= IXGBE_EITR_CNT_WDIS;
1072
1073 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
1074}
1075
1076
1077
1078
1079
1080
1081
1082
1083static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1084{
1085 struct ixgbevf_q_vector *q_vector;
1086 int q_vectors, v_idx;
1087
1088 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1089 adapter->eims_enable_mask = 0;
1090
1091
1092
1093
1094 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
1095 struct ixgbevf_ring *ring;
1096
1097 q_vector = adapter->q_vector[v_idx];
1098
1099 ixgbevf_for_each_ring(ring, q_vector->rx)
1100 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1101
1102 ixgbevf_for_each_ring(ring, q_vector->tx)
1103 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
1104
1105 if (q_vector->tx.ring && !q_vector->rx.ring) {
1106
1107 if (adapter->tx_itr_setting == 1)
1108 q_vector->itr = IXGBE_12K_ITR;
1109 else
1110 q_vector->itr = adapter->tx_itr_setting;
1111 } else {
1112
1113 if (adapter->rx_itr_setting == 1)
1114 q_vector->itr = IXGBE_20K_ITR;
1115 else
1116 q_vector->itr = adapter->rx_itr_setting;
1117 }
1118
1119
1120 adapter->eims_enable_mask |= BIT(v_idx);
1121
1122 ixgbevf_write_eitr(q_vector);
1123 }
1124
1125 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
1126
1127 adapter->eims_other = BIT(v_idx);
1128 adapter->eims_enable_mask |= adapter->eims_other;
1129}
1130
1131enum latency_range {
1132 lowest_latency = 0,
1133 low_latency = 1,
1134 bulk_latency = 2,
1135 latency_invalid = 255
1136};
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1152 struct ixgbevf_ring_container *ring_container)
1153{
1154 int bytes = ring_container->total_bytes;
1155 int packets = ring_container->total_packets;
1156 u32 timepassed_us;
1157 u64 bytes_perint;
1158 u8 itr_setting = ring_container->itr;
1159
1160 if (packets == 0)
1161 return;
1162
1163
1164
1165
1166
1167
1168
1169 timepassed_us = q_vector->itr >> 2;
1170 bytes_perint = bytes / timepassed_us;
1171
1172 switch (itr_setting) {
1173 case lowest_latency:
1174 if (bytes_perint > 10)
1175 itr_setting = low_latency;
1176 break;
1177 case low_latency:
1178 if (bytes_perint > 20)
1179 itr_setting = bulk_latency;
1180 else if (bytes_perint <= 10)
1181 itr_setting = lowest_latency;
1182 break;
1183 case bulk_latency:
1184 if (bytes_perint <= 20)
1185 itr_setting = low_latency;
1186 break;
1187 }
1188
1189
1190 ring_container->total_bytes = 0;
1191 ring_container->total_packets = 0;
1192
1193
1194 ring_container->itr = itr_setting;
1195}
1196
1197static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
1198{
1199 u32 new_itr = q_vector->itr;
1200 u8 current_itr;
1201
1202 ixgbevf_update_itr(q_vector, &q_vector->tx);
1203 ixgbevf_update_itr(q_vector, &q_vector->rx);
1204
1205 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
1206
1207 switch (current_itr) {
1208
1209 case lowest_latency:
1210 new_itr = IXGBE_100K_ITR;
1211 break;
1212 case low_latency:
1213 new_itr = IXGBE_20K_ITR;
1214 break;
1215 case bulk_latency:
1216 new_itr = IXGBE_12K_ITR;
1217 break;
1218 default:
1219 break;
1220 }
1221
1222 if (new_itr != q_vector->itr) {
1223
1224 new_itr = (10 * new_itr * q_vector->itr) /
1225 ((9 * new_itr) + q_vector->itr);
1226
1227
1228 q_vector->itr = new_itr;
1229
1230 ixgbevf_write_eitr(q_vector);
1231 }
1232}
1233
1234static irqreturn_t ixgbevf_msix_other(int irq, void *data)
1235{
1236 struct ixgbevf_adapter *adapter = data;
1237 struct ixgbe_hw *hw = &adapter->hw;
1238
1239 hw->mac.get_link_status = 1;
1240
1241 ixgbevf_service_event_schedule(adapter);
1242
1243 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1244
1245 return IRQ_HANDLED;
1246}
1247
1248
1249
1250
1251
1252
1253static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
1254{
1255 struct ixgbevf_q_vector *q_vector = data;
1256
1257
1258 if (q_vector->rx.ring || q_vector->tx.ring)
1259 napi_schedule_irqoff(&q_vector->napi);
1260
1261 return IRQ_HANDLED;
1262}
1263
1264static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1265 int r_idx)
1266{
1267 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1268
1269 a->rx_ring[r_idx]->next = q_vector->rx.ring;
1270 q_vector->rx.ring = a->rx_ring[r_idx];
1271 q_vector->rx.count++;
1272}
1273
1274static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1275 int t_idx)
1276{
1277 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1278
1279 a->tx_ring[t_idx]->next = q_vector->tx.ring;
1280 q_vector->tx.ring = a->tx_ring[t_idx];
1281 q_vector->tx.count++;
1282}
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1295{
1296 int q_vectors;
1297 int v_start = 0;
1298 int rxr_idx = 0, txr_idx = 0;
1299 int rxr_remaining = adapter->num_rx_queues;
1300 int txr_remaining = adapter->num_tx_queues;
1301 int i, j;
1302 int rqpv, tqpv;
1303
1304 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1305
1306
1307
1308
1309 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1310 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1311 map_vector_to_rxq(adapter, v_start, rxr_idx);
1312
1313 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1314 map_vector_to_txq(adapter, v_start, txr_idx);
1315 return 0;
1316 }
1317
1318
1319
1320
1321
1322
1323 for (i = v_start; i < q_vectors; i++) {
1324 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1325 for (j = 0; j < rqpv; j++) {
1326 map_vector_to_rxq(adapter, i, rxr_idx);
1327 rxr_idx++;
1328 rxr_remaining--;
1329 }
1330 }
1331 for (i = v_start; i < q_vectors; i++) {
1332 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1333 for (j = 0; j < tqpv; j++) {
1334 map_vector_to_txq(adapter, i, txr_idx);
1335 txr_idx++;
1336 txr_remaining--;
1337 }
1338 }
1339
1340 return 0;
1341}
1342
1343
1344
1345
1346
1347
1348
1349
1350static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1351{
1352 struct net_device *netdev = adapter->netdev;
1353 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1354 unsigned int ri = 0, ti = 0;
1355 int vector, err;
1356
1357 for (vector = 0; vector < q_vectors; vector++) {
1358 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1359 struct msix_entry *entry = &adapter->msix_entries[vector];
1360
1361 if (q_vector->tx.ring && q_vector->rx.ring) {
1362 snprintf(q_vector->name, sizeof(q_vector->name),
1363 "%s-TxRx-%u", netdev->name, ri++);
1364 ti++;
1365 } else if (q_vector->rx.ring) {
1366 snprintf(q_vector->name, sizeof(q_vector->name),
1367 "%s-rx-%u", netdev->name, ri++);
1368 } else if (q_vector->tx.ring) {
1369 snprintf(q_vector->name, sizeof(q_vector->name),
1370 "%s-tx-%u", netdev->name, ti++);
1371 } else {
1372
1373 continue;
1374 }
1375 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1376 q_vector->name, q_vector);
1377 if (err) {
1378 hw_dbg(&adapter->hw,
1379 "request_irq failed for MSIX interrupt Error: %d\n",
1380 err);
1381 goto free_queue_irqs;
1382 }
1383 }
1384
1385 err = request_irq(adapter->msix_entries[vector].vector,
1386 &ixgbevf_msix_other, 0, netdev->name, adapter);
1387 if (err) {
1388 hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
1389 err);
1390 goto free_queue_irqs;
1391 }
1392
1393 return 0;
1394
1395free_queue_irqs:
1396 while (vector) {
1397 vector--;
1398 free_irq(adapter->msix_entries[vector].vector,
1399 adapter->q_vector[vector]);
1400 }
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411 adapter->num_msix_vectors = 0;
1412 return err;
1413}
1414
1415static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1416{
1417 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1418
1419 for (i = 0; i < q_vectors; i++) {
1420 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1421
1422 q_vector->rx.ring = NULL;
1423 q_vector->tx.ring = NULL;
1424 q_vector->rx.count = 0;
1425 q_vector->tx.count = 0;
1426 }
1427}
1428
1429
1430
1431
1432
1433
1434
1435
1436static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1437{
1438 int err = ixgbevf_request_msix_irqs(adapter);
1439
1440 if (err)
1441 hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
1442
1443 return err;
1444}
1445
1446static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1447{
1448 int i, q_vectors;
1449
1450 if (!adapter->msix_entries)
1451 return;
1452
1453 q_vectors = adapter->num_msix_vectors;
1454 i = q_vectors - 1;
1455
1456 free_irq(adapter->msix_entries[i].vector, adapter);
1457 i--;
1458
1459 for (; i >= 0; i--) {
1460
1461 if (!adapter->q_vector[i]->rx.ring &&
1462 !adapter->q_vector[i]->tx.ring)
1463 continue;
1464
1465 free_irq(adapter->msix_entries[i].vector,
1466 adapter->q_vector[i]);
1467 }
1468
1469 ixgbevf_reset_q_vectors(adapter);
1470}
1471
1472
1473
1474
1475
1476static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1477{
1478 struct ixgbe_hw *hw = &adapter->hw;
1479 int i;
1480
1481 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
1482 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1483 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
1484
1485 IXGBE_WRITE_FLUSH(hw);
1486
1487 for (i = 0; i < adapter->num_msix_vectors; i++)
1488 synchronize_irq(adapter->msix_entries[i].vector);
1489}
1490
1491
1492
1493
1494
1495static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
1496{
1497 struct ixgbe_hw *hw = &adapter->hw;
1498
1499 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1500 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1501 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
1502}
1503
1504
1505
1506
1507
1508
1509
1510
1511static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1512 struct ixgbevf_ring *ring)
1513{
1514 struct ixgbe_hw *hw = &adapter->hw;
1515 u64 tdba = ring->dma;
1516 int wait_loop = 10;
1517 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1518 u8 reg_idx = ring->reg_idx;
1519
1520
1521 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1522 IXGBE_WRITE_FLUSH(hw);
1523
1524 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1525 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1526 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1527 ring->count * sizeof(union ixgbe_adv_tx_desc));
1528
1529
1530 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1531 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1532
1533
1534 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1535 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1536 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1537
1538
1539 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1540 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
1541 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
1542
1543
1544 ring->next_to_clean = 0;
1545 ring->next_to_use = 0;
1546
1547
1548
1549
1550
1551 txdctl |= (8 << 16);
1552
1553
1554 txdctl |= (1u << 8) |
1555 32;
1556
1557 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
1558
1559 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1560
1561
1562 do {
1563 usleep_range(1000, 2000);
1564 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1565 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1566 if (!wait_loop)
1567 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
1568}
1569
1570
1571
1572
1573
1574
1575
1576static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1577{
1578 u32 i;
1579
1580
1581 for (i = 0; i < adapter->num_tx_queues; i++)
1582 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
1583}
1584
1585#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1586
1587static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1588{
1589 struct ixgbe_hw *hw = &adapter->hw;
1590 u32 srrctl;
1591
1592 srrctl = IXGBE_SRRCTL_DROP_EN;
1593
1594 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
1595 srrctl |= IXGBEVF_RX_BUFSZ >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1596 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1597
1598 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1599}
1600
1601static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1602{
1603 struct ixgbe_hw *hw = &adapter->hw;
1604
1605
1606 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1607 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1608 IXGBE_PSRTYPE_L2HDR;
1609
1610 if (adapter->num_rx_queues > 1)
1611 psrtype |= BIT(29);
1612
1613 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1614}
1615
1616#define IXGBEVF_MAX_RX_DESC_POLL 10
1617static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1618 struct ixgbevf_ring *ring)
1619{
1620 struct ixgbe_hw *hw = &adapter->hw;
1621 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1622 u32 rxdctl;
1623 u8 reg_idx = ring->reg_idx;
1624
1625 if (IXGBE_REMOVED(hw->hw_addr))
1626 return;
1627 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1628 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1629
1630
1631 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1632
1633
1634 do {
1635 udelay(10);
1636 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1637 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1638
1639 if (!wait_loop)
1640 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1641 reg_idx);
1642}
1643
1644static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1645 struct ixgbevf_ring *ring)
1646{
1647 struct ixgbe_hw *hw = &adapter->hw;
1648 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1649 u32 rxdctl;
1650 u8 reg_idx = ring->reg_idx;
1651
1652 if (IXGBE_REMOVED(hw->hw_addr))
1653 return;
1654 do {
1655 usleep_range(1000, 2000);
1656 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1657 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1658
1659 if (!wait_loop)
1660 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1661 reg_idx);
1662}
1663
1664
1665
1666
1667
1668
1669
1670static inline int ixgbevf_init_rss_key(struct ixgbevf_adapter *adapter)
1671{
1672 u32 *rss_key;
1673
1674 if (!adapter->rss_key) {
1675 rss_key = kzalloc(IXGBEVF_RSS_HASH_KEY_SIZE, GFP_KERNEL);
1676 if (unlikely(!rss_key))
1677 return -ENOMEM;
1678
1679 netdev_rss_key_fill(rss_key, IXGBEVF_RSS_HASH_KEY_SIZE);
1680 adapter->rss_key = rss_key;
1681 }
1682
1683 return 0;
1684}
1685
1686static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
1687{
1688 struct ixgbe_hw *hw = &adapter->hw;
1689 u32 vfmrqc = 0, vfreta = 0;
1690 u16 rss_i = adapter->num_rx_queues;
1691 u8 i, j;
1692
1693
1694 for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
1695 IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), *(adapter->rss_key + i));
1696
1697 for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
1698 if (j == rss_i)
1699 j = 0;
1700
1701 adapter->rss_indir_tbl[i] = j;
1702
1703 vfreta |= j << (i & 0x3) * 8;
1704 if ((i & 3) == 3) {
1705 IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
1706 vfreta = 0;
1707 }
1708 }
1709
1710
1711 vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
1712 IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
1713 IXGBE_VFMRQC_RSS_FIELD_IPV6 |
1714 IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
1715
1716 vfmrqc |= IXGBE_VFMRQC_RSSEN;
1717
1718 IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
1719}
1720
1721static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1722 struct ixgbevf_ring *ring)
1723{
1724 struct ixgbe_hw *hw = &adapter->hw;
1725 u64 rdba = ring->dma;
1726 u32 rxdctl;
1727 u8 reg_idx = ring->reg_idx;
1728
1729
1730 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1731 ixgbevf_disable_rx_queue(adapter, ring);
1732
1733 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1734 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1735 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1736 ring->count * sizeof(union ixgbe_adv_rx_desc));
1737
1738#ifndef CONFIG_SPARC
1739
1740 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1741 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
1742#else
1743 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1744 IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1745 IXGBE_DCA_RXCTRL_DATA_WRO_EN);
1746#endif
1747
1748
1749 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1750 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
1751 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
1752
1753
1754 ring->next_to_clean = 0;
1755 ring->next_to_use = 0;
1756 ring->next_to_alloc = 0;
1757
1758 ixgbevf_configure_srrctl(adapter, reg_idx);
1759
1760
1761 rxdctl &= ~IXGBE_RXDCTL_RLPML_EN;
1762
1763 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1764 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1765
1766 ixgbevf_rx_desc_queue_enable(adapter, ring);
1767 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
1768}
1769
1770
1771
1772
1773
1774
1775
1776static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1777{
1778 struct ixgbe_hw *hw = &adapter->hw;
1779 struct net_device *netdev = adapter->netdev;
1780 int i, ret;
1781
1782 ixgbevf_setup_psrtype(adapter);
1783 if (hw->mac.type >= ixgbe_mac_X550_vf)
1784 ixgbevf_setup_vfmrqc(adapter);
1785
1786 spin_lock_bh(&adapter->mbx_lock);
1787
1788 ret = hw->mac.ops.set_rlpml(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
1789 spin_unlock_bh(&adapter->mbx_lock);
1790 if (ret)
1791 dev_err(&adapter->pdev->dev,
1792 "Failed to set MTU at %d\n", netdev->mtu);
1793
1794
1795
1796
1797 for (i = 0; i < adapter->num_rx_queues; i++)
1798 ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
1799}
1800
1801static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
1802 __be16 proto, u16 vid)
1803{
1804 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1805 struct ixgbe_hw *hw = &adapter->hw;
1806 int err;
1807
1808 spin_lock_bh(&adapter->mbx_lock);
1809
1810
1811 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1812
1813 spin_unlock_bh(&adapter->mbx_lock);
1814
1815
1816 if (err == IXGBE_ERR_MBX)
1817 return -EIO;
1818
1819 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1820 return -EACCES;
1821
1822 set_bit(vid, adapter->active_vlans);
1823
1824 return err;
1825}
1826
1827static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
1828 __be16 proto, u16 vid)
1829{
1830 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1831 struct ixgbe_hw *hw = &adapter->hw;
1832 int err;
1833
1834 spin_lock_bh(&adapter->mbx_lock);
1835
1836
1837 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1838
1839 spin_unlock_bh(&adapter->mbx_lock);
1840
1841 clear_bit(vid, adapter->active_vlans);
1842
1843 return err;
1844}
1845
1846static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1847{
1848 u16 vid;
1849
1850 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
1851 ixgbevf_vlan_rx_add_vid(adapter->netdev,
1852 htons(ETH_P_8021Q), vid);
1853}
1854
1855static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1856{
1857 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1858 struct ixgbe_hw *hw = &adapter->hw;
1859 int count = 0;
1860
1861 if ((netdev_uc_count(netdev)) > 10) {
1862 pr_err("Too many unicast filters - No Space\n");
1863 return -ENOSPC;
1864 }
1865
1866 if (!netdev_uc_empty(netdev)) {
1867 struct netdev_hw_addr *ha;
1868
1869 netdev_for_each_uc_addr(ha, netdev) {
1870 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1871 udelay(200);
1872 }
1873 } else {
1874
1875
1876
1877 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1878 }
1879
1880 return count;
1881}
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892static void ixgbevf_set_rx_mode(struct net_device *netdev)
1893{
1894 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1895 struct ixgbe_hw *hw = &adapter->hw;
1896 unsigned int flags = netdev->flags;
1897 int xcast_mode;
1898
1899 xcast_mode = (flags & IFF_ALLMULTI) ? IXGBEVF_XCAST_MODE_ALLMULTI :
1900 (flags & (IFF_BROADCAST | IFF_MULTICAST)) ?
1901 IXGBEVF_XCAST_MODE_MULTI : IXGBEVF_XCAST_MODE_NONE;
1902
1903
1904 if (flags & IFF_PROMISC)
1905 xcast_mode = IXGBEVF_XCAST_MODE_PROMISC;
1906 else if (flags & IFF_ALLMULTI)
1907 xcast_mode = IXGBEVF_XCAST_MODE_ALLMULTI;
1908 else if (flags & (IFF_BROADCAST | IFF_MULTICAST))
1909 xcast_mode = IXGBEVF_XCAST_MODE_MULTI;
1910 else
1911 xcast_mode = IXGBEVF_XCAST_MODE_NONE;
1912
1913 spin_lock_bh(&adapter->mbx_lock);
1914
1915 hw->mac.ops.update_xcast_mode(hw, xcast_mode);
1916
1917
1918 hw->mac.ops.update_mc_addr_list(hw, netdev);
1919
1920 ixgbevf_write_uc_addr_list(netdev);
1921
1922 spin_unlock_bh(&adapter->mbx_lock);
1923}
1924
1925static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1926{
1927 int q_idx;
1928 struct ixgbevf_q_vector *q_vector;
1929 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1930
1931 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1932 q_vector = adapter->q_vector[q_idx];
1933 napi_enable(&q_vector->napi);
1934 }
1935}
1936
1937static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1938{
1939 int q_idx;
1940 struct ixgbevf_q_vector *q_vector;
1941 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1942
1943 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1944 q_vector = adapter->q_vector[q_idx];
1945 napi_disable(&q_vector->napi);
1946 }
1947}
1948
1949static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
1950{
1951 struct ixgbe_hw *hw = &adapter->hw;
1952 unsigned int def_q = 0;
1953 unsigned int num_tcs = 0;
1954 unsigned int num_rx_queues = adapter->num_rx_queues;
1955 unsigned int num_tx_queues = adapter->num_tx_queues;
1956 int err;
1957
1958 spin_lock_bh(&adapter->mbx_lock);
1959
1960
1961 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1962
1963 spin_unlock_bh(&adapter->mbx_lock);
1964
1965 if (err)
1966 return err;
1967
1968 if (num_tcs > 1) {
1969
1970 num_tx_queues = 1;
1971
1972
1973 adapter->tx_ring[0]->reg_idx = def_q;
1974
1975
1976 num_rx_queues = num_tcs;
1977 }
1978
1979
1980 if ((adapter->num_rx_queues != num_rx_queues) ||
1981 (adapter->num_tx_queues != num_tx_queues)) {
1982
1983 hw->mbx.timeout = 0;
1984
1985
1986 set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state);
1987 }
1988
1989 return 0;
1990}
1991
1992static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1993{
1994 ixgbevf_configure_dcb(adapter);
1995
1996 ixgbevf_set_rx_mode(adapter->netdev);
1997
1998 ixgbevf_restore_vlan(adapter);
1999
2000 ixgbevf_configure_tx(adapter);
2001 ixgbevf_configure_rx(adapter);
2002}
2003
2004static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
2005{
2006
2007 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
2008 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
2009 adapter->stats.base_vfgprc;
2010 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
2011 adapter->stats.base_vfgptc;
2012 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
2013 adapter->stats.base_vfgorc;
2014 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
2015 adapter->stats.base_vfgotc;
2016 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
2017 adapter->stats.base_vfmprc;
2018 }
2019}
2020
2021static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2022{
2023 struct ixgbe_hw *hw = &adapter->hw;
2024
2025 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2026 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2027 adapter->stats.last_vfgorc |=
2028 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2029 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2030 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2031 adapter->stats.last_vfgotc |=
2032 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2033 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2034
2035 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2036 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2037 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2038 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2039 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2040}
2041
2042static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
2043{
2044 struct ixgbe_hw *hw = &adapter->hw;
2045 int api[] = { ixgbe_mbox_api_13,
2046 ixgbe_mbox_api_12,
2047 ixgbe_mbox_api_11,
2048 ixgbe_mbox_api_10,
2049 ixgbe_mbox_api_unknown };
2050 int err, idx = 0;
2051
2052 spin_lock_bh(&adapter->mbx_lock);
2053
2054 while (api[idx] != ixgbe_mbox_api_unknown) {
2055 err = hw->mac.ops.negotiate_api_version(hw, api[idx]);
2056 if (!err)
2057 break;
2058 idx++;
2059 }
2060
2061 spin_unlock_bh(&adapter->mbx_lock);
2062}
2063
2064static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
2065{
2066 struct net_device *netdev = adapter->netdev;
2067 struct ixgbe_hw *hw = &adapter->hw;
2068
2069 ixgbevf_configure_msix(adapter);
2070
2071 spin_lock_bh(&adapter->mbx_lock);
2072
2073 if (is_valid_ether_addr(hw->mac.addr))
2074 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2075 else
2076 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
2077
2078 spin_unlock_bh(&adapter->mbx_lock);
2079
2080 smp_mb__before_clear_bit();
2081 clear_bit(__IXGBEVF_DOWN, &adapter->state);
2082 ixgbevf_napi_enable_all(adapter);
2083
2084
2085 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2086 ixgbevf_irq_enable(adapter);
2087
2088
2089 netif_tx_start_all_queues(netdev);
2090
2091 ixgbevf_save_reset_stats(adapter);
2092 ixgbevf_init_last_counter_stats(adapter);
2093
2094 hw->mac.get_link_status = 1;
2095 mod_timer(&adapter->service_timer, jiffies);
2096}
2097
2098void ixgbevf_up(struct ixgbevf_adapter *adapter)
2099{
2100 ixgbevf_configure(adapter);
2101
2102 ixgbevf_up_complete(adapter);
2103}
2104
2105
2106
2107
2108
2109static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
2110{
2111 struct device *dev = rx_ring->dev;
2112 unsigned long size;
2113 unsigned int i;
2114
2115
2116 if (rx_ring->skb) {
2117 dev_kfree_skb(rx_ring->skb);
2118 rx_ring->skb = NULL;
2119 }
2120
2121
2122 if (!rx_ring->rx_buffer_info)
2123 return;
2124
2125
2126 for (i = 0; i < rx_ring->count; i++) {
2127 struct ixgbevf_rx_buffer *rx_buffer;
2128
2129 rx_buffer = &rx_ring->rx_buffer_info[i];
2130 if (rx_buffer->dma)
2131 dma_unmap_page(dev, rx_buffer->dma,
2132 PAGE_SIZE, DMA_FROM_DEVICE);
2133 rx_buffer->dma = 0;
2134 if (rx_buffer->page)
2135 __free_page(rx_buffer->page);
2136 rx_buffer->page = NULL;
2137 }
2138
2139 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2140 memset(rx_ring->rx_buffer_info, 0, size);
2141
2142
2143 memset(rx_ring->desc, 0, rx_ring->size);
2144}
2145
2146
2147
2148
2149
2150static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
2151{
2152 struct ixgbevf_tx_buffer *tx_buffer_info;
2153 unsigned long size;
2154 unsigned int i;
2155
2156 if (!tx_ring->tx_buffer_info)
2157 return;
2158
2159
2160 for (i = 0; i < tx_ring->count; i++) {
2161 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2162 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
2163 }
2164
2165 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2166 memset(tx_ring->tx_buffer_info, 0, size);
2167
2168 memset(tx_ring->desc, 0, tx_ring->size);
2169}
2170
2171
2172
2173
2174
2175static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2176{
2177 int i;
2178
2179 for (i = 0; i < adapter->num_rx_queues; i++)
2180 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
2181}
2182
2183
2184
2185
2186
2187static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2188{
2189 int i;
2190
2191 for (i = 0; i < adapter->num_tx_queues; i++)
2192 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
2193}
2194
2195void ixgbevf_down(struct ixgbevf_adapter *adapter)
2196{
2197 struct net_device *netdev = adapter->netdev;
2198 struct ixgbe_hw *hw = &adapter->hw;
2199 int i;
2200
2201
2202 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2203 return;
2204
2205
2206 for (i = 0; i < adapter->num_rx_queues; i++)
2207 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
2208
2209 usleep_range(10000, 20000);
2210
2211 netif_tx_stop_all_queues(netdev);
2212
2213
2214 netif_carrier_off(netdev);
2215 netif_tx_disable(netdev);
2216
2217 ixgbevf_irq_disable(adapter);
2218
2219 ixgbevf_napi_disable_all(adapter);
2220
2221 del_timer_sync(&adapter->service_timer);
2222
2223
2224 for (i = 0; i < adapter->num_tx_queues; i++) {
2225 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2226
2227 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2228 IXGBE_TXDCTL_SWFLSH);
2229 }
2230
2231 if (!pci_channel_offline(adapter->pdev))
2232 ixgbevf_reset(adapter);
2233
2234 ixgbevf_clean_all_tx_rings(adapter);
2235 ixgbevf_clean_all_rx_rings(adapter);
2236}
2237
2238void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2239{
2240 WARN_ON(in_interrupt());
2241
2242 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2243 msleep(1);
2244
2245 ixgbevf_down(adapter);
2246 ixgbevf_up(adapter);
2247
2248 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2249}
2250
2251void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2252{
2253 struct ixgbe_hw *hw = &adapter->hw;
2254 struct net_device *netdev = adapter->netdev;
2255
2256 if (hw->mac.ops.reset_hw(hw)) {
2257 hw_dbg(hw, "PF still resetting\n");
2258 } else {
2259 hw->mac.ops.init_hw(hw);
2260 ixgbevf_negotiate_api(adapter);
2261 }
2262
2263 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
2264 ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
2265 ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
2266 }
2267
2268 adapter->last_reset = jiffies;
2269}
2270
2271static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2272 int vectors)
2273{
2274 int vector_threshold;
2275
2276
2277
2278
2279
2280 vector_threshold = MIN_MSIX_COUNT;
2281
2282
2283
2284
2285
2286
2287 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2288 vector_threshold, vectors);
2289
2290 if (vectors < 0) {
2291 dev_err(&adapter->pdev->dev,
2292 "Unable to allocate MSI-X interrupts\n");
2293 kfree(adapter->msix_entries);
2294 adapter->msix_entries = NULL;
2295 return vectors;
2296 }
2297
2298
2299
2300
2301
2302 adapter->num_msix_vectors = vectors;
2303
2304 return 0;
2305}
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2319{
2320 struct ixgbe_hw *hw = &adapter->hw;
2321 unsigned int def_q = 0;
2322 unsigned int num_tcs = 0;
2323 int err;
2324
2325
2326 adapter->num_rx_queues = 1;
2327 adapter->num_tx_queues = 1;
2328
2329 spin_lock_bh(&adapter->mbx_lock);
2330
2331
2332 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2333
2334 spin_unlock_bh(&adapter->mbx_lock);
2335
2336 if (err)
2337 return;
2338
2339
2340 if (num_tcs > 1) {
2341 adapter->num_rx_queues = num_tcs;
2342 } else {
2343 u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
2344
2345 switch (hw->api_version) {
2346 case ixgbe_mbox_api_11:
2347 case ixgbe_mbox_api_12:
2348 case ixgbe_mbox_api_13:
2349 adapter->num_rx_queues = rss;
2350 adapter->num_tx_queues = rss;
2351 default:
2352 break;
2353 }
2354 }
2355}
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2366{
2367 struct ixgbevf_ring *ring;
2368 int rx = 0, tx = 0;
2369
2370 for (; tx < adapter->num_tx_queues; tx++) {
2371 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2372 if (!ring)
2373 goto err_allocation;
2374
2375 ring->dev = &adapter->pdev->dev;
2376 ring->netdev = adapter->netdev;
2377 ring->count = adapter->tx_ring_count;
2378 ring->queue_index = tx;
2379 ring->reg_idx = tx;
2380
2381 adapter->tx_ring[tx] = ring;
2382 }
2383
2384 for (; rx < adapter->num_rx_queues; rx++) {
2385 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2386 if (!ring)
2387 goto err_allocation;
2388
2389 ring->dev = &adapter->pdev->dev;
2390 ring->netdev = adapter->netdev;
2391
2392 ring->count = adapter->rx_ring_count;
2393 ring->queue_index = rx;
2394 ring->reg_idx = rx;
2395
2396 adapter->rx_ring[rx] = ring;
2397 }
2398
2399 return 0;
2400
2401err_allocation:
2402 while (tx) {
2403 kfree(adapter->tx_ring[--tx]);
2404 adapter->tx_ring[tx] = NULL;
2405 }
2406
2407 while (rx) {
2408 kfree(adapter->rx_ring[--rx]);
2409 adapter->rx_ring[rx] = NULL;
2410 }
2411 return -ENOMEM;
2412}
2413
2414
2415
2416
2417
2418
2419
2420
2421static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2422{
2423 struct net_device *netdev = adapter->netdev;
2424 int err;
2425 int vector, v_budget;
2426
2427
2428
2429
2430
2431
2432
2433 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2434 v_budget = min_t(int, v_budget, num_online_cpus());
2435 v_budget += NON_Q_VECTORS;
2436
2437
2438
2439
2440 adapter->msix_entries = kcalloc(v_budget,
2441 sizeof(struct msix_entry), GFP_KERNEL);
2442 if (!adapter->msix_entries)
2443 return -ENOMEM;
2444
2445 for (vector = 0; vector < v_budget; vector++)
2446 adapter->msix_entries[vector].entry = vector;
2447
2448 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
2449 if (err)
2450 return err;
2451
2452 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
2453 if (err)
2454 return err;
2455
2456 return netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
2457}
2458
2459
2460
2461
2462
2463
2464
2465
2466static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2467{
2468 int q_idx, num_q_vectors;
2469 struct ixgbevf_q_vector *q_vector;
2470
2471 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2472
2473 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2474 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2475 if (!q_vector)
2476 goto err_out;
2477 q_vector->adapter = adapter;
2478 q_vector->v_idx = q_idx;
2479 netif_napi_add(adapter->netdev, &q_vector->napi,
2480 ixgbevf_poll, 64);
2481 adapter->q_vector[q_idx] = q_vector;
2482 }
2483
2484 return 0;
2485
2486err_out:
2487 while (q_idx) {
2488 q_idx--;
2489 q_vector = adapter->q_vector[q_idx];
2490#ifdef CONFIG_NET_RX_BUSY_POLL
2491 napi_hash_del(&q_vector->napi);
2492#endif
2493 netif_napi_del(&q_vector->napi);
2494 kfree(q_vector);
2495 adapter->q_vector[q_idx] = NULL;
2496 }
2497 return -ENOMEM;
2498}
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2509{
2510 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2511
2512 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2513 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2514
2515 adapter->q_vector[q_idx] = NULL;
2516#ifdef CONFIG_NET_RX_BUSY_POLL
2517 napi_hash_del(&q_vector->napi);
2518#endif
2519 netif_napi_del(&q_vector->napi);
2520 kfree(q_vector);
2521 }
2522}
2523
2524
2525
2526
2527
2528
2529static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2530{
2531 if (!adapter->msix_entries)
2532 return;
2533
2534 pci_disable_msix(adapter->pdev);
2535 kfree(adapter->msix_entries);
2536 adapter->msix_entries = NULL;
2537}
2538
2539
2540
2541
2542
2543
2544static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2545{
2546 int err;
2547
2548
2549 ixgbevf_set_num_queues(adapter);
2550
2551 err = ixgbevf_set_interrupt_capability(adapter);
2552 if (err) {
2553 hw_dbg(&adapter->hw,
2554 "Unable to setup interrupt capabilities\n");
2555 goto err_set_interrupt;
2556 }
2557
2558 err = ixgbevf_alloc_q_vectors(adapter);
2559 if (err) {
2560 hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
2561 goto err_alloc_q_vectors;
2562 }
2563
2564 err = ixgbevf_alloc_queues(adapter);
2565 if (err) {
2566 pr_err("Unable to allocate memory for queues\n");
2567 goto err_alloc_queues;
2568 }
2569
2570 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n",
2571 (adapter->num_rx_queues > 1) ? "Enabled" :
2572 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2573
2574 set_bit(__IXGBEVF_DOWN, &adapter->state);
2575
2576 return 0;
2577err_alloc_queues:
2578 ixgbevf_free_q_vectors(adapter);
2579err_alloc_q_vectors:
2580 ixgbevf_reset_interrupt_capability(adapter);
2581err_set_interrupt:
2582 return err;
2583}
2584
2585
2586
2587
2588
2589
2590
2591
2592static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2593{
2594 int i;
2595
2596 for (i = 0; i < adapter->num_tx_queues; i++) {
2597 kfree(adapter->tx_ring[i]);
2598 adapter->tx_ring[i] = NULL;
2599 }
2600 for (i = 0; i < adapter->num_rx_queues; i++) {
2601 kfree(adapter->rx_ring[i]);
2602 adapter->rx_ring[i] = NULL;
2603 }
2604
2605 adapter->num_tx_queues = 0;
2606 adapter->num_rx_queues = 0;
2607
2608 ixgbevf_free_q_vectors(adapter);
2609 ixgbevf_reset_interrupt_capability(adapter);
2610}
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2621{
2622 struct ixgbe_hw *hw = &adapter->hw;
2623 struct pci_dev *pdev = adapter->pdev;
2624 struct net_device *netdev = adapter->netdev;
2625 int err;
2626
2627
2628 hw->vendor_id = pdev->vendor;
2629 hw->device_id = pdev->device;
2630 hw->revision_id = pdev->revision;
2631 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2632 hw->subsystem_device_id = pdev->subsystem_device;
2633
2634 hw->mbx.ops.init_params(hw);
2635
2636 if (hw->mac.type >= ixgbe_mac_X550_vf) {
2637 err = ixgbevf_init_rss_key(adapter);
2638 if (err)
2639 goto out;
2640 }
2641
2642
2643 hw->mac.max_tx_queues = 2;
2644 hw->mac.max_rx_queues = 2;
2645
2646
2647 spin_lock_init(&adapter->mbx_lock);
2648
2649 err = hw->mac.ops.reset_hw(hw);
2650 if (err) {
2651 dev_info(&pdev->dev,
2652 "PF still in reset state. Is the PF interface up?\n");
2653 } else {
2654 err = hw->mac.ops.init_hw(hw);
2655 if (err) {
2656 pr_err("init_shared_code failed: %d\n", err);
2657 goto out;
2658 }
2659 ixgbevf_negotiate_api(adapter);
2660 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
2661 if (err)
2662 dev_info(&pdev->dev, "Error reading MAC address\n");
2663 else if (is_zero_ether_addr(adapter->hw.mac.addr))
2664 dev_info(&pdev->dev,
2665 "MAC address not assigned by administrator.\n");
2666 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
2667 }
2668
2669 if (!is_valid_ether_addr(netdev->dev_addr)) {
2670 dev_info(&pdev->dev, "Assigning random MAC address\n");
2671 eth_hw_addr_random(netdev);
2672 ether_addr_copy(hw->mac.addr, netdev->dev_addr);
2673 ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
2674 }
2675
2676
2677 adapter->rx_itr_setting = 1;
2678 adapter->tx_itr_setting = 1;
2679
2680
2681 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2682 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2683
2684 set_bit(__IXGBEVF_DOWN, &adapter->state);
2685 return 0;
2686
2687out:
2688 return err;
2689}
2690
2691#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2692 { \
2693 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2694 if (current_counter < last_counter) \
2695 counter += 0x100000000LL; \
2696 last_counter = current_counter; \
2697 counter &= 0xFFFFFFFF00000000LL; \
2698 counter |= current_counter; \
2699 }
2700
2701#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2702 { \
2703 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2704 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2705 u64 current_counter = (current_counter_msb << 32) | \
2706 current_counter_lsb; \
2707 if (current_counter < last_counter) \
2708 counter += 0x1000000000LL; \
2709 last_counter = current_counter; \
2710 counter &= 0xFFFFFFF000000000LL; \
2711 counter |= current_counter; \
2712 }
2713
2714
2715
2716
2717void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2718{
2719 struct ixgbe_hw *hw = &adapter->hw;
2720 int i;
2721
2722 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2723 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2724 return;
2725
2726 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2727 adapter->stats.vfgprc);
2728 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2729 adapter->stats.vfgptc);
2730 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2731 adapter->stats.last_vfgorc,
2732 adapter->stats.vfgorc);
2733 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2734 adapter->stats.last_vfgotc,
2735 adapter->stats.vfgotc);
2736 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2737 adapter->stats.vfmprc);
2738
2739 for (i = 0; i < adapter->num_rx_queues; i++) {
2740 adapter->hw_csum_rx_error +=
2741 adapter->rx_ring[i]->hw_csum_rx_error;
2742 adapter->rx_ring[i]->hw_csum_rx_error = 0;
2743 }
2744}
2745
2746
2747
2748
2749
2750static void ixgbevf_service_timer(unsigned long data)
2751{
2752 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2753
2754
2755 mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
2756
2757 ixgbevf_service_event_schedule(adapter);
2758}
2759
2760static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
2761{
2762 if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state))
2763 return;
2764
2765
2766 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2767 test_bit(__IXGBEVF_REMOVING, &adapter->state) ||
2768 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2769 return;
2770
2771 adapter->tx_timeout_count++;
2772
2773 rtnl_lock();
2774 ixgbevf_reinit_locked(adapter);
2775 rtnl_unlock();
2776}
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
2788{
2789 struct ixgbe_hw *hw = &adapter->hw;
2790 u32 eics = 0;
2791 int i;
2792
2793
2794 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2795 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2796 return;
2797
2798
2799 if (netif_carrier_ok(adapter->netdev)) {
2800 for (i = 0; i < adapter->num_tx_queues; i++)
2801 set_check_for_tx_hang(adapter->tx_ring[i]);
2802 }
2803
2804
2805 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2806 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2807
2808 if (qv->rx.ring || qv->tx.ring)
2809 eics |= BIT(i);
2810 }
2811
2812
2813 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
2814}
2815
2816
2817
2818
2819
2820static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
2821{
2822 struct ixgbe_hw *hw = &adapter->hw;
2823 u32 link_speed = adapter->link_speed;
2824 bool link_up = adapter->link_up;
2825 s32 err;
2826
2827 spin_lock_bh(&adapter->mbx_lock);
2828
2829 err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
2830
2831 spin_unlock_bh(&adapter->mbx_lock);
2832
2833
2834 if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
2835 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
2836 link_up = false;
2837 }
2838
2839 adapter->link_up = link_up;
2840 adapter->link_speed = link_speed;
2841}
2842
2843
2844
2845
2846
2847
2848static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
2849{
2850 struct net_device *netdev = adapter->netdev;
2851
2852
2853 if (netif_carrier_ok(netdev))
2854 return;
2855
2856 dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
2857 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2858 "10 Gbps" :
2859 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
2860 "1 Gbps" :
2861 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
2862 "100 Mbps" :
2863 "unknown speed");
2864
2865 netif_carrier_on(netdev);
2866}
2867
2868
2869
2870
2871
2872
2873static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
2874{
2875 struct net_device *netdev = adapter->netdev;
2876
2877 adapter->link_speed = 0;
2878
2879
2880 if (!netif_carrier_ok(netdev))
2881 return;
2882
2883 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2884
2885 netif_carrier_off(netdev);
2886}
2887
2888
2889
2890
2891
2892static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
2893{
2894
2895 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2896 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2897 return;
2898
2899 ixgbevf_watchdog_update_link(adapter);
2900
2901 if (adapter->link_up)
2902 ixgbevf_watchdog_link_is_up(adapter);
2903 else
2904 ixgbevf_watchdog_link_is_down(adapter);
2905
2906 ixgbevf_update_stats(adapter);
2907}
2908
2909
2910
2911
2912
2913static void ixgbevf_service_task(struct work_struct *work)
2914{
2915 struct ixgbevf_adapter *adapter = container_of(work,
2916 struct ixgbevf_adapter,
2917 service_task);
2918 struct ixgbe_hw *hw = &adapter->hw;
2919
2920 if (IXGBE_REMOVED(hw->hw_addr)) {
2921 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
2922 rtnl_lock();
2923 ixgbevf_down(adapter);
2924 rtnl_unlock();
2925 }
2926 return;
2927 }
2928
2929 ixgbevf_queue_reset_subtask(adapter);
2930 ixgbevf_reset_subtask(adapter);
2931 ixgbevf_watchdog_subtask(adapter);
2932 ixgbevf_check_hang_subtask(adapter);
2933
2934 ixgbevf_service_event_complete(adapter);
2935}
2936
2937
2938
2939
2940
2941
2942
2943void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
2944{
2945 ixgbevf_clean_tx_ring(tx_ring);
2946
2947 vfree(tx_ring->tx_buffer_info);
2948 tx_ring->tx_buffer_info = NULL;
2949
2950
2951 if (!tx_ring->desc)
2952 return;
2953
2954 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
2955 tx_ring->dma);
2956
2957 tx_ring->desc = NULL;
2958}
2959
2960
2961
2962
2963
2964
2965
2966static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2967{
2968 int i;
2969
2970 for (i = 0; i < adapter->num_tx_queues; i++)
2971 if (adapter->tx_ring[i]->desc)
2972 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
2973}
2974
2975
2976
2977
2978
2979
2980
2981int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
2982{
2983 struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
2984 int size;
2985
2986 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2987 tx_ring->tx_buffer_info = vzalloc(size);
2988 if (!tx_ring->tx_buffer_info)
2989 goto err;
2990
2991
2992 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2993 tx_ring->size = ALIGN(tx_ring->size, 4096);
2994
2995 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
2996 &tx_ring->dma, GFP_KERNEL);
2997 if (!tx_ring->desc)
2998 goto err;
2999
3000 return 0;
3001
3002err:
3003 vfree(tx_ring->tx_buffer_info);
3004 tx_ring->tx_buffer_info = NULL;
3005 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
3006 return -ENOMEM;
3007}
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
3020{
3021 int i, err = 0;
3022
3023 for (i = 0; i < adapter->num_tx_queues; i++) {
3024 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
3025 if (!err)
3026 continue;
3027 hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
3028 break;
3029 }
3030
3031 return err;
3032}
3033
3034
3035
3036
3037
3038
3039
3040int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
3041{
3042 int size;
3043
3044 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
3045 rx_ring->rx_buffer_info = vzalloc(size);
3046 if (!rx_ring->rx_buffer_info)
3047 goto err;
3048
3049
3050 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3051 rx_ring->size = ALIGN(rx_ring->size, 4096);
3052
3053 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
3054 &rx_ring->dma, GFP_KERNEL);
3055
3056 if (!rx_ring->desc)
3057 goto err;
3058
3059 return 0;
3060err:
3061 vfree(rx_ring->rx_buffer_info);
3062 rx_ring->rx_buffer_info = NULL;
3063 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
3064 return -ENOMEM;
3065}
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
3078{
3079 int i, err = 0;
3080
3081 for (i = 0; i < adapter->num_rx_queues; i++) {
3082 err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
3083 if (!err)
3084 continue;
3085 hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
3086 break;
3087 }
3088 return err;
3089}
3090
3091
3092
3093
3094
3095
3096
3097void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
3098{
3099 ixgbevf_clean_rx_ring(rx_ring);
3100
3101 vfree(rx_ring->rx_buffer_info);
3102 rx_ring->rx_buffer_info = NULL;
3103
3104 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
3105 rx_ring->dma);
3106
3107 rx_ring->desc = NULL;
3108}
3109
3110
3111
3112
3113
3114
3115
3116static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
3117{
3118 int i;
3119
3120 for (i = 0; i < adapter->num_rx_queues; i++)
3121 if (adapter->rx_ring[i]->desc)
3122 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
3123}
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137int ixgbevf_open(struct net_device *netdev)
3138{
3139 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3140 struct ixgbe_hw *hw = &adapter->hw;
3141 int err;
3142
3143
3144
3145
3146
3147
3148
3149 if (!adapter->num_msix_vectors)
3150 return -ENOMEM;
3151
3152 if (hw->adapter_stopped) {
3153 ixgbevf_reset(adapter);
3154
3155
3156
3157 if (hw->adapter_stopped) {
3158 err = IXGBE_ERR_MBX;
3159 pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
3160 goto err_setup_reset;
3161 }
3162 }
3163
3164
3165 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
3166 return -EBUSY;
3167
3168 netif_carrier_off(netdev);
3169
3170
3171 err = ixgbevf_setup_all_tx_resources(adapter);
3172 if (err)
3173 goto err_setup_tx;
3174
3175
3176 err = ixgbevf_setup_all_rx_resources(adapter);
3177 if (err)
3178 goto err_setup_rx;
3179
3180 ixgbevf_configure(adapter);
3181
3182
3183
3184
3185
3186 ixgbevf_map_rings_to_vectors(adapter);
3187
3188 err = ixgbevf_request_irq(adapter);
3189 if (err)
3190 goto err_req_irq;
3191
3192 ixgbevf_up_complete(adapter);
3193
3194 return 0;
3195
3196err_req_irq:
3197 ixgbevf_down(adapter);
3198err_setup_rx:
3199 ixgbevf_free_all_rx_resources(adapter);
3200err_setup_tx:
3201 ixgbevf_free_all_tx_resources(adapter);
3202 ixgbevf_reset(adapter);
3203
3204err_setup_reset:
3205
3206 return err;
3207}
3208
3209
3210
3211
3212
3213
3214
3215
3216static void ixgbevf_close_suspend(struct ixgbevf_adapter *adapter)
3217{
3218 ixgbevf_down(adapter);
3219 ixgbevf_free_irq(adapter);
3220 ixgbevf_free_all_tx_resources(adapter);
3221 ixgbevf_free_all_rx_resources(adapter);
3222}
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235int ixgbevf_close(struct net_device *netdev)
3236{
3237 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3238
3239 if (netif_device_present(netdev))
3240 ixgbevf_close_suspend(adapter);
3241
3242 return 0;
3243}
3244
3245static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3246{
3247 struct net_device *dev = adapter->netdev;
3248
3249 if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED,
3250 &adapter->state))
3251 return;
3252
3253
3254 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3255 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3256 return;
3257
3258
3259
3260
3261
3262 rtnl_lock();
3263
3264 if (netif_running(dev))
3265 ixgbevf_close(dev);
3266
3267 ixgbevf_clear_interrupt_scheme(adapter);
3268 ixgbevf_init_interrupt_scheme(adapter);
3269
3270 if (netif_running(dev))
3271 ixgbevf_open(dev);
3272
3273 rtnl_unlock();
3274}
3275
3276static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
3277 u32 vlan_macip_lens, u32 type_tucmd,
3278 u32 mss_l4len_idx)
3279{
3280 struct ixgbe_adv_tx_context_desc *context_desc;
3281 u16 i = tx_ring->next_to_use;
3282
3283 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
3284
3285 i++;
3286 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
3287
3288
3289 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
3290
3291 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3292 context_desc->seqnum_seed = 0;
3293 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
3294 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3295}
3296
3297static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
3298 struct ixgbevf_tx_buffer *first,
3299 u8 *hdr_len)
3300{
3301 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
3302 struct sk_buff *skb = first->skb;
3303 union {
3304 struct iphdr *v4;
3305 struct ipv6hdr *v6;
3306 unsigned char *hdr;
3307 } ip;
3308 union {
3309 struct tcphdr *tcp;
3310 unsigned char *hdr;
3311 } l4;
3312 u32 paylen, l4_offset;
3313 int err;
3314
3315 if (skb->ip_summed != CHECKSUM_PARTIAL)
3316 return 0;
3317
3318 if (!skb_is_gso(skb))
3319 return 0;
3320
3321 err = skb_cow_head(skb, 0);
3322 if (err < 0)
3323 return err;
3324
3325 if (eth_p_mpls(first->protocol))
3326 ip.hdr = skb_inner_network_header(skb);
3327 else
3328 ip.hdr = skb_network_header(skb);
3329 l4.hdr = skb_checksum_start(skb);
3330
3331
3332 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3333
3334
3335 if (ip.v4->version == 4) {
3336 unsigned char *csum_start = skb_checksum_start(skb);
3337 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
3338
3339
3340
3341
3342 ip.v4->check = csum_fold(csum_partial(trans_start,
3343 csum_start - trans_start,
3344 0));
3345 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3346
3347 ip.v4->tot_len = 0;
3348 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3349 IXGBE_TX_FLAGS_CSUM |
3350 IXGBE_TX_FLAGS_IPV4;
3351 } else {
3352 ip.v6->payload_len = 0;
3353 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3354 IXGBE_TX_FLAGS_CSUM;
3355 }
3356
3357
3358 l4_offset = l4.hdr - skb->data;
3359
3360
3361 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
3362
3363
3364 paylen = skb->len - l4_offset;
3365 csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
3366
3367
3368 first->gso_segs = skb_shinfo(skb)->gso_segs;
3369 first->bytecount += (first->gso_segs - 1) * *hdr_len;
3370
3371
3372 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
3373 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
3374 mss_l4len_idx |= (1u << IXGBE_ADVTXD_IDX_SHIFT);
3375
3376
3377 vlan_macip_lens = l4.hdr - ip.hdr;
3378 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
3379 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
3380
3381 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3382 type_tucmd, mss_l4len_idx);
3383
3384 return 1;
3385}
3386
3387static inline bool ixgbevf_ipv6_csum_is_sctp(struct sk_buff *skb)
3388{
3389 unsigned int offset = 0;
3390
3391 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
3392
3393 return offset == skb_checksum_start_offset(skb);
3394}
3395
3396static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
3397 struct ixgbevf_tx_buffer *first)
3398{
3399 struct sk_buff *skb = first->skb;
3400 u32 vlan_macip_lens = 0;
3401 u32 type_tucmd = 0;
3402
3403 if (skb->ip_summed != CHECKSUM_PARTIAL)
3404 goto no_csum;
3405
3406 switch (skb->csum_offset) {
3407 case offsetof(struct tcphdr, check):
3408 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3409
3410 case offsetof(struct udphdr, check):
3411 break;
3412 case offsetof(struct sctphdr, checksum):
3413
3414 if (((first->protocol == htons(ETH_P_IP)) &&
3415 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
3416 ((first->protocol == htons(ETH_P_IPV6)) &&
3417 ixgbevf_ipv6_csum_is_sctp(skb))) {
3418 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
3419 break;
3420 }
3421
3422 default:
3423 skb_checksum_help(skb);
3424 goto no_csum;
3425 }
3426
3427 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
3428 vlan_macip_lens = skb_checksum_start_offset(skb) -
3429 skb_network_offset(skb);
3430no_csum:
3431
3432 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
3433 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
3434
3435 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
3436}
3437
3438static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
3439{
3440
3441 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3442 IXGBE_ADVTXD_DCMD_IFCS |
3443 IXGBE_ADVTXD_DCMD_DEXT);
3444
3445
3446 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3447 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
3448
3449
3450 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3451 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
3452
3453 return cmd_type;
3454}
3455
3456static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3457 u32 tx_flags, unsigned int paylen)
3458{
3459 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
3460
3461
3462 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3463 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
3464
3465
3466 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3467 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
3468
3469
3470 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3471 olinfo_status |= cpu_to_le32(1u << IXGBE_ADVTXD_IDX_SHIFT);
3472
3473
3474
3475
3476 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
3477
3478 tx_desc->read.olinfo_status = olinfo_status;
3479}
3480
3481static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3482 struct ixgbevf_tx_buffer *first,
3483 const u8 hdr_len)
3484{
3485 dma_addr_t dma;
3486 struct sk_buff *skb = first->skb;
3487 struct ixgbevf_tx_buffer *tx_buffer;
3488 union ixgbe_adv_tx_desc *tx_desc;
3489 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
3490 unsigned int data_len = skb->data_len;
3491 unsigned int size = skb_headlen(skb);
3492 unsigned int paylen = skb->len - hdr_len;
3493 u32 tx_flags = first->tx_flags;
3494 __le32 cmd_type;
3495 u16 i = tx_ring->next_to_use;
3496
3497 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
3498
3499 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen);
3500 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
3501
3502 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
3503 if (dma_mapping_error(tx_ring->dev, dma))
3504 goto dma_error;
3505
3506
3507 dma_unmap_len_set(first, len, size);
3508 dma_unmap_addr_set(first, dma, dma);
3509
3510 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3511
3512 for (;;) {
3513 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3514 tx_desc->read.cmd_type_len =
3515 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
3516
3517 i++;
3518 tx_desc++;
3519 if (i == tx_ring->count) {
3520 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3521 i = 0;
3522 }
3523
3524 dma += IXGBE_MAX_DATA_PER_TXD;
3525 size -= IXGBE_MAX_DATA_PER_TXD;
3526
3527 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3528 tx_desc->read.olinfo_status = 0;
3529 }
3530
3531 if (likely(!data_len))
3532 break;
3533
3534 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
3535
3536 i++;
3537 tx_desc++;
3538 if (i == tx_ring->count) {
3539 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3540 i = 0;
3541 }
3542
3543 size = skb_frag_size(frag);
3544 data_len -= size;
3545
3546 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
3547 DMA_TO_DEVICE);
3548 if (dma_mapping_error(tx_ring->dev, dma))
3549 goto dma_error;
3550
3551 tx_buffer = &tx_ring->tx_buffer_info[i];
3552 dma_unmap_len_set(tx_buffer, len, size);
3553 dma_unmap_addr_set(tx_buffer, dma, dma);
3554
3555 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3556 tx_desc->read.olinfo_status = 0;
3557
3558 frag++;
3559 }
3560
3561
3562 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
3563 tx_desc->read.cmd_type_len = cmd_type;
3564
3565
3566 first->time_stamp = jiffies;
3567
3568
3569
3570
3571
3572
3573
3574
3575 wmb();
3576
3577
3578 first->next_to_watch = tx_desc;
3579
3580 i++;
3581 if (i == tx_ring->count)
3582 i = 0;
3583
3584 tx_ring->next_to_use = i;
3585
3586
3587 ixgbevf_write_tail(tx_ring, i);
3588
3589 return;
3590dma_error:
3591 dev_err(tx_ring->dev, "TX DMA map failed\n");
3592
3593
3594 for (;;) {
3595 tx_buffer = &tx_ring->tx_buffer_info[i];
3596 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer);
3597 if (tx_buffer == first)
3598 break;
3599 if (i == 0)
3600 i = tx_ring->count;
3601 i--;
3602 }
3603
3604 tx_ring->next_to_use = i;
3605}
3606
3607static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
3608{
3609 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
3610
3611
3612
3613
3614 smp_mb();
3615
3616
3617
3618
3619 if (likely(ixgbevf_desc_unused(tx_ring) < size))
3620 return -EBUSY;
3621
3622
3623 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
3624 ++tx_ring->tx_stats.restart_queue;
3625
3626 return 0;
3627}
3628
3629static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
3630{
3631 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
3632 return 0;
3633 return __ixgbevf_maybe_stop_tx(tx_ring, size);
3634}
3635
3636static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3637{
3638 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3639 struct ixgbevf_tx_buffer *first;
3640 struct ixgbevf_ring *tx_ring;
3641 int tso;
3642 u32 tx_flags = 0;
3643 u16 count = TXD_USE_COUNT(skb_headlen(skb));
3644#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3645 unsigned short f;
3646#endif
3647 u8 hdr_len = 0;
3648 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
3649
3650 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
3651 dev_kfree_skb_any(skb);
3652 return NETDEV_TX_OK;
3653 }
3654
3655 tx_ring = adapter->tx_ring[skb->queue_mapping];
3656
3657
3658
3659
3660
3661
3662
3663#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3664 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3665 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3666#else
3667 count += skb_shinfo(skb)->nr_frags;
3668#endif
3669 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
3670 tx_ring->tx_stats.tx_busy++;
3671 return NETDEV_TX_BUSY;
3672 }
3673
3674
3675 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
3676 first->skb = skb;
3677 first->bytecount = skb->len;
3678 first->gso_segs = 1;
3679
3680 if (skb_vlan_tag_present(skb)) {
3681 tx_flags |= skb_vlan_tag_get(skb);
3682 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3683 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3684 }
3685
3686
3687 first->tx_flags = tx_flags;
3688 first->protocol = vlan_get_protocol(skb);
3689
3690 tso = ixgbevf_tso(tx_ring, first, &hdr_len);
3691 if (tso < 0)
3692 goto out_drop;
3693 else if (!tso)
3694 ixgbevf_tx_csum(tx_ring, first);
3695
3696 ixgbevf_tx_map(tx_ring, first, hdr_len);
3697
3698 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
3699
3700 return NETDEV_TX_OK;
3701
3702out_drop:
3703 dev_kfree_skb_any(first->skb);
3704 first->skb = NULL;
3705
3706 return NETDEV_TX_OK;
3707}
3708
3709
3710
3711
3712
3713
3714
3715
3716static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3717{
3718 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3719 struct ixgbe_hw *hw = &adapter->hw;
3720 struct sockaddr *addr = p;
3721 int err;
3722
3723 if (!is_valid_ether_addr(addr->sa_data))
3724 return -EADDRNOTAVAIL;
3725
3726 spin_lock_bh(&adapter->mbx_lock);
3727
3728 err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
3729
3730 spin_unlock_bh(&adapter->mbx_lock);
3731
3732 if (err)
3733 return -EPERM;
3734
3735 ether_addr_copy(hw->mac.addr, addr->sa_data);
3736 ether_addr_copy(netdev->dev_addr, addr->sa_data);
3737
3738 return 0;
3739}
3740
3741
3742
3743
3744
3745
3746
3747
3748static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3749{
3750 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3751 struct ixgbe_hw *hw = &adapter->hw;
3752 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3753 int ret;
3754
3755 spin_lock_bh(&adapter->mbx_lock);
3756
3757 ret = hw->mac.ops.set_rlpml(hw, max_frame);
3758 spin_unlock_bh(&adapter->mbx_lock);
3759 if (ret)
3760 return -EINVAL;
3761
3762 hw_dbg(hw, "changing MTU from %d to %d\n",
3763 netdev->mtu, new_mtu);
3764
3765
3766 netdev->mtu = new_mtu;
3767
3768 return 0;
3769}
3770
3771#ifdef CONFIG_NET_POLL_CONTROLLER
3772
3773
3774
3775
3776static void ixgbevf_netpoll(struct net_device *netdev)
3777{
3778 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3779 int i;
3780
3781
3782 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
3783 return;
3784 for (i = 0; i < adapter->num_rx_queues; i++)
3785 ixgbevf_msix_clean_rings(0, adapter->q_vector[i]);
3786}
3787#endif
3788
3789static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
3790{
3791 struct net_device *netdev = pci_get_drvdata(pdev);
3792 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3793#ifdef CONFIG_PM
3794 int retval = 0;
3795#endif
3796
3797 rtnl_lock();
3798 netif_device_detach(netdev);
3799
3800 if (netif_running(netdev))
3801 ixgbevf_close_suspend(adapter);
3802
3803 ixgbevf_clear_interrupt_scheme(adapter);
3804 rtnl_unlock();
3805
3806#ifdef CONFIG_PM
3807 retval = pci_save_state(pdev);
3808 if (retval)
3809 return retval;
3810
3811#endif
3812 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3813 pci_disable_device(pdev);
3814
3815 return 0;
3816}
3817
3818#ifdef CONFIG_PM
3819static int ixgbevf_resume(struct pci_dev *pdev)
3820{
3821 struct net_device *netdev = pci_get_drvdata(pdev);
3822 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3823 u32 err;
3824
3825 pci_restore_state(pdev);
3826
3827
3828
3829 pci_save_state(pdev);
3830
3831 err = pci_enable_device_mem(pdev);
3832 if (err) {
3833 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3834 return err;
3835 }
3836
3837 adapter->hw.hw_addr = adapter->io_addr;
3838 smp_mb__before_clear_bit();
3839 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
3840 pci_set_master(pdev);
3841
3842 ixgbevf_reset(adapter);
3843
3844 rtnl_lock();
3845 err = ixgbevf_init_interrupt_scheme(adapter);
3846 rtnl_unlock();
3847 if (err) {
3848 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3849 return err;
3850 }
3851
3852 if (netif_running(netdev)) {
3853 err = ixgbevf_open(netdev);
3854 if (err)
3855 return err;
3856 }
3857
3858 netif_device_attach(netdev);
3859
3860 return err;
3861}
3862
3863#endif
3864static void ixgbevf_shutdown(struct pci_dev *pdev)
3865{
3866 ixgbevf_suspend(pdev, PMSG_SUSPEND);
3867}
3868
3869static void ixgbevf_get_stats(struct net_device *netdev,
3870 struct rtnl_link_stats64 *stats)
3871{
3872 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3873 unsigned int start;
3874 u64 bytes, packets;
3875 const struct ixgbevf_ring *ring;
3876 int i;
3877
3878 ixgbevf_update_stats(adapter);
3879
3880 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3881
3882 for (i = 0; i < adapter->num_rx_queues; i++) {
3883 ring = adapter->rx_ring[i];
3884 do {
3885 start = u64_stats_fetch_begin_irq(&ring->syncp);
3886 bytes = ring->stats.bytes;
3887 packets = ring->stats.packets;
3888 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
3889 stats->rx_bytes += bytes;
3890 stats->rx_packets += packets;
3891 }
3892
3893 for (i = 0; i < adapter->num_tx_queues; i++) {
3894 ring = adapter->tx_ring[i];
3895 do {
3896 start = u64_stats_fetch_begin_irq(&ring->syncp);
3897 bytes = ring->stats.bytes;
3898 packets = ring->stats.packets;
3899 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
3900 stats->tx_bytes += bytes;
3901 stats->tx_packets += packets;
3902 }
3903}
3904
3905#define IXGBEVF_MAX_MAC_HDR_LEN 127
3906#define IXGBEVF_MAX_NETWORK_HDR_LEN 511
3907
3908static netdev_features_t
3909ixgbevf_features_check(struct sk_buff *skb, struct net_device *dev,
3910 netdev_features_t features)
3911{
3912 unsigned int network_hdr_len, mac_hdr_len;
3913
3914
3915 mac_hdr_len = skb_network_header(skb) - skb->data;
3916 if (unlikely(mac_hdr_len > IXGBEVF_MAX_MAC_HDR_LEN))
3917 return features & ~(NETIF_F_HW_CSUM |
3918 NETIF_F_SCTP_CRC |
3919 NETIF_F_HW_VLAN_CTAG_TX |
3920 NETIF_F_TSO |
3921 NETIF_F_TSO6);
3922
3923 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
3924 if (unlikely(network_hdr_len > IXGBEVF_MAX_NETWORK_HDR_LEN))
3925 return features & ~(NETIF_F_HW_CSUM |
3926 NETIF_F_SCTP_CRC |
3927 NETIF_F_TSO |
3928 NETIF_F_TSO6);
3929
3930
3931
3932
3933 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
3934 features &= ~NETIF_F_TSO;
3935
3936 return features;
3937}
3938
3939static const struct net_device_ops ixgbevf_netdev_ops = {
3940 .ndo_size = sizeof(struct net_device_ops),
3941 .ndo_open = ixgbevf_open,
3942 .ndo_stop = ixgbevf_close,
3943 .ndo_start_xmit = ixgbevf_xmit_frame,
3944 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
3945 .ndo_get_stats64 = ixgbevf_get_stats,
3946 .ndo_validate_addr = eth_validate_addr,
3947 .ndo_set_mac_address = ixgbevf_set_mac,
3948 .extended.ndo_change_mtu = ixgbevf_change_mtu,
3949 .ndo_tx_timeout = ixgbevf_tx_timeout,
3950 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3951 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
3952#ifdef CONFIG_NET_POLL_CONTROLLER
3953 .ndo_poll_controller = ixgbevf_netpoll,
3954#endif
3955 .ndo_features_check = ixgbevf_features_check,
3956};
3957
3958static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3959{
3960 dev->netdev_ops = &ixgbevf_netdev_ops;
3961 ixgbevf_set_ethtool_ops(dev);
3962 dev->watchdog_timeo = 5 * HZ;
3963}
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974
3975
3976static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3977{
3978 struct net_device *netdev;
3979 struct ixgbevf_adapter *adapter = NULL;
3980 struct ixgbe_hw *hw = NULL;
3981 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3982 int err, pci_using_dac;
3983 bool disable_dev = false;
3984
3985 err = pci_enable_device(pdev);
3986 if (err)
3987 return err;
3988
3989 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
3990 pci_using_dac = 1;
3991 } else {
3992 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3993 if (err) {
3994 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
3995 goto err_dma;
3996 }
3997 pci_using_dac = 0;
3998 }
3999
4000 err = pci_request_regions(pdev, ixgbevf_driver_name);
4001 if (err) {
4002 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4003 goto err_pci_reg;
4004 }
4005
4006 pci_set_master(pdev);
4007
4008 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
4009 MAX_TX_QUEUES);
4010 if (!netdev) {
4011 err = -ENOMEM;
4012 goto err_alloc_etherdev;
4013 }
4014
4015 SET_NETDEV_DEV(netdev, &pdev->dev);
4016
4017 adapter = netdev_priv(netdev);
4018
4019 adapter->netdev = netdev;
4020 adapter->pdev = pdev;
4021 hw = &adapter->hw;
4022 hw->back = adapter;
4023 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
4024
4025
4026
4027
4028 pci_save_state(pdev);
4029
4030 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4031 pci_resource_len(pdev, 0));
4032 adapter->io_addr = hw->hw_addr;
4033 if (!hw->hw_addr) {
4034 err = -EIO;
4035 goto err_ioremap;
4036 }
4037
4038 ixgbevf_assign_netdev_ops(netdev);
4039
4040
4041 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4042 hw->mac.type = ii->mac;
4043
4044 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
4045 sizeof(struct ixgbe_mbx_operations));
4046
4047
4048 err = ixgbevf_sw_init(adapter);
4049 if (err)
4050 goto err_sw_init;
4051
4052
4053 if (!is_valid_ether_addr(netdev->dev_addr)) {
4054 pr_err("invalid MAC address\n");
4055 err = -EIO;
4056 goto err_sw_init;
4057 }
4058
4059 netdev->hw_features = NETIF_F_SG |
4060 NETIF_F_TSO |
4061 NETIF_F_TSO6 |
4062 NETIF_F_RXCSUM |
4063 NETIF_F_HW_CSUM |
4064 NETIF_F_SCTP_CRC;
4065
4066#define IXGBEVF_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
4067 NETIF_F_GSO_GRE_CSUM | \
4068 NETIF_F_GSO_IPIP | \
4069 NETIF_F_GSO_SIT | \
4070 NETIF_F_GSO_UDP_TUNNEL | \
4071 NETIF_F_GSO_UDP_TUNNEL_CSUM)
4072
4073 netdev->gso_partial_features = IXGBEVF_GSO_PARTIAL_FEATURES;
4074 netdev->hw_features |= NETIF_F_GSO_PARTIAL |
4075 IXGBEVF_GSO_PARTIAL_FEATURES;
4076
4077 netdev->features = netdev->hw_features;
4078
4079 if (pci_using_dac)
4080 netdev->features |= NETIF_F_HIGHDMA;
4081
4082 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
4083 netdev->mpls_features |= NETIF_F_SG |
4084 NETIF_F_TSO |
4085 NETIF_F_TSO6 |
4086 NETIF_F_HW_CSUM;
4087 netdev->mpls_features |= IXGBEVF_GSO_PARTIAL_FEATURES;
4088 netdev->hw_enc_features |= netdev->vlan_features;
4089
4090
4091 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
4092 NETIF_F_HW_VLAN_CTAG_RX |
4093 NETIF_F_HW_VLAN_CTAG_TX;
4094
4095 netdev->priv_flags |= IFF_UNICAST_FLT;
4096
4097
4098 netdev->extended->min_mtu = ETH_MIN_MTU;
4099 switch (adapter->hw.api_version) {
4100 case ixgbe_mbox_api_11:
4101 case ixgbe_mbox_api_12:
4102 case ixgbe_mbox_api_13:
4103 netdev->extended->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4104 (ETH_HLEN + ETH_FCS_LEN);
4105 break;
4106 default:
4107 if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
4108 netdev->extended->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4109 (ETH_HLEN + ETH_FCS_LEN);
4110 else
4111 netdev->extended->max_mtu = ETH_DATA_LEN + ETH_FCS_LEN;
4112 break;
4113 }
4114
4115 if (IXGBE_REMOVED(hw->hw_addr)) {
4116 err = -EIO;
4117 goto err_sw_init;
4118 }
4119
4120 setup_timer(&adapter->service_timer, &ixgbevf_service_timer,
4121 (unsigned long)adapter);
4122
4123 INIT_WORK(&adapter->service_task, ixgbevf_service_task);
4124 set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
4125 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
4126
4127 err = ixgbevf_init_interrupt_scheme(adapter);
4128 if (err)
4129 goto err_sw_init;
4130
4131 strcpy(netdev->name, "eth%d");
4132
4133 err = register_netdev(netdev);
4134 if (err)
4135 goto err_register;
4136
4137 pci_set_drvdata(pdev, netdev);
4138 netif_carrier_off(netdev);
4139
4140 ixgbevf_init_last_counter_stats(adapter);
4141
4142
4143 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
4144 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
4145
4146 switch (hw->mac.type) {
4147 case ixgbe_mac_X550_vf:
4148 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
4149 break;
4150 case ixgbe_mac_X540_vf:
4151 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
4152 break;
4153 case ixgbe_mac_82599_vf:
4154 default:
4155 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
4156 break;
4157 }
4158
4159 return 0;
4160
4161err_register:
4162 ixgbevf_clear_interrupt_scheme(adapter);
4163err_sw_init:
4164 ixgbevf_reset_interrupt_capability(adapter);
4165 iounmap(adapter->io_addr);
4166 kfree(adapter->rss_key);
4167err_ioremap:
4168 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
4169 free_netdev(netdev);
4170err_alloc_etherdev:
4171 pci_release_regions(pdev);
4172err_pci_reg:
4173err_dma:
4174 if (!adapter || disable_dev)
4175 pci_disable_device(pdev);
4176 return err;
4177}
4178
4179
4180
4181
4182
4183
4184
4185
4186
4187
4188static void ixgbevf_remove(struct pci_dev *pdev)
4189{
4190 struct net_device *netdev = pci_get_drvdata(pdev);
4191 struct ixgbevf_adapter *adapter;
4192 bool disable_dev;
4193
4194 if (!netdev)
4195 return;
4196
4197 adapter = netdev_priv(netdev);
4198
4199 set_bit(__IXGBEVF_REMOVING, &adapter->state);
4200 cancel_work_sync(&adapter->service_task);
4201
4202 if (netdev->reg_state == NETREG_REGISTERED)
4203 unregister_netdev(netdev);
4204
4205 ixgbevf_clear_interrupt_scheme(adapter);
4206 ixgbevf_reset_interrupt_capability(adapter);
4207
4208 iounmap(adapter->io_addr);
4209 pci_release_regions(pdev);
4210
4211 hw_dbg(&adapter->hw, "Remove complete\n");
4212
4213 kfree(adapter->rss_key);
4214 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
4215 free_netdev(netdev);
4216
4217 if (disable_dev)
4218 pci_disable_device(pdev);
4219}
4220
4221
4222
4223
4224
4225
4226
4227
4228
4229static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
4230 pci_channel_state_t state)
4231{
4232 struct net_device *netdev = pci_get_drvdata(pdev);
4233 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4234
4235 if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
4236 return PCI_ERS_RESULT_DISCONNECT;
4237
4238 rtnl_lock();
4239 netif_device_detach(netdev);
4240
4241 if (state == pci_channel_io_perm_failure) {
4242 rtnl_unlock();
4243 return PCI_ERS_RESULT_DISCONNECT;
4244 }
4245
4246 if (netif_running(netdev))
4247 ixgbevf_close_suspend(adapter);
4248
4249 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4250 pci_disable_device(pdev);
4251 rtnl_unlock();
4252
4253
4254 return PCI_ERS_RESULT_NEED_RESET;
4255}
4256
4257
4258
4259
4260
4261
4262
4263
4264static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
4265{
4266 struct net_device *netdev = pci_get_drvdata(pdev);
4267 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4268
4269 if (pci_enable_device_mem(pdev)) {
4270 dev_err(&pdev->dev,
4271 "Cannot re-enable PCI device after reset.\n");
4272 return PCI_ERS_RESULT_DISCONNECT;
4273 }
4274
4275 adapter->hw.hw_addr = adapter->io_addr;
4276 smp_mb__before_clear_bit();
4277 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
4278 pci_set_master(pdev);
4279
4280 ixgbevf_reset(adapter);
4281
4282 return PCI_ERS_RESULT_RECOVERED;
4283}
4284
4285
4286
4287
4288
4289
4290
4291
4292
4293static void ixgbevf_io_resume(struct pci_dev *pdev)
4294{
4295 struct net_device *netdev = pci_get_drvdata(pdev);
4296
4297 rtnl_lock();
4298 if (netif_running(netdev))
4299 ixgbevf_open(netdev);
4300
4301 netif_device_attach(netdev);
4302 rtnl_unlock();
4303}
4304
4305
4306static const struct pci_error_handlers ixgbevf_err_handler = {
4307 .error_detected = ixgbevf_io_error_detected,
4308 .slot_reset = ixgbevf_io_slot_reset,
4309 .resume = ixgbevf_io_resume,
4310};
4311
4312static struct pci_driver ixgbevf_driver = {
4313 .name = ixgbevf_driver_name,
4314 .id_table = ixgbevf_pci_tbl,
4315 .probe = ixgbevf_probe,
4316 .remove = ixgbevf_remove,
4317#ifdef CONFIG_PM
4318
4319 .suspend = ixgbevf_suspend,
4320 .resume = ixgbevf_resume,
4321#endif
4322 .shutdown = ixgbevf_shutdown,
4323 .err_handler = &ixgbevf_err_handler
4324};
4325
4326
4327
4328
4329
4330
4331
4332static int __init ixgbevf_init_module(void)
4333{
4334 pr_info("%s - version %s\n", ixgbevf_driver_string,
4335 ixgbevf_driver_version);
4336
4337 pr_info("%s\n", ixgbevf_copyright);
4338 ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
4339 if (!ixgbevf_wq) {
4340 pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
4341 return -ENOMEM;
4342 }
4343
4344 return pci_register_driver(&ixgbevf_driver);
4345}
4346
4347module_init(ixgbevf_init_module);
4348
4349
4350
4351
4352
4353
4354
4355static void __exit ixgbevf_exit_module(void)
4356{
4357 pci_unregister_driver(&ixgbevf_driver);
4358 if (ixgbevf_wq) {
4359 destroy_workqueue(ixgbevf_wq);
4360 ixgbevf_wq = NULL;
4361 }
4362}
4363
4364#ifdef DEBUG
4365
4366
4367
4368
4369char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4370{
4371 struct ixgbevf_adapter *adapter = hw->back;
4372
4373 return adapter->netdev->name;
4374}
4375
4376#endif
4377module_exit(ixgbevf_exit_module);
4378
4379
4380