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9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/delay.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/kernel.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18#include <linux/list.h>
19#include <linux/module.h>
20
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23#include "meter.h"
24#include "ade7759.h"
25
26static int ade7759_spi_write_reg_8(struct device *dev,
27 u8 reg_address,
28 u8 val)
29{
30 int ret;
31 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
32 struct ade7759_state *st = iio_priv(indio_dev);
33
34 mutex_lock(&st->buf_lock);
35 st->tx[0] = ADE7759_WRITE_REG(reg_address);
36 st->tx[1] = val;
37
38 ret = spi_write(st->us, st->tx, 2);
39 mutex_unlock(&st->buf_lock);
40
41 return ret;
42}
43
44static int ade7759_spi_write_reg_16(struct device *dev,
45 u8 reg_address,
46 u16 value)
47{
48 int ret;
49 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
50 struct ade7759_state *st = iio_priv(indio_dev);
51
52 mutex_lock(&st->buf_lock);
53 st->tx[0] = ADE7759_WRITE_REG(reg_address);
54 st->tx[1] = (value >> 8) & 0xFF;
55 st->tx[2] = value & 0xFF;
56 ret = spi_write(st->us, st->tx, 3);
57 mutex_unlock(&st->buf_lock);
58
59 return ret;
60}
61
62static int ade7759_spi_read_reg_8(struct device *dev,
63 u8 reg_address,
64 u8 *val)
65{
66 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
67 struct ade7759_state *st = iio_priv(indio_dev);
68 int ret;
69
70 ret = spi_w8r8(st->us, ADE7759_READ_REG(reg_address));
71 if (ret < 0) {
72 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
73 reg_address);
74 return ret;
75 }
76 *val = ret;
77
78 return 0;
79}
80
81static int ade7759_spi_read_reg_16(struct device *dev,
82 u8 reg_address,
83 u16 *val)
84{
85 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
86 struct ade7759_state *st = iio_priv(indio_dev);
87 int ret;
88
89 ret = spi_w8r16(st->us, ADE7759_READ_REG(reg_address));
90 if (ret < 0) {
91 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
92 reg_address);
93 return ret;
94 }
95
96 *val = ret;
97 *val = be16_to_cpup(val);
98
99 return 0;
100}
101
102static int ade7759_spi_read_reg_40(struct device *dev,
103 u8 reg_address,
104 u64 *val)
105{
106 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
107 struct ade7759_state *st = iio_priv(indio_dev);
108 int ret;
109 struct spi_transfer xfers[] = {
110 {
111 .tx_buf = st->tx,
112 .rx_buf = st->rx,
113 .bits_per_word = 8,
114 .len = 6,
115 },
116 };
117
118 mutex_lock(&st->buf_lock);
119 st->tx[0] = ADE7759_READ_REG(reg_address);
120 memset(&st->tx[1], 0 , 5);
121
122 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
123 if (ret) {
124 dev_err(&st->us->dev, "problem when reading 40 bit register 0x%02X",
125 reg_address);
126 goto error_ret;
127 }
128 *val = ((u64)st->rx[1] << 32) | (st->rx[2] << 24) |
129 (st->rx[3] << 16) | (st->rx[4] << 8) | st->rx[5];
130
131error_ret:
132 mutex_unlock(&st->buf_lock);
133 return ret;
134}
135
136static ssize_t ade7759_read_8bit(struct device *dev,
137 struct device_attribute *attr,
138 char *buf)
139{
140 int ret;
141 u8 val = 0;
142 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
143
144 ret = ade7759_spi_read_reg_8(dev, this_attr->address, &val);
145 if (ret)
146 return ret;
147
148 return sprintf(buf, "%u\n", val);
149}
150
151static ssize_t ade7759_read_16bit(struct device *dev,
152 struct device_attribute *attr,
153 char *buf)
154{
155 int ret;
156 u16 val = 0;
157 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
158
159 ret = ade7759_spi_read_reg_16(dev, this_attr->address, &val);
160 if (ret)
161 return ret;
162
163 return sprintf(buf, "%u\n", val);
164}
165
166static ssize_t ade7759_read_40bit(struct device *dev,
167 struct device_attribute *attr,
168 char *buf)
169{
170 int ret;
171 u64 val = 0;
172 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
173
174 ret = ade7759_spi_read_reg_40(dev, this_attr->address, &val);
175 if (ret)
176 return ret;
177
178 return sprintf(buf, "%llu\n", val);
179}
180
181static ssize_t ade7759_write_8bit(struct device *dev,
182 struct device_attribute *attr,
183 const char *buf,
184 size_t len)
185{
186 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
187 int ret;
188 long val;
189
190 ret = strict_strtol(buf, 10, &val);
191 if (ret)
192 goto error_ret;
193 ret = ade7759_spi_write_reg_8(dev, this_attr->address, val);
194
195error_ret:
196 return ret ? ret : len;
197}
198
199static ssize_t ade7759_write_16bit(struct device *dev,
200 struct device_attribute *attr,
201 const char *buf,
202 size_t len)
203{
204 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
205 int ret;
206 long val;
207
208 ret = strict_strtol(buf, 10, &val);
209 if (ret)
210 goto error_ret;
211 ret = ade7759_spi_write_reg_16(dev, this_attr->address, val);
212
213error_ret:
214 return ret ? ret : len;
215}
216
217static int ade7759_reset(struct device *dev)
218{
219 int ret;
220 u16 val;
221 ade7759_spi_read_reg_16(dev,
222 ADE7759_MODE,
223 &val);
224 val |= 1 << 6;
225 ret = ade7759_spi_write_reg_16(dev,
226 ADE7759_MODE,
227 val);
228
229 return ret;
230}
231
232static ssize_t ade7759_write_reset(struct device *dev,
233 struct device_attribute *attr,
234 const char *buf, size_t len)
235{
236 if (len < 1)
237 return -1;
238 switch (buf[0]) {
239 case '1':
240 case 'y':
241 case 'Y':
242 return ade7759_reset(dev);
243 }
244 return -1;
245}
246
247static IIO_DEV_ATTR_AENERGY(ade7759_read_40bit, ADE7759_AENERGY);
248static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
249 ade7759_read_16bit,
250 ade7759_write_16bit,
251 ADE7759_CFDEN);
252static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
253 ade7759_read_8bit,
254 ade7759_write_8bit,
255 ADE7759_CFNUM);
256static IIO_DEV_ATTR_CHKSUM(ade7759_read_8bit, ADE7759_CHKSUM);
257static IIO_DEV_ATTR_PHCAL(S_IWUSR | S_IRUGO,
258 ade7759_read_16bit,
259 ade7759_write_16bit,
260 ADE7759_PHCAL);
261static IIO_DEV_ATTR_APOS(S_IWUSR | S_IRUGO,
262 ade7759_read_16bit,
263 ade7759_write_16bit,
264 ADE7759_APOS);
265static IIO_DEV_ATTR_SAGCYC(S_IWUSR | S_IRUGO,
266 ade7759_read_8bit,
267 ade7759_write_8bit,
268 ADE7759_SAGCYC);
269static IIO_DEV_ATTR_SAGLVL(S_IWUSR | S_IRUGO,
270 ade7759_read_8bit,
271 ade7759_write_8bit,
272 ADE7759_SAGLVL);
273static IIO_DEV_ATTR_LINECYC(S_IWUSR | S_IRUGO,
274 ade7759_read_8bit,
275 ade7759_write_8bit,
276 ADE7759_LINECYC);
277static IIO_DEV_ATTR_LENERGY(ade7759_read_40bit, ADE7759_LENERGY);
278static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR | S_IRUGO,
279 ade7759_read_8bit,
280 ade7759_write_8bit,
281 ADE7759_GAIN);
282static IIO_DEV_ATTR_ACTIVE_POWER_GAIN(S_IWUSR | S_IRUGO,
283 ade7759_read_16bit,
284 ade7759_write_16bit,
285 ADE7759_APGAIN);
286static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR | S_IRUGO,
287 ade7759_read_8bit,
288 ade7759_write_8bit,
289 ADE7759_CH1OS);
290static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR | S_IRUGO,
291 ade7759_read_8bit,
292 ade7759_write_8bit,
293 ADE7759_CH2OS);
294
295static int ade7759_set_irq(struct device *dev, bool enable)
296{
297 int ret;
298 u8 irqen;
299 ret = ade7759_spi_read_reg_8(dev, ADE7759_IRQEN, &irqen);
300 if (ret)
301 goto error_ret;
302
303 if (enable)
304 irqen |= 1 << 3;
305
306 else
307 irqen &= ~(1 << 3);
308
309 ret = ade7759_spi_write_reg_8(dev, ADE7759_IRQEN, irqen);
310
311error_ret:
312 return ret;
313}
314
315
316static int ade7759_stop_device(struct device *dev)
317{
318 u16 val;
319
320 ade7759_spi_read_reg_16(dev,
321 ADE7759_MODE,
322 &val);
323 val |= 1 << 4;
324
325 return ade7759_spi_write_reg_16(dev, ADE7759_MODE, val);
326}
327
328static int ade7759_initial_setup(struct iio_dev *indio_dev)
329{
330 int ret;
331 struct ade7759_state *st = iio_priv(indio_dev);
332 struct device *dev = &indio_dev->dev;
333
334
335 st->us->mode = SPI_MODE_3;
336 spi_setup(st->us);
337
338
339 ret = ade7759_set_irq(dev, false);
340 if (ret) {
341 dev_err(dev, "disable irq failed");
342 goto err_ret;
343 }
344
345 ade7759_reset(dev);
346 msleep(ADE7759_STARTUP_DELAY);
347
348err_ret:
349 return ret;
350}
351
352static ssize_t ade7759_read_frequency(struct device *dev,
353 struct device_attribute *attr,
354 char *buf)
355{
356 int ret;
357 u16 t;
358 int sps;
359 ret = ade7759_spi_read_reg_16(dev,
360 ADE7759_MODE,
361 &t);
362 if (ret)
363 return ret;
364
365 t = (t >> 3) & 0x3;
366 sps = 27900 / (1 + t);
367
368 return sprintf(buf, "%d\n", sps);
369}
370
371static ssize_t ade7759_write_frequency(struct device *dev,
372 struct device_attribute *attr,
373 const char *buf,
374 size_t len)
375{
376 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
377 struct ade7759_state *st = iio_priv(indio_dev);
378 unsigned long val;
379 int ret;
380 u16 reg, t;
381
382 ret = strict_strtol(buf, 10, &val);
383 if (ret)
384 return ret;
385 if (val == 0)
386 return -EINVAL;
387
388 mutex_lock(&indio_dev->mlock);
389
390 t = (27900 / val);
391 if (t > 0)
392 t--;
393
394 if (t > 1)
395 st->us->max_speed_hz = ADE7759_SPI_SLOW;
396 else
397 st->us->max_speed_hz = ADE7759_SPI_FAST;
398
399 ret = ade7759_spi_read_reg_16(dev, ADE7759_MODE, ®);
400 if (ret)
401 goto out;
402
403 reg &= ~(3 << 13);
404 reg |= t << 13;
405
406 ret = ade7759_spi_write_reg_16(dev, ADE7759_MODE, reg);
407
408out:
409 mutex_unlock(&indio_dev->mlock);
410
411 return ret ? ret : len;
412}
413static IIO_DEV_ATTR_TEMP_RAW(ade7759_read_8bit);
414static IIO_CONST_ATTR(in_temp_offset, "70 C");
415static IIO_CONST_ATTR(in_temp_scale, "1 C");
416
417static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
418 ade7759_read_frequency,
419 ade7759_write_frequency);
420
421static IIO_DEV_ATTR_RESET(ade7759_write_reset);
422
423static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");
424
425static struct attribute *ade7759_attributes[] = {
426 &iio_dev_attr_in_temp_raw.dev_attr.attr,
427 &iio_const_attr_in_temp_offset.dev_attr.attr,
428 &iio_const_attr_in_temp_scale.dev_attr.attr,
429 &iio_dev_attr_sampling_frequency.dev_attr.attr,
430 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
431 &iio_dev_attr_reset.dev_attr.attr,
432 &iio_dev_attr_phcal.dev_attr.attr,
433 &iio_dev_attr_cfden.dev_attr.attr,
434 &iio_dev_attr_aenergy.dev_attr.attr,
435 &iio_dev_attr_cfnum.dev_attr.attr,
436 &iio_dev_attr_apos.dev_attr.attr,
437 &iio_dev_attr_sagcyc.dev_attr.attr,
438 &iio_dev_attr_saglvl.dev_attr.attr,
439 &iio_dev_attr_linecyc.dev_attr.attr,
440 &iio_dev_attr_lenergy.dev_attr.attr,
441 &iio_dev_attr_chksum.dev_attr.attr,
442 &iio_dev_attr_pga_gain.dev_attr.attr,
443 &iio_dev_attr_active_power_gain.dev_attr.attr,
444 &iio_dev_attr_choff_1.dev_attr.attr,
445 &iio_dev_attr_choff_2.dev_attr.attr,
446 NULL,
447};
448
449static const struct attribute_group ade7759_attribute_group = {
450 .attrs = ade7759_attributes,
451};
452
453static const struct iio_info ade7759_info = {
454 .attrs = &ade7759_attribute_group,
455 .driver_module = THIS_MODULE,
456};
457
458static int ade7759_probe(struct spi_device *spi)
459{
460 int ret;
461 struct ade7759_state *st;
462 struct iio_dev *indio_dev;
463
464
465 indio_dev = iio_device_alloc(sizeof(*st));
466 if (indio_dev == NULL) {
467 ret = -ENOMEM;
468 goto error_ret;
469 }
470
471 spi_set_drvdata(spi, indio_dev);
472
473 st = iio_priv(indio_dev);
474 st->us = spi;
475 mutex_init(&st->buf_lock);
476 indio_dev->name = spi->dev.driver->name;
477 indio_dev->dev.parent = &spi->dev;
478 indio_dev->info = &ade7759_info;
479 indio_dev->modes = INDIO_DIRECT_MODE;
480
481
482 ret = ade7759_initial_setup(indio_dev);
483 if (ret)
484 goto error_free_dev;
485
486 ret = iio_device_register(indio_dev);
487 if (ret)
488 goto error_free_dev;
489
490 return 0;
491
492error_free_dev:
493 iio_device_free(indio_dev);
494error_ret:
495 return ret;
496}
497
498
499static int ade7759_remove(struct spi_device *spi)
500{
501 struct iio_dev *indio_dev = spi_get_drvdata(spi);
502
503 iio_device_unregister(indio_dev);
504 ade7759_stop_device(&indio_dev->dev);
505 iio_device_free(indio_dev);
506
507 return 0;
508}
509
510static struct spi_driver ade7759_driver = {
511 .driver = {
512 .name = "ade7759",
513 .owner = THIS_MODULE,
514 },
515 .probe = ade7759_probe,
516 .remove = ade7759_remove,
517};
518module_spi_driver(ade7759_driver);
519
520MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
521MODULE_DESCRIPTION("Analog Devices ADE7759 Active Energy Metering IC Driver");
522MODULE_LICENSE("GPL v2");
523MODULE_ALIAS("spi:ad7759");
524
