1/* 2 * Copyright (C) 2005 David Brownell 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 */ 18 19#ifndef __LINUX_SPI_H 20#define __LINUX_SPI_H 21 22#include <linux/device.h> 23#include <linux/mod_devicetable.h> 24#include <linux/slab.h> 25#include <linux/kthread.h> 26 27/* 28 * INTERFACES between SPI master-side drivers and SPI infrastructure. 29 * (There's no SPI slave support for Linux yet...) 30 */ 31extern struct bus_type spi_bus_type; 32 33/** 34 * struct spi_device - Master side proxy for an SPI slave device 35 * @dev: Driver model representation of the device. 36 * @master: SPI controller used with the device. 37 * @max_speed_hz: Maximum clock rate to be used with this chip 38 * (on this board); may be changed by the device's driver. 39 * The spi_transfer.speed_hz can override this for each transfer. 40 * @chip_select: Chipselect, distinguishing chips handled by @master. 41 * @mode: The spi mode defines how data is clocked out and in. 42 * This may be changed by the device's driver. 43 * The "active low" default for chipselect mode can be overridden 44 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for 45 * each word in a transfer (by specifying SPI_LSB_FIRST). 46 * @bits_per_word: Data transfers involve one or more words; word sizes 47 * like eight or 12 bits are common. In-memory wordsizes are 48 * powers of two bytes (e.g. 20 bit samples use 32 bits). 49 * This may be changed by the device's driver, or left at the 50 * default (0) indicating protocol words are eight bit bytes. 51 * The spi_transfer.bits_per_word can override this for each transfer. 52 * @irq: Negative, or the number passed to request_irq() to receive 53 * interrupts from this device. 54 * @controller_state: Controller's runtime state 55 * @controller_data: Board-specific definitions for controller, such as 56 * FIFO initialization parameters; from board_info.controller_data 57 * @modalias: Name of the driver to use with this device, or an alias 58 * for that name. This appears in the sysfs "modalias" attribute 59 * for driver coldplugging, and in uevents used for hotplugging 60 * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when 61 * when not using a GPIO line) 62 * 63 * A @spi_device is used to interchange data between an SPI slave 64 * (usually a discrete chip) and CPU memory. 65 * 66 * In @dev, the platform_data is used to hold information about this 67 * device that's meaningful to the device's protocol driver, but not 68 * to its controller. One example might be an identifier for a chip 69 * variant with slightly different functionality; another might be 70 * information about how this particular board wires the chip's pins. 71 */ 72struct spi_device { 73 struct device dev; 74 struct spi_master *master; 75 u32 max_speed_hz; 76 u8 chip_select; 77 u8 mode; 78#define SPI_CPHA 0x01 /* clock phase */ 79#define SPI_CPOL 0x02 /* clock polarity */ 80#define SPI_MODE_0 (0|0) /* (original MicroWire) */ 81#define SPI_MODE_1 (0|SPI_CPHA) 82#define SPI_MODE_2 (SPI_CPOL|0) 83#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) 84#define SPI_CS_HIGH 0x04 /* chipselect active high? */ 85#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ 86#define SPI_3WIRE 0x10 /* SI/SO signals shared */ 87#define SPI_LOOP 0x20 /* loopback mode */ 88#define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */ 89#define SPI_READY 0x80 /* slave pulls low to pause */ 90 u8 bits_per_word; 91 int irq; 92 void *controller_state; 93 void *controller_data; 94 char modalias[SPI_NAME_SIZE]; 95 int cs_gpio; /* chip select gpio */ 96 97 /* 98 * likely need more hooks for more protocol options affecting how 99 * the controller talks to each chip, like: 100 * - memory packing (12 bit samples into low bits, others zeroed) 101 * - priority 102 * - drop chipselect after each word 103 * - chipselect delays 104 * - ... 105 */ 106}; 107 108static inline struct spi_device *to_spi_device(struct device *dev) 109{ 110 return dev ? container_of(dev, struct spi_device, dev) : NULL; 111} 112 113/* most drivers won't need to care about device refcounting */ 114static inline struct spi_device *spi_dev_get(struct spi_device *spi) 115{ 116 return (spi && get_device(&spi->dev)) ? spi : NULL; 117} 118 119static inline void spi_dev_put(struct spi_device *spi) 120{ 121 if (spi) 122 put_device(&spi->dev); 123} 124 125/* ctldata is for the bus_master driver's runtime state */ 126static inline void *spi_get_ctldata(struct spi_device *spi) 127{ 128 return spi->controller_state; 129} 130 131static inline void spi_set_ctldata(struct spi_device *spi, void *state) 132{ 133 spi->controller_state = state; 134} 135 136/* device driver data */ 137 138static inline void spi_set_drvdata(struct spi_device *spi, void *data) 139{ 140 dev_set_drvdata(&spi->dev, data); 141} 142 143static inline void *spi_get_drvdata(struct spi_device *spi) 144{ 145 return dev_get_drvdata(&spi->dev); 146} 147 148struct spi_message; 149 150 151 152/** 153 * struct spi_driver - Host side "protocol" driver 154 * @id_table: List of SPI devices supported by this driver 155 * @probe: Binds this driver to the spi device. Drivers can verify 156 * that the device is actually present, and may need to configure 157 * characteristics (such as bits_per_word) which weren't needed for 158 * the initial configuration done during system setup. 159 * @remove: Unbinds this driver from the spi device 160 * @shutdown: Standard shutdown callback used during system state 161 * transitions such as powerdown/halt and kexec 162 * @suspend: Standard suspend callback used during system state transitions 163 * @resume: Standard resume callback used during system state transitions 164 * @driver: SPI device drivers should initialize the name and owner 165 * field of this structure. 166 * 167 * This represents the kind of device driver that uses SPI messages to 168 * interact with the hardware at the other end of a SPI link. It's called 169 * a "protocol" driver because it works through messages rather than talking 170 * directly to SPI hardware (which is what the underlying SPI controller 171 * driver does to pass those messages). These protocols are defined in the 172 * specification for the device(s) supported by the driver. 173 * 174 * As a rule, those device protocols represent the lowest level interface 175 * supported by a driver, and it will support upper level interfaces too. 176 * Examples of such upper levels include frameworks like MTD, networking, 177 * MMC, RTC, filesystem character device nodes, and hardware monitoring. 178 */ 179struct spi_driver { 180 const struct spi_device_id *id_table; 181 int (*probe)(struct spi_device *spi); 182 int (*remove)(struct spi_device *spi); 183 void (*shutdown)(struct spi_device *spi); 184 int (*suspend)(struct spi_device *spi, pm_message_t mesg); 185 int (*resume)(struct spi_device *spi); 186 struct device_driver driver; 187}; 188 189static inline struct spi_driver *to_spi_driver(struct device_driver *drv) 190{ 191 return drv ? container_of(drv, struct spi_driver, driver) : NULL; 192} 193 194extern int spi_register_driver(struct spi_driver *sdrv); 195 196/** 197 * spi_unregister_driver - reverse effect of spi_register_driver 198 * @sdrv: the driver to unregister 199 * Context: can sleep 200 */ 201static inline void spi_unregister_driver(struct spi_driver *sdrv) 202{ 203 if (sdrv) 204 driver_unregister(&sdrv->driver); 205} 206 207/** 208 * module_spi_driver() - Helper macro for registering a SPI driver 209 * @__spi_driver: spi_driver struct 210 * 211 * Helper macro for SPI drivers which do not do anything special in module 212 * init/exit. This eliminates a lot of boilerplate. Each module may only 213 * use this macro once, and calling it replaces module_init() and module_exit() 214 */ 215#define module_spi_driver(__spi_driver) \ 216 module_driver(__spi_driver, spi_register_driver, \ 217 spi_unregister_driver) 218 219/** 220 * struct spi_master - interface to SPI master controller 221 * @dev: device interface to this driver 222 * @list: link with the global spi_master list 223 * @bus_num: board-specific (and often SOC-specific) identifier for a 224 * given SPI controller. 225 * @num_chipselect: chipselects are used to distinguish individual 226 * SPI slaves, and are numbered from zero to num_chipselects. 227 * each slave has a chipselect signal, but it's common that not 228 * every chipselect is connected to a slave. 229 * @dma_alignment: SPI controller constraint on DMA buffers alignment. 230 * @mode_bits: flags understood by this controller driver 231 * @bits_per_word_mask: A mask indicating which values of bits_per_word are 232 * supported by the driver. Bit n indicates that a bits_per_word n+1 is 233 * suported. If set, the SPI core will reject any transfer with an 234 * unsupported bits_per_word. If not set, this value is simply ignored, 235 * and it's up to the individual driver to perform any validation. 236 * @flags: other constraints relevant to this driver 237 * @bus_lock_spinlock: spinlock for SPI bus locking 238 * @bus_lock_mutex: mutex for SPI bus locking 239 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use 240 * @setup: updates the device mode and clocking records used by a 241 * device's SPI controller; protocol code may call this. This 242 * must fail if an unrecognized or unsupported mode is requested. 243 * It's always safe to call this unless transfers are pending on 244 * the device whose settings are being modified. 245 * @transfer: adds a message to the controller's transfer queue. 246 * @cleanup: frees controller-specific state 247 * @queued: whether this master is providing an internal message queue 248 * @kworker: thread struct for message pump 249 * @kworker_task: pointer to task for message pump kworker thread 250 * @pump_messages: work struct for scheduling work to the message pump 251 * @queue_lock: spinlock to syncronise access to message queue 252 * @queue: message queue 253 * @cur_msg: the currently in-flight message 254 * @busy: message pump is busy 255 * @running: message pump is running 256 * @rt: whether this queue is set to run as a realtime task 257 * @prepare_transfer_hardware: a message will soon arrive from the queue 258 * so the subsystem requests the driver to prepare the transfer hardware 259 * by issuing this call 260 * @transfer_one_message: the subsystem calls the driver to transfer a single 261 * message while queuing transfers that arrive in the meantime. When the 262 * driver is finished with this message, it must call 263 * spi_finalize_current_message() so the subsystem can issue the next 264 * transfer 265 * @unprepare_transfer_hardware: there are currently no more messages on the 266 * queue so the subsystem notifies the driver that it may relax the 267 * hardware by issuing this call 268 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS 269 * number. Any individual value may be -ENOENT for CS lines that 270 * are not GPIOs (driven by the SPI controller itself). 271 * 272 * Each SPI master controller can communicate with one or more @spi_device 273 * children. These make a small bus, sharing MOSI, MISO and SCK signals 274 * but not chip select signals. Each device may be configured to use a 275 * different clock rate, since those shared signals are ignored unless 276 * the chip is selected. 277 * 278 * The driver for an SPI controller manages access to those devices through 279 * a queue of spi_message transactions, copying data between CPU memory and 280 * an SPI slave device. For each such message it queues, it calls the 281 * message's completion function when the transaction completes. 282 */ 283struct spi_master { 284 struct device dev; 285 286 struct list_head list; 287 288 /* other than negative (== assign one dynamically), bus_num is fully 289 * board-specific. usually that simplifies to being SOC-specific. 290 * example: one SOC has three SPI controllers, numbered 0..2, 291 * and one board's schematics might show it using SPI-2. software 292 * would normally use bus_num=2 for that controller. 293 */ 294 s16 bus_num; 295 296 /* chipselects will be integral to many controllers; some others 297 * might use board-specific GPIOs. 298 */ 299 u16 num_chipselect; 300 301 /* some SPI controllers pose alignment requirements on DMAable 302 * buffers; let protocol drivers know about these requirements. 303 */ 304 u16 dma_alignment; 305 306 /* spi_device.mode flags understood by this controller driver */ 307 u16 mode_bits; 308 309 /* bitmask of supported bits_per_word for transfers */ 310 u32 bits_per_word_mask; 311 312 /* other constraints relevant to this driver */ 313 u16 flags; 314#define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */ 315#define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */ 316#define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */ 317 318 /* lock and mutex for SPI bus locking */ 319 spinlock_t bus_lock_spinlock; 320 struct mutex bus_lock_mutex; 321 322 /* flag indicating that the SPI bus is locked for exclusive use */ 323 bool bus_lock_flag; 324 325 /* Setup mode and clock, etc (spi driver may call many times). 326 * 327 * IMPORTANT: this may be called when transfers to another 328 * device are active. DO NOT UPDATE SHARED REGISTERS in ways 329 * which could break those transfers. 330 */ 331 int (*setup)(struct spi_device *spi); 332 333 /* bidirectional bulk transfers 334 * 335 * + The transfer() method may not sleep; its main role is 336 * just to add the message to the queue. 337 * + For now there's no remove-from-queue operation, or 338 * any other request management 339 * + To a given spi_device, message queueing is pure fifo 340 * 341 * + The master's main job is to process its message queue, 342 * selecting a chip then transferring data 343 * + If there are multiple spi_device children, the i/o queue 344 * arbitration algorithm is unspecified (round robin, fifo, 345 * priority, reservations, preemption, etc) 346 * 347 * + Chipselect stays active during the entire message 348 * (unless modified by spi_transfer.cs_change != 0). 349 * + The message transfers use clock and SPI mode parameters 350 * previously established by setup() for this device 351 */ 352 int (*transfer)(struct spi_device *spi, 353 struct spi_message *mesg); 354 355 /* called on release() to free memory provided by spi_master */ 356 void (*cleanup)(struct spi_device *spi); 357 358 /* 359 * These hooks are for drivers that want to use the generic 360 * master transfer queueing mechanism. If these are used, the 361 * transfer() function above must NOT be specified by the driver. 362 * Over time we expect SPI drivers to be phased over to this API. 363 */ 364 bool queued; 365 struct kthread_worker kworker; 366 struct task_struct *kworker_task; 367 struct kthread_work pump_messages; 368 spinlock_t queue_lock; 369 struct list_head queue; 370 struct spi_message *cur_msg; 371 bool busy; 372 bool running; 373 bool rt; 374 375 int (*prepare_transfer_hardware)(struct spi_master *master); 376 int (*transfer_one_message)(struct spi_master *master, 377 struct spi_message *mesg); 378 int (*unprepare_transfer_hardware)(struct spi_master *master); 379 /* gpio chip select */ 380 int *cs_gpios; 381}; 382 383static inline void *spi_master_get_devdata(struct spi_master *master) 384{ 385 return dev_get_drvdata(&master->dev); 386} 387 388static inline void spi_master_set_devdata(struct spi_master *master, void *data) 389{ 390 dev_set_drvdata(&master->dev, data); 391} 392 393static inline struct spi_master *spi_master_get(struct spi_master *master) 394{ 395 if (!master || !get_device(&master->dev)) 396 return NULL; 397 return master; 398} 399 400static inline void spi_master_put(struct spi_master *master) 401{ 402 if (master) 403 put_device(&master->dev); 404} 405 406/* PM calls that need to be issued by the driver */ 407extern int spi_master_suspend(struct spi_master *master); 408extern int spi_master_resume(struct spi_master *master); 409 410/* Calls the driver make to interact with the message queue */ 411extern struct spi_message *spi_get_next_queued_message(struct spi_master *master); 412extern void spi_finalize_current_message(struct spi_master *master); 413 414/* the spi driver core manages memory for the spi_master classdev */ 415extern struct spi_master * 416spi_alloc_master(struct device *host, unsigned size); 417 418extern int spi_register_master(struct spi_master *master); 419extern void spi_unregister_master(struct spi_master *master); 420 421extern struct spi_master *spi_busnum_to_master(u16 busnum); 422 423/*---------------------------------------------------------------------------*/ 424 425/* 426 * I/O INTERFACE between SPI controller and protocol drivers 427 * 428 * Protocol drivers use a queue of spi_messages, each transferring data 429 * between the controller and memory buffers. 430 * 431 * The spi_messages themselves consist of a series of read+write transfer 432 * segments. Those segments always read the same number of bits as they 433 * write; but one or the other is easily ignored by passing a null buffer 434 * pointer. (This is unlike most types of I/O API, because SPI hardware 435 * is full duplex.) 436 * 437 * NOTE: Allocation of spi_transfer and spi_message memory is entirely 438 * up to the protocol driver, which guarantees the integrity of both (as 439 * well as the data buffers) for as long as the message is queued. 440 */ 441 442/** 443 * struct spi_transfer - a read/write buffer pair 444 * @tx_buf: data to be written (dma-safe memory), or NULL 445 * @rx_buf: data to be read (dma-safe memory), or NULL 446 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped 447 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped 448 * @len: size of rx and tx buffers (in bytes) 449 * @speed_hz: Select a speed other than the device default for this 450 * transfer. If 0 the default (from @spi_device) is used. 451 * @bits_per_word: select a bits_per_word other than the device default 452 * for this transfer. If 0 the default (from @spi_device) is used. 453 * @cs_change: affects chipselect after this transfer completes 454 * @delay_usecs: microseconds to delay after this transfer before 455 * (optionally) changing the chipselect status, then starting 456 * the next transfer or completing this @spi_message. 457 * @transfer_list: transfers are sequenced through @spi_message.transfers 458 * 459 * SPI transfers always write the same number of bytes as they read. 460 * Protocol drivers should always provide @rx_buf and/or @tx_buf. 461 * In some cases, they may also want to provide DMA addresses for 462 * the data being transferred; that may reduce overhead, when the 463 * underlying driver uses dma. 464 * 465 * If the transmit buffer is null, zeroes will be shifted out 466 * while filling @rx_buf. If the receive buffer is null, the data 467 * shifted in will be discarded. Only "len" bytes shift out (or in). 468 * It's an error to try to shift out a partial word. (For example, by 469 * shifting out three bytes with word size of sixteen or twenty bits; 470 * the former uses two bytes per word, the latter uses four bytes.) 471 * 472 * In-memory data values are always in native CPU byte order, translated 473 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So 474 * for example when bits_per_word is sixteen, buffers are 2N bytes long 475 * (@len = 2N) and hold N sixteen bit words in CPU byte order. 476 * 477 * When the word size of the SPI transfer is not a power-of-two multiple 478 * of eight bits, those in-memory words include extra bits. In-memory 479 * words are always seen by protocol drivers as right-justified, so the 480 * undefined (rx) or unused (tx) bits are always the most significant bits. 481 * 482 * All SPI transfers start with the relevant chipselect active. Normally 483 * it stays selected until after the last transfer in a message. Drivers 484 * can affect the chipselect signal using cs_change. 485 * 486 * (i) If the transfer isn't the last one in the message, this flag is 487 * used to make the chipselect briefly go inactive in the middle of the 488 * message. Toggling chipselect in this way may be needed to terminate 489 * a chip command, letting a single spi_message perform all of group of 490 * chip transactions together. 491 * 492 * (ii) When the transfer is the last one in the message, the chip may 493 * stay selected until the next transfer. On multi-device SPI busses 494 * with nothing blocking messages going to other devices, this is just 495 * a performance hint; starting a message to another device deselects 496 * this one. But in other cases, this can be used to ensure correctness. 497 * Some devices need protocol transactions to be built from a series of 498 * spi_message submissions, where the content of one message is determined 499 * by the results of previous messages and where the whole transaction 500 * ends when the chipselect goes intactive. 501 * 502 * The code that submits an spi_message (and its spi_transfers) 503 * to the lower layers is responsible for managing its memory. 504 * Zero-initialize every field you don't set up explicitly, to 505 * insulate against future API updates. After you submit a message 506 * and its transfers, ignore them until its completion callback. 507 */ 508struct spi_transfer { 509 /* it's ok if tx_buf == rx_buf (right?) 510 * for MicroWire, one buffer must be null 511 * buffers must work with dma_*map_single() calls, unless 512 * spi_message.is_dma_mapped reports a pre-existing mapping 513 */ 514 const void *tx_buf; 515 void *rx_buf; 516 unsigned len; 517 518 dma_addr_t tx_dma; 519 dma_addr_t rx_dma; 520 521 unsigned cs_change:1; 522 u8 bits_per_word; 523 u16 delay_usecs; 524 u32 speed_hz; 525 526 struct list_head transfer_list; 527}; 528 529/** 530 * struct spi_message - one multi-segment SPI transaction 531 * @transfers: list of transfer segments in this transaction 532 * @spi: SPI device to which the transaction is queued 533 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual 534 * addresses for each transfer buffer 535 * @complete: called to report transaction completions 536 * @context: the argument to complete() when it's called 537 * @actual_length: the total number of bytes that were transferred in all 538 * successful segments 539 * @status: zero for success, else negative errno 540 * @queue: for use by whichever driver currently owns the message 541 * @state: for use by whichever driver currently owns the message 542 * 543 * A @spi_message is used to execute an atomic sequence of data transfers, 544 * each represented by a struct spi_transfer. The sequence is "atomic" 545 * in the sense that no other spi_message may use that SPI bus until that 546 * sequence completes. On some systems, many such sequences can execute as 547 * as single programmed DMA transfer. On all systems, these messages are 548 * queued, and might complete after transactions to other devices. Messages 549 * sent to a given spi_device are alway executed in FIFO order. 550 * 551 * The code that submits an spi_message (and its spi_transfers) 552 * to the lower layers is responsible for managing its memory. 553 * Zero-initialize every field you don't set up explicitly, to 554 * insulate against future API updates. After you submit a message 555 * and its transfers, ignore them until its completion callback. 556 */ 557struct spi_message { 558 struct list_head transfers; 559 560 struct spi_device *spi; 561 562 unsigned is_dma_mapped:1; 563 564 /* REVISIT: we might want a flag affecting the behavior of the 565 * last transfer ... allowing things like "read 16 bit length L" 566 * immediately followed by "read L bytes". Basically imposing 567 * a specific message scheduling algorithm. 568 * 569 * Some controller drivers (message-at-a-time queue processing) 570 * could provide that as their default scheduling algorithm. But 571 * others (with multi-message pipelines) could need a flag to 572 * tell them about such special cases. 573 */ 574 575 /* completion is reported through a callback */ 576 void (*complete)(void *context); 577 void *context; 578 unsigned actual_length; 579 int status; 580 581 /* for optional use by whatever driver currently owns the 582 * spi_message ... between calls to spi_async and then later 583 * complete(), that's the spi_master controller driver. 584 */ 585 struct list_head queue; 586 void *state; 587}; 588 589static inline void spi_message_init(struct spi_message *m) 590{ 591 memset(m, 0, sizeof *m); 592 INIT_LIST_HEAD(&m->transfers); 593} 594 595static inline void 596spi_message_add_tail(struct spi_transfer *t, struct spi_message *m) 597{ 598 list_add_tail(&t->transfer_list, &m->transfers); 599} 600 601static inline void 602spi_transfer_del(struct spi_transfer *t) 603{ 604 list_del(&t->transfer_list); 605} 606 607/** 608 * spi_message_init_with_transfers - Initialize spi_message and append transfers 609 * @m: spi_message to be initialized 610 * @xfers: An array of spi transfers 611 * @num_xfers: Number of items in the xfer array 612 * 613 * This function initializes the given spi_message and adds each spi_transfer in 614 * the given array to the message. 615 */ 616static inline void 617spi_message_init_with_transfers(struct spi_message *m, 618struct spi_transfer *xfers, unsigned int num_xfers) 619{ 620 unsigned int i; 621 622 spi_message_init(m); 623 for (i = 0; i < num_xfers; ++i) 624 spi_message_add_tail(&xfers[i], m); 625} 626 627/* It's fine to embed message and transaction structures in other data 628 * structures so long as you don't free them while they're in use. 629 */ 630 631static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags) 632{ 633 struct spi_message *m; 634 635 m = kzalloc(sizeof(struct spi_message) 636 + ntrans * sizeof(struct spi_transfer), 637 flags); 638 if (m) { 639 unsigned i; 640 struct spi_transfer *t = (struct spi_transfer *)(m + 1); 641 642 INIT_LIST_HEAD(&m->transfers); 643 for (i = 0; i < ntrans; i++, t++) 644 spi_message_add_tail(t, m); 645 } 646 return m; 647} 648 649static inline void spi_message_free(struct spi_message *m) 650{ 651 kfree(m); 652} 653 654extern int spi_setup(struct spi_device *spi); 655extern int spi_async(struct spi_device *spi, struct spi_message *message); 656extern int spi_async_locked(struct spi_device *spi, 657 struct spi_message *message); 658 659/*---------------------------------------------------------------------------*/ 660 661/* All these synchronous SPI transfer routines are utilities layered 662 * over the core async transfer primitive. Here, "synchronous" means 663 * they will sleep uninterruptibly until the async transfer completes. 664 */ 665 666extern int spi_sync(struct spi_device *spi, struct spi_message *message); 667extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message); 668extern int spi_bus_lock(struct spi_master *master); 669extern int spi_bus_unlock(struct spi_master *master); 670 671/** 672 * spi_write - SPI synchronous write 673 * @spi: device to which data will be written 674 * @buf: data buffer 675 * @len: data buffer size 676 * Context: can sleep 677 * 678 * This writes the buffer and returns zero or a negative error code. 679 * Callable only from contexts that can sleep. 680 */ 681static inline int 682spi_write(struct spi_device *spi, const void *buf, size_t len) 683{ 684 struct spi_transfer t = { 685 .tx_buf = buf, 686 .len = len, 687 }; 688 struct spi_message m; 689 690 spi_message_init(&m); 691 spi_message_add_tail(&t, &m); 692 return spi_sync(spi, &m); 693} 694 695/** 696 * spi_read - SPI synchronous read 697 * @spi: device from which data will be read 698 * @buf: data buffer 699 * @len: data buffer size 700 * Context: can sleep 701 * 702 * This reads the buffer and returns zero or a negative error code. 703 * Callable only from contexts that can sleep. 704 */ 705static inline int 706spi_read(struct spi_device *spi, void *buf, size_t len) 707{ 708 struct spi_transfer t = { 709 .rx_buf = buf, 710 .len = len, 711 }; 712 struct spi_message m; 713 714 spi_message_init(&m); 715 spi_message_add_tail(&t, &m); 716 return spi_sync(spi, &m); 717} 718 719/** 720 * spi_sync_transfer - synchronous SPI data transfer 721 * @spi: device with which data will be exchanged 722 * @xfers: An array of spi_transfers 723 * @num_xfers: Number of items in the xfer array 724 * Context: can sleep 725 * 726 * Does a synchronous SPI data transfer of the given spi_transfer array. 727 * 728 * For more specific semantics see spi_sync(). 729 * 730 * It returns zero on success, else a negative error code. 731 */ 732static inline int 733spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers, 734 unsigned int num_xfers) 735{ 736 struct spi_message msg; 737 738 spi_message_init_with_transfers(&msg, xfers, num_xfers); 739 740 return spi_sync(spi, &msg); 741} 742 743/* this copies txbuf and rxbuf data; for small transfers only! */ 744extern int spi_write_then_read(struct spi_device *spi, 745 const void *txbuf, unsigned n_tx, 746 void *rxbuf, unsigned n_rx); 747 748/** 749 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read 750 * @spi: device with which data will be exchanged 751 * @cmd: command to be written before data is read back 752 * Context: can sleep 753 * 754 * This returns the (unsigned) eight bit number returned by the 755 * device, or else a negative error code. Callable only from 756 * contexts that can sleep. 757 */ 758static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) 759{ 760 ssize_t status; 761 u8 result; 762 763 status = spi_write_then_read(spi, &cmd, 1, &result, 1); 764 765 /* return negative errno or unsigned value */ 766 return (status < 0) ? status : result; 767} 768 769/** 770 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read 771 * @spi: device with which data will be exchanged 772 * @cmd: command to be written before data is read back 773 * Context: can sleep 774 * 775 * This returns the (unsigned) sixteen bit number returned by the 776 * device, or else a negative error code. Callable only from 777 * contexts that can sleep. 778 * 779 * The number is returned in wire-order, which is at least sometimes 780 * big-endian. 781 */ 782static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) 783{ 784 ssize_t status; 785 u16 result; 786 787 status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2); 788 789 /* return negative errno or unsigned value */ 790 return (status < 0) ? status : result; 791} 792 793/*---------------------------------------------------------------------------*/ 794 795/* 796 * INTERFACE between board init code and SPI infrastructure. 797 * 798 * No SPI driver ever sees these SPI device table segments, but 799 * it's how the SPI core (or adapters that get hotplugged) grows 800 * the driver model tree. 801 * 802 * As a rule, SPI devices can't be probed. Instead, board init code 803 * provides a table listing the devices which are present, with enough 804 * information to bind and set up the device's driver. There's basic 805 * support for nonstatic configurations too; enough to handle adding 806 * parport adapters, or microcontrollers acting as USB-to-SPI bridges. 807 */ 808 809/** 810 * struct spi_board_info - board-specific template for a SPI device 811 * @modalias: Initializes spi_device.modalias; identifies the driver. 812 * @platform_data: Initializes spi_device.platform_data; the particular 813 * data stored there is driver-specific. 814 * @controller_data: Initializes spi_device.controller_data; some 815 * controllers need hints about hardware setup, e.g. for DMA. 816 * @irq: Initializes spi_device.irq; depends on how the board is wired. 817 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits 818 * from the chip datasheet and board-specific signal quality issues. 819 * @bus_num: Identifies which spi_master parents the spi_device; unused 820 * by spi_new_device(), and otherwise depends on board wiring. 821 * @chip_select: Initializes spi_device.chip_select; depends on how 822 * the board is wired. 823 * @mode: Initializes spi_device.mode; based on the chip datasheet, board 824 * wiring (some devices support both 3WIRE and standard modes), and 825 * possibly presence of an inverter in the chipselect path. 826 * 827 * When adding new SPI devices to the device tree, these structures serve 828 * as a partial device template. They hold information which can't always 829 * be determined by drivers. Information that probe() can establish (such 830 * as the default transfer wordsize) is not included here. 831 * 832 * These structures are used in two places. Their primary role is to 833 * be stored in tables of board-specific device descriptors, which are 834 * declared early in board initialization and then used (much later) to 835 * populate a controller's device tree after the that controller's driver 836 * initializes. A secondary (and atypical) role is as a parameter to 837 * spi_new_device() call, which happens after those controller drivers 838 * are active in some dynamic board configuration models. 839 */ 840struct spi_board_info { 841 /* the device name and module name are coupled, like platform_bus; 842 * "modalias" is normally the driver name. 843 * 844 * platform_data goes to spi_device.dev.platform_data, 845 * controller_data goes to spi_device.controller_data, 846 * irq is copied too 847 */ 848 char modalias[SPI_NAME_SIZE]; 849 const void *platform_data; 850 void *controller_data; 851 int irq; 852 853 /* slower signaling on noisy or low voltage boards */ 854 u32 max_speed_hz; 855 856 857 /* bus_num is board specific and matches the bus_num of some 858 * spi_master that will probably be registered later. 859 * 860 * chip_select reflects how this chip is wired to that master; 861 * it's less than num_chipselect. 862 */ 863 u16 bus_num; 864 u16 chip_select; 865 866 /* mode becomes spi_device.mode, and is essential for chips 867 * where the default of SPI_CS_HIGH = 0 is wrong. 868 */ 869 u8 mode; 870 871 /* ... may need additional spi_device chip config data here. 872 * avoid stuff protocol drivers can set; but include stuff 873 * needed to behave without being bound to a driver: 874 * - quirks like clock rate mattering when not selected 875 */ 876}; 877 878#ifdef CONFIG_SPI 879extern int 880spi_register_board_info(struct spi_board_info const *info, unsigned n); 881#else 882/* board init code may ignore whether SPI is configured or not */ 883static inline int 884spi_register_board_info(struct spi_board_info const *info, unsigned n) 885 { return 0; } 886#endif 887 888 889/* If you're hotplugging an adapter with devices (parport, usb, etc) 890 * use spi_new_device() to describe each device. You can also call 891 * spi_unregister_device() to start making that device vanish, but 892 * normally that would be handled by spi_unregister_master(). 893 * 894 * You can also use spi_alloc_device() and spi_add_device() to use a two 895 * stage registration sequence for each spi_device. This gives the caller 896 * some more control over the spi_device structure before it is registered, 897 * but requires that caller to initialize fields that would otherwise 898 * be defined using the board info. 899 */ 900extern struct spi_device * 901spi_alloc_device(struct spi_master *master); 902 903extern int 904spi_add_device(struct spi_device *spi); 905 906extern struct spi_device * 907spi_new_device(struct spi_master *, struct spi_board_info *); 908 909static inline void 910spi_unregister_device(struct spi_device *spi) 911{ 912 if (spi) 913 device_unregister(&spi->dev); 914} 915 916extern const struct spi_device_id * 917spi_get_device_id(const struct spi_device *sdev); 918 919#endif /* __LINUX_SPI_H */ 920