linux/sound/pci/rme32.c
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   1/*
   2 *   ALSA driver for RME Digi32, Digi32/8 and Digi32 PRO audio interfaces
   3 *
   4 *      Copyright (c) 2002-2004 Martin Langer <martin-langer@gmx.de>,
   5 *                              Pilo Chambert <pilo.c@wanadoo.fr>
   6 *
   7 *      Thanks to :        Anders Torger <torger@ludd.luth.se>,
   8 *                         Henk Hesselink <henk@anda.nl>
   9 *                         for writing the digi96-driver 
  10 *                         and RME for all informations.
  11 *
  12 *   This program is free software; you can redistribute it and/or modify
  13 *   it under the terms of the GNU General Public License as published by
  14 *   the Free Software Foundation; either version 2 of the License, or
  15 *   (at your option) any later version.
  16 *
  17 *   This program is distributed in the hope that it will be useful,
  18 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 *   GNU General Public License for more details.
  21 *
  22 *   You should have received a copy of the GNU General Public License
  23 *   along with this program; if not, write to the Free Software
  24 *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25 * 
  26 * 
  27 * ****************************************************************************
  28 * 
  29 * Note #1 "Sek'd models" ................................... martin 2002-12-07
  30 * 
  31 * Identical soundcards by Sek'd were labeled:
  32 * RME Digi 32     = Sek'd Prodif 32
  33 * RME Digi 32 Pro = Sek'd Prodif 96
  34 * RME Digi 32/8   = Sek'd Prodif Gold
  35 * 
  36 * ****************************************************************************
  37 * 
  38 * Note #2 "full duplex mode" ............................... martin 2002-12-07
  39 * 
  40 * Full duplex doesn't work. All cards (32, 32/8, 32Pro) are working identical
  41 * in this mode. Rec data and play data are using the same buffer therefore. At
  42 * first you have got the playing bits in the buffer and then (after playing
  43 * them) they were overwitten by the captured sound of the CS8412/14. Both 
  44 * modes (play/record) are running harmonically hand in hand in the same buffer
  45 * and you have only one start bit plus one interrupt bit to control this 
  46 * paired action.
  47 * This is opposite to the latter rme96 where playing and capturing is totally
  48 * separated and so their full duplex mode is supported by alsa (using two 
  49 * start bits and two interrupts for two different buffers). 
  50 * But due to the wrong sequence of playing and capturing ALSA shows no solved
  51 * full duplex support for the rme32 at the moment. That's bad, but I'm not
  52 * able to solve it. Are you motivated enough to solve this problem now? Your
  53 * patch would be welcome!
  54 * 
  55 * ****************************************************************************
  56 *
  57 * "The story after the long seeking" -- tiwai
  58 *
  59 * Ok, the situation regarding the full duplex is now improved a bit.
  60 * In the fullduplex mode (given by the module parameter), the hardware buffer
  61 * is split to halves for read and write directions at the DMA pointer.
  62 * That is, the half above the current DMA pointer is used for write, and
  63 * the half below is used for read.  To mangle this strange behavior, an
  64 * software intermediate buffer is introduced.  This is, of course, not good
  65 * from the viewpoint of the data transfer efficiency.  However, this allows
  66 * you to use arbitrary buffer sizes, instead of the fixed I/O buffer size.
  67 *
  68 * ****************************************************************************
  69 */
  70
  71
  72#include <linux/delay.h>
  73#include <linux/gfp.h>
  74#include <linux/init.h>
  75#include <linux/interrupt.h>
  76#include <linux/pci.h>
  77#include <linux/module.h>
  78#include <linux/io.h>
  79
  80#include <sound/core.h>
  81#include <sound/info.h>
  82#include <sound/control.h>
  83#include <sound/pcm.h>
  84#include <sound/pcm_params.h>
  85#include <sound/pcm-indirect.h>
  86#include <sound/asoundef.h>
  87#include <sound/initval.h>
  88
  89static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  90static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  91static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
  92static bool fullduplex[SNDRV_CARDS]; // = {[0 ... (SNDRV_CARDS - 1)] = 1};
  93
  94module_param_array(index, int, NULL, 0444);
  95MODULE_PARM_DESC(index, "Index value for RME Digi32 soundcard.");
  96module_param_array(id, charp, NULL, 0444);
  97MODULE_PARM_DESC(id, "ID string for RME Digi32 soundcard.");
  98module_param_array(enable, bool, NULL, 0444);
  99MODULE_PARM_DESC(enable, "Enable RME Digi32 soundcard.");
 100module_param_array(fullduplex, bool, NULL, 0444);
 101MODULE_PARM_DESC(fullduplex, "Support full-duplex mode.");
 102MODULE_AUTHOR("Martin Langer <martin-langer@gmx.de>, Pilo Chambert <pilo.c@wanadoo.fr>");
 103MODULE_DESCRIPTION("RME Digi32, Digi32/8, Digi32 PRO");
 104MODULE_LICENSE("GPL");
 105MODULE_SUPPORTED_DEVICE("{{RME,Digi32}," "{RME,Digi32/8}," "{RME,Digi32 PRO}}");
 106
 107/* Defines for RME Digi32 series */
 108#define RME32_SPDIF_NCHANNELS 2
 109
 110/* Playback and capture buffer size */
 111#define RME32_BUFFER_SIZE 0x20000
 112
 113/* IO area size */
 114#define RME32_IO_SIZE 0x30000
 115
 116/* IO area offsets */
 117#define RME32_IO_DATA_BUFFER        0x0
 118#define RME32_IO_CONTROL_REGISTER   0x20000
 119#define RME32_IO_GET_POS            0x20000
 120#define RME32_IO_CONFIRM_ACTION_IRQ 0x20004
 121#define RME32_IO_RESET_POS          0x20100
 122
 123/* Write control register bits */
 124#define RME32_WCR_START     (1 << 0)    /* startbit */
 125#define RME32_WCR_MONO      (1 << 1)    /* 0=stereo, 1=mono
 126                                           Setting the whole card to mono
 127                                           doesn't seem to be very useful.
 128                                           A software-solution can handle 
 129                                           full-duplex with one direction in
 130                                           stereo and the other way in mono. 
 131                                           So, the hardware should work all 
 132                                           the time in stereo! */
 133#define RME32_WCR_MODE24    (1 << 2)    /* 0=16bit, 1=32bit */
 134#define RME32_WCR_SEL       (1 << 3)    /* 0=input on output, 1=normal playback/capture */
 135#define RME32_WCR_FREQ_0    (1 << 4)    /* frequency (play) */
 136#define RME32_WCR_FREQ_1    (1 << 5)
 137#define RME32_WCR_INP_0     (1 << 6)    /* input switch */
 138#define RME32_WCR_INP_1     (1 << 7)
 139#define RME32_WCR_RESET     (1 << 8)    /* Reset address */
 140#define RME32_WCR_MUTE      (1 << 9)    /* digital mute for output */
 141#define RME32_WCR_PRO       (1 << 10)   /* 1=professional, 0=consumer */
 142#define RME32_WCR_DS_BM     (1 << 11)   /* 1=DoubleSpeed (only PRO-Version); 1=BlockMode (only Adat-Version) */
 143#define RME32_WCR_ADAT      (1 << 12)   /* Adat Mode (only Adat-Version) */
 144#define RME32_WCR_AUTOSYNC  (1 << 13)   /* AutoSync */
 145#define RME32_WCR_PD        (1 << 14)   /* DAC Reset (only PRO-Version) */
 146#define RME32_WCR_EMP       (1 << 15)   /* 1=Emphasis on (only PRO-Version) */
 147
 148#define RME32_WCR_BITPOS_FREQ_0 4
 149#define RME32_WCR_BITPOS_FREQ_1 5
 150#define RME32_WCR_BITPOS_INP_0 6
 151#define RME32_WCR_BITPOS_INP_1 7
 152
 153/* Read control register bits */
 154#define RME32_RCR_AUDIO_ADDR_MASK 0x1ffff
 155#define RME32_RCR_LOCK      (1 << 23)   /* 1=locked, 0=not locked */
 156#define RME32_RCR_ERF       (1 << 26)   /* 1=Error, 0=no Error */
 157#define RME32_RCR_FREQ_0    (1 << 27)   /* CS841x frequency (record) */
 158#define RME32_RCR_FREQ_1    (1 << 28)
 159#define RME32_RCR_FREQ_2    (1 << 29)
 160#define RME32_RCR_KMODE     (1 << 30)   /* card mode: 1=PLL, 0=quartz */
 161#define RME32_RCR_IRQ       (1 << 31)   /* interrupt */
 162
 163#define RME32_RCR_BITPOS_F0 27
 164#define RME32_RCR_BITPOS_F1 28
 165#define RME32_RCR_BITPOS_F2 29
 166
 167/* Input types */
 168#define RME32_INPUT_OPTICAL 0
 169#define RME32_INPUT_COAXIAL 1
 170#define RME32_INPUT_INTERNAL 2
 171#define RME32_INPUT_XLR 3
 172
 173/* Clock modes */
 174#define RME32_CLOCKMODE_SLAVE 0
 175#define RME32_CLOCKMODE_MASTER_32 1
 176#define RME32_CLOCKMODE_MASTER_44 2
 177#define RME32_CLOCKMODE_MASTER_48 3
 178
 179/* Block sizes in bytes */
 180#define RME32_BLOCK_SIZE 8192
 181
 182/* Software intermediate buffer (max) size */
 183#define RME32_MID_BUFFER_SIZE (1024*1024)
 184
 185/* Hardware revisions */
 186#define RME32_32_REVISION 192
 187#define RME32_328_REVISION_OLD 100
 188#define RME32_328_REVISION_NEW 101
 189#define RME32_PRO_REVISION_WITH_8412 192
 190#define RME32_PRO_REVISION_WITH_8414 150
 191
 192
 193struct rme32 {
 194        spinlock_t lock;
 195        int irq;
 196        unsigned long port;
 197        void __iomem *iobase;
 198
 199        u32 wcreg;              /* cached write control register value */
 200        u32 wcreg_spdif;        /* S/PDIF setup */
 201        u32 wcreg_spdif_stream; /* S/PDIF setup (temporary) */
 202        u32 rcreg;              /* cached read control register value */
 203
 204        u8 rev;                 /* card revision number */
 205
 206        struct snd_pcm_substream *playback_substream;
 207        struct snd_pcm_substream *capture_substream;
 208
 209        int playback_frlog;     /* log2 of framesize */
 210        int capture_frlog;
 211
 212        size_t playback_periodsize;     /* in bytes, zero if not used */
 213        size_t capture_periodsize;      /* in bytes, zero if not used */
 214
 215        unsigned int fullduplex_mode;
 216        int running;
 217
 218        struct snd_pcm_indirect playback_pcm;
 219        struct snd_pcm_indirect capture_pcm;
 220
 221        struct snd_card *card;
 222        struct snd_pcm *spdif_pcm;
 223        struct snd_pcm *adat_pcm;
 224        struct pci_dev *pci;
 225        struct snd_kcontrol *spdif_ctl;
 226};
 227
 228static const struct pci_device_id snd_rme32_ids[] = {
 229        {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32), 0,},
 230        {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_8), 0,},
 231        {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_PRO), 0,},
 232        {0,}
 233};
 234
 235MODULE_DEVICE_TABLE(pci, snd_rme32_ids);
 236
 237#define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
 238#define RME32_PRO_WITH_8414(rme32) ((rme32)->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO && (rme32)->rev == RME32_PRO_REVISION_WITH_8414)
 239
 240static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream);
 241
 242static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream);
 243
 244static int snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd);
 245
 246static void snd_rme32_proc_init(struct rme32 * rme32);
 247
 248static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32);
 249
 250static inline unsigned int snd_rme32_pcm_byteptr(struct rme32 * rme32)
 251{
 252        return (readl(rme32->iobase + RME32_IO_GET_POS)
 253                & RME32_RCR_AUDIO_ADDR_MASK);
 254}
 255
 256/* silence callback for halfduplex mode */
 257static int snd_rme32_playback_silence(struct snd_pcm_substream *substream,
 258                                      int channel, unsigned long pos,
 259                                      unsigned long count)
 260{
 261        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 262
 263        memset_io(rme32->iobase + RME32_IO_DATA_BUFFER + pos, 0, count);
 264        return 0;
 265}
 266
 267/* copy callback for halfduplex mode */
 268static int snd_rme32_playback_copy(struct snd_pcm_substream *substream,
 269                                   int channel, unsigned long pos,
 270                                   void __user *src, unsigned long count)
 271{
 272        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 273
 274        if (copy_from_user_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 275                                src, count))
 276                return -EFAULT;
 277        return 0;
 278}
 279
 280static int snd_rme32_playback_copy_kernel(struct snd_pcm_substream *substream,
 281                                          int channel, unsigned long pos,
 282                                          void *src, unsigned long count)
 283{
 284        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 285
 286        memcpy_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos, src, count);
 287        return 0;
 288}
 289
 290/* copy callback for halfduplex mode */
 291static int snd_rme32_capture_copy(struct snd_pcm_substream *substream,
 292                                  int channel, unsigned long pos,
 293                                  void __user *dst, unsigned long count)
 294{
 295        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 296
 297        if (copy_to_user_fromio(dst,
 298                            rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 299                            count))
 300                return -EFAULT;
 301        return 0;
 302}
 303
 304static int snd_rme32_capture_copy_kernel(struct snd_pcm_substream *substream,
 305                                         int channel, unsigned long pos,
 306                                         void *dst, unsigned long count)
 307{
 308        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 309
 310        memcpy_fromio(dst, rme32->iobase + RME32_IO_DATA_BUFFER + pos, count);
 311        return 0;
 312}
 313
 314/*
 315 * SPDIF I/O capabilities (half-duplex mode)
 316 */
 317static const struct snd_pcm_hardware snd_rme32_spdif_info = {
 318        .info =         (SNDRV_PCM_INFO_MMAP_IOMEM |
 319                         SNDRV_PCM_INFO_MMAP_VALID |
 320                         SNDRV_PCM_INFO_INTERLEAVED | 
 321                         SNDRV_PCM_INFO_PAUSE |
 322                         SNDRV_PCM_INFO_SYNC_START),
 323        .formats =      (SNDRV_PCM_FMTBIT_S16_LE | 
 324                         SNDRV_PCM_FMTBIT_S32_LE),
 325        .rates =        (SNDRV_PCM_RATE_32000 |
 326                         SNDRV_PCM_RATE_44100 | 
 327                         SNDRV_PCM_RATE_48000),
 328        .rate_min =     32000,
 329        .rate_max =     48000,
 330        .channels_min = 2,
 331        .channels_max = 2,
 332        .buffer_bytes_max = RME32_BUFFER_SIZE,
 333        .period_bytes_min = RME32_BLOCK_SIZE,
 334        .period_bytes_max = RME32_BLOCK_SIZE,
 335        .periods_min =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 336        .periods_max =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 337        .fifo_size =    0,
 338};
 339
 340/*
 341 * ADAT I/O capabilities (half-duplex mode)
 342 */
 343static const struct snd_pcm_hardware snd_rme32_adat_info =
 344{
 345        .info =              (SNDRV_PCM_INFO_MMAP_IOMEM |
 346                              SNDRV_PCM_INFO_MMAP_VALID |
 347                              SNDRV_PCM_INFO_INTERLEAVED |
 348                              SNDRV_PCM_INFO_PAUSE |
 349                              SNDRV_PCM_INFO_SYNC_START),
 350        .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 351        .rates =             (SNDRV_PCM_RATE_44100 | 
 352                              SNDRV_PCM_RATE_48000),
 353        .rate_min =          44100,
 354        .rate_max =          48000,
 355        .channels_min =      8,
 356        .channels_max =      8,
 357        .buffer_bytes_max =  RME32_BUFFER_SIZE,
 358        .period_bytes_min =  RME32_BLOCK_SIZE,
 359        .period_bytes_max =  RME32_BLOCK_SIZE,
 360        .periods_min =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 361        .periods_max =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 362        .fifo_size =        0,
 363};
 364
 365/*
 366 * SPDIF I/O capabilities (full-duplex mode)
 367 */
 368static const struct snd_pcm_hardware snd_rme32_spdif_fd_info = {
 369        .info =         (SNDRV_PCM_INFO_MMAP |
 370                         SNDRV_PCM_INFO_MMAP_VALID |
 371                         SNDRV_PCM_INFO_INTERLEAVED | 
 372                         SNDRV_PCM_INFO_PAUSE |
 373                         SNDRV_PCM_INFO_SYNC_START),
 374        .formats =      (SNDRV_PCM_FMTBIT_S16_LE | 
 375                         SNDRV_PCM_FMTBIT_S32_LE),
 376        .rates =        (SNDRV_PCM_RATE_32000 |
 377                         SNDRV_PCM_RATE_44100 | 
 378                         SNDRV_PCM_RATE_48000),
 379        .rate_min =     32000,
 380        .rate_max =     48000,
 381        .channels_min = 2,
 382        .channels_max = 2,
 383        .buffer_bytes_max = RME32_MID_BUFFER_SIZE,
 384        .period_bytes_min = RME32_BLOCK_SIZE,
 385        .period_bytes_max = RME32_BLOCK_SIZE,
 386        .periods_min =  2,
 387        .periods_max =  RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 388        .fifo_size =    0,
 389};
 390
 391/*
 392 * ADAT I/O capabilities (full-duplex mode)
 393 */
 394static const struct snd_pcm_hardware snd_rme32_adat_fd_info =
 395{
 396        .info =              (SNDRV_PCM_INFO_MMAP |
 397                              SNDRV_PCM_INFO_MMAP_VALID |
 398                              SNDRV_PCM_INFO_INTERLEAVED |
 399                              SNDRV_PCM_INFO_PAUSE |
 400                              SNDRV_PCM_INFO_SYNC_START),
 401        .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 402        .rates =             (SNDRV_PCM_RATE_44100 | 
 403                              SNDRV_PCM_RATE_48000),
 404        .rate_min =          44100,
 405        .rate_max =          48000,
 406        .channels_min =      8,
 407        .channels_max =      8,
 408        .buffer_bytes_max =  RME32_MID_BUFFER_SIZE,
 409        .period_bytes_min =  RME32_BLOCK_SIZE,
 410        .period_bytes_max =  RME32_BLOCK_SIZE,
 411        .periods_min =      2,
 412        .periods_max =      RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 413        .fifo_size =        0,
 414};
 415
 416static void snd_rme32_reset_dac(struct rme32 *rme32)
 417{
 418        writel(rme32->wcreg | RME32_WCR_PD,
 419               rme32->iobase + RME32_IO_CONTROL_REGISTER);
 420        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 421}
 422
 423static int snd_rme32_playback_getrate(struct rme32 * rme32)
 424{
 425        int rate;
 426
 427        rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 428               (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 429        switch (rate) {
 430        case 1:
 431                rate = 32000;
 432                break;
 433        case 2:
 434                rate = 44100;
 435                break;
 436        case 3:
 437                rate = 48000;
 438                break;
 439        default:
 440                return -1;
 441        }
 442        return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
 443}
 444
 445static int snd_rme32_capture_getrate(struct rme32 * rme32, int *is_adat)
 446{
 447        int n;
 448
 449        *is_adat = 0;
 450        if (rme32->rcreg & RME32_RCR_LOCK) { 
 451                /* ADAT rate */
 452                *is_adat = 1;
 453        }
 454        if (rme32->rcreg & RME32_RCR_ERF) {
 455                return -1;
 456        }
 457
 458        /* S/PDIF rate */
 459        n = ((rme32->rcreg >> RME32_RCR_BITPOS_F0) & 1) +
 460                (((rme32->rcreg >> RME32_RCR_BITPOS_F1) & 1) << 1) +
 461                (((rme32->rcreg >> RME32_RCR_BITPOS_F2) & 1) << 2);
 462
 463        if (RME32_PRO_WITH_8414(rme32))
 464                switch (n) {    /* supporting the CS8414 */
 465                case 0:
 466                case 1:
 467                case 2:
 468                        return -1;
 469                case 3:
 470                        return 96000;
 471                case 4:
 472                        return 88200;
 473                case 5:
 474                        return 48000;
 475                case 6:
 476                        return 44100;
 477                case 7:
 478                        return 32000;
 479                default:
 480                        return -1;
 481                        break;
 482                } 
 483        else
 484                switch (n) {    /* supporting the CS8412 */
 485                case 0:
 486                        return -1;
 487                case 1:
 488                        return 48000;
 489                case 2:
 490                        return 44100;
 491                case 3:
 492                        return 32000;
 493                case 4:
 494                        return 48000;
 495                case 5:
 496                        return 44100;
 497                case 6:
 498                        return 44056;
 499                case 7:
 500                        return 32000;
 501                default:
 502                        break;
 503                }
 504        return -1;
 505}
 506
 507static int snd_rme32_playback_setrate(struct rme32 * rme32, int rate)
 508{
 509        int ds;
 510
 511        ds = rme32->wcreg & RME32_WCR_DS_BM;
 512        switch (rate) {
 513        case 32000:
 514                rme32->wcreg &= ~RME32_WCR_DS_BM;
 515                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) & 
 516                        ~RME32_WCR_FREQ_1;
 517                break;
 518        case 44100:
 519                rme32->wcreg &= ~RME32_WCR_DS_BM;
 520                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) & 
 521                        ~RME32_WCR_FREQ_0;
 522                break;
 523        case 48000:
 524                rme32->wcreg &= ~RME32_WCR_DS_BM;
 525                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) | 
 526                        RME32_WCR_FREQ_1;
 527                break;
 528        case 64000:
 529                if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 530                        return -EINVAL;
 531                rme32->wcreg |= RME32_WCR_DS_BM;
 532                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) & 
 533                        ~RME32_WCR_FREQ_1;
 534                break;
 535        case 88200:
 536                if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 537                        return -EINVAL;
 538                rme32->wcreg |= RME32_WCR_DS_BM;
 539                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) & 
 540                        ~RME32_WCR_FREQ_0;
 541                break;
 542        case 96000:
 543                if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 544                        return -EINVAL;
 545                rme32->wcreg |= RME32_WCR_DS_BM;
 546                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) | 
 547                        RME32_WCR_FREQ_1;
 548                break;
 549        default:
 550                return -EINVAL;
 551        }
 552        if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
 553            (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
 554        {
 555                /* change to/from double-speed: reset the DAC (if available) */
 556                snd_rme32_reset_dac(rme32);
 557        } else {
 558                writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 559        }
 560        return 0;
 561}
 562
 563static int snd_rme32_setclockmode(struct rme32 * rme32, int mode)
 564{
 565        switch (mode) {
 566        case RME32_CLOCKMODE_SLAVE:
 567                /* AutoSync */
 568                rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) & 
 569                        ~RME32_WCR_FREQ_1;
 570                break;
 571        case RME32_CLOCKMODE_MASTER_32:
 572                /* Internal 32.0kHz */
 573                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) & 
 574                        ~RME32_WCR_FREQ_1;
 575                break;
 576        case RME32_CLOCKMODE_MASTER_44:
 577                /* Internal 44.1kHz */
 578                rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) | 
 579                        RME32_WCR_FREQ_1;
 580                break;
 581        case RME32_CLOCKMODE_MASTER_48:
 582                /* Internal 48.0kHz */
 583                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) | 
 584                        RME32_WCR_FREQ_1;
 585                break;
 586        default:
 587                return -EINVAL;
 588        }
 589        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 590        return 0;
 591}
 592
 593static int snd_rme32_getclockmode(struct rme32 * rme32)
 594{
 595        return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 596            (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 597}
 598
 599static int snd_rme32_setinputtype(struct rme32 * rme32, int type)
 600{
 601        switch (type) {
 602        case RME32_INPUT_OPTICAL:
 603                rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) & 
 604                        ~RME32_WCR_INP_1;
 605                break;
 606        case RME32_INPUT_COAXIAL:
 607                rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) & 
 608                        ~RME32_WCR_INP_1;
 609                break;
 610        case RME32_INPUT_INTERNAL:
 611                rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) | 
 612                        RME32_WCR_INP_1;
 613                break;
 614        case RME32_INPUT_XLR:
 615                rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) | 
 616                        RME32_WCR_INP_1;
 617                break;
 618        default:
 619                return -EINVAL;
 620        }
 621        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 622        return 0;
 623}
 624
 625static int snd_rme32_getinputtype(struct rme32 * rme32)
 626{
 627        return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
 628            (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
 629}
 630
 631static void
 632snd_rme32_setframelog(struct rme32 * rme32, int n_channels, int is_playback)
 633{
 634        int frlog;
 635
 636        if (n_channels == 2) {
 637                frlog = 1;
 638        } else {
 639                /* assume 8 channels */
 640                frlog = 3;
 641        }
 642        if (is_playback) {
 643                frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 644                rme32->playback_frlog = frlog;
 645        } else {
 646                frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 647                rme32->capture_frlog = frlog;
 648        }
 649}
 650
 651static int snd_rme32_setformat(struct rme32 *rme32, snd_pcm_format_t format)
 652{
 653        switch (format) {
 654        case SNDRV_PCM_FORMAT_S16_LE:
 655                rme32->wcreg &= ~RME32_WCR_MODE24;
 656                break;
 657        case SNDRV_PCM_FORMAT_S32_LE:
 658                rme32->wcreg |= RME32_WCR_MODE24;
 659                break;
 660        default:
 661                return -EINVAL;
 662        }
 663        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 664        return 0;
 665}
 666
 667static int
 668snd_rme32_playback_hw_params(struct snd_pcm_substream *substream,
 669                             struct snd_pcm_hw_params *params)
 670{
 671        int err, rate, dummy;
 672        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 673        struct snd_pcm_runtime *runtime = substream->runtime;
 674
 675        if (rme32->fullduplex_mode) {
 676                err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
 677                if (err < 0)
 678                        return err;
 679        } else {
 680                runtime->dma_area = (void __force *)(rme32->iobase +
 681                                                     RME32_IO_DATA_BUFFER);
 682                runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 683                runtime->dma_bytes = RME32_BUFFER_SIZE;
 684        }
 685
 686        spin_lock_irq(&rme32->lock);
 687        if ((rme32->rcreg & RME32_RCR_KMODE) &&
 688            (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 689                /* AutoSync */
 690                if ((int)params_rate(params) != rate) {
 691                        spin_unlock_irq(&rme32->lock);
 692                        return -EIO;
 693                }
 694        } else if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 695                spin_unlock_irq(&rme32->lock);
 696                return err;
 697        }
 698        if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 699                spin_unlock_irq(&rme32->lock);
 700                return err;
 701        }
 702
 703        snd_rme32_setframelog(rme32, params_channels(params), 1);
 704        if (rme32->capture_periodsize != 0) {
 705                if (params_period_size(params) << rme32->playback_frlog != rme32->capture_periodsize) {
 706                        spin_unlock_irq(&rme32->lock);
 707                        return -EBUSY;
 708                }
 709        }
 710        rme32->playback_periodsize = params_period_size(params) << rme32->playback_frlog;
 711        /* S/PDIF setup */
 712        if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
 713                rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
 714                rme32->wcreg |= rme32->wcreg_spdif_stream;
 715                writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 716        }
 717        spin_unlock_irq(&rme32->lock);
 718
 719        return 0;
 720}
 721
 722static int
 723snd_rme32_capture_hw_params(struct snd_pcm_substream *substream,
 724                            struct snd_pcm_hw_params *params)
 725{
 726        int err, isadat, rate;
 727        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 728        struct snd_pcm_runtime *runtime = substream->runtime;
 729
 730        if (rme32->fullduplex_mode) {
 731                err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
 732                if (err < 0)
 733                        return err;
 734        } else {
 735                runtime->dma_area = (void __force *)rme32->iobase +
 736                                        RME32_IO_DATA_BUFFER;
 737                runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 738                runtime->dma_bytes = RME32_BUFFER_SIZE;
 739        }
 740
 741        spin_lock_irq(&rme32->lock);
 742        /* enable AutoSync for record-preparing */
 743        rme32->wcreg |= RME32_WCR_AUTOSYNC;
 744        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 745
 746        if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 747                spin_unlock_irq(&rme32->lock);
 748                return err;
 749        }
 750        if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 751                spin_unlock_irq(&rme32->lock);
 752                return err;
 753        }
 754        if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 755                if ((int)params_rate(params) != rate) {
 756                        spin_unlock_irq(&rme32->lock);
 757                        return -EIO;                    
 758                }
 759                if ((isadat && runtime->hw.channels_min == 2) ||
 760                    (!isadat && runtime->hw.channels_min == 8)) {
 761                        spin_unlock_irq(&rme32->lock);
 762                        return -EIO;
 763                }
 764        }
 765        /* AutoSync off for recording */
 766        rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
 767        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 768
 769        snd_rme32_setframelog(rme32, params_channels(params), 0);
 770        if (rme32->playback_periodsize != 0) {
 771                if (params_period_size(params) << rme32->capture_frlog !=
 772                    rme32->playback_periodsize) {
 773                        spin_unlock_irq(&rme32->lock);
 774                        return -EBUSY;
 775                }
 776        }
 777        rme32->capture_periodsize =
 778            params_period_size(params) << rme32->capture_frlog;
 779        spin_unlock_irq(&rme32->lock);
 780
 781        return 0;
 782}
 783
 784static int snd_rme32_pcm_hw_free(struct snd_pcm_substream *substream)
 785{
 786        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 787        if (! rme32->fullduplex_mode)
 788                return 0;
 789        return snd_pcm_lib_free_pages(substream);
 790}
 791
 792static void snd_rme32_pcm_start(struct rme32 * rme32, int from_pause)
 793{
 794        if (!from_pause) {
 795                writel(0, rme32->iobase + RME32_IO_RESET_POS);
 796        }
 797
 798        rme32->wcreg |= RME32_WCR_START;
 799        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 800}
 801
 802static void snd_rme32_pcm_stop(struct rme32 * rme32, int to_pause)
 803{
 804        /*
 805         * Check if there is an unconfirmed IRQ, if so confirm it, or else
 806         * the hardware will not stop generating interrupts
 807         */
 808        rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 809        if (rme32->rcreg & RME32_RCR_IRQ) {
 810                writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 811        }
 812        rme32->wcreg &= ~RME32_WCR_START;
 813        if (rme32->wcreg & RME32_WCR_SEL)
 814                rme32->wcreg |= RME32_WCR_MUTE;
 815        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 816        if (! to_pause)
 817                writel(0, rme32->iobase + RME32_IO_RESET_POS);
 818}
 819
 820static irqreturn_t snd_rme32_interrupt(int irq, void *dev_id)
 821{
 822        struct rme32 *rme32 = (struct rme32 *) dev_id;
 823
 824        rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 825        if (!(rme32->rcreg & RME32_RCR_IRQ)) {
 826                return IRQ_NONE;
 827        } else {
 828                if (rme32->capture_substream) {
 829                        snd_pcm_period_elapsed(rme32->capture_substream);
 830                }
 831                if (rme32->playback_substream) {
 832                        snd_pcm_period_elapsed(rme32->playback_substream);
 833                }
 834                writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 835        }
 836        return IRQ_HANDLED;
 837}
 838
 839static const unsigned int period_bytes[] = { RME32_BLOCK_SIZE };
 840
 841static const struct snd_pcm_hw_constraint_list hw_constraints_period_bytes = {
 842        .count = ARRAY_SIZE(period_bytes),
 843        .list = period_bytes,
 844        .mask = 0
 845};
 846
 847static void snd_rme32_set_buffer_constraint(struct rme32 *rme32, struct snd_pcm_runtime *runtime)
 848{
 849        if (! rme32->fullduplex_mode) {
 850                snd_pcm_hw_constraint_single(runtime,
 851                                             SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 852                                             RME32_BUFFER_SIZE);
 853                snd_pcm_hw_constraint_list(runtime, 0,
 854                                           SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 855                                           &hw_constraints_period_bytes);
 856        }
 857}
 858
 859static int snd_rme32_playback_spdif_open(struct snd_pcm_substream *substream)
 860{
 861        int rate, dummy;
 862        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 863        struct snd_pcm_runtime *runtime = substream->runtime;
 864
 865        snd_pcm_set_sync(substream);
 866
 867        spin_lock_irq(&rme32->lock);
 868        if (rme32->playback_substream != NULL) {
 869                spin_unlock_irq(&rme32->lock);
 870                return -EBUSY;
 871        }
 872        rme32->wcreg &= ~RME32_WCR_ADAT;
 873        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 874        rme32->playback_substream = substream;
 875        spin_unlock_irq(&rme32->lock);
 876
 877        if (rme32->fullduplex_mode)
 878                runtime->hw = snd_rme32_spdif_fd_info;
 879        else
 880                runtime->hw = snd_rme32_spdif_info;
 881        if (rme32->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO) {
 882                runtime->hw.rates |= SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 883                runtime->hw.rate_max = 96000;
 884        }
 885        if ((rme32->rcreg & RME32_RCR_KMODE) &&
 886            (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 887                /* AutoSync */
 888                runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 889                runtime->hw.rate_min = rate;
 890                runtime->hw.rate_max = rate;
 891        }       
 892
 893        snd_rme32_set_buffer_constraint(rme32, runtime);
 894
 895        rme32->wcreg_spdif_stream = rme32->wcreg_spdif;
 896        rme32->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 897        snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
 898                       SNDRV_CTL_EVENT_MASK_INFO, &rme32->spdif_ctl->id);
 899        return 0;
 900}
 901
 902static int snd_rme32_capture_spdif_open(struct snd_pcm_substream *substream)
 903{
 904        int isadat, rate;
 905        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 906        struct snd_pcm_runtime *runtime = substream->runtime;
 907
 908        snd_pcm_set_sync(substream);
 909
 910        spin_lock_irq(&rme32->lock);
 911        if (rme32->capture_substream != NULL) {
 912                spin_unlock_irq(&rme32->lock);
 913                return -EBUSY;
 914        }
 915        rme32->capture_substream = substream;
 916        spin_unlock_irq(&rme32->lock);
 917
 918        if (rme32->fullduplex_mode)
 919                runtime->hw = snd_rme32_spdif_fd_info;
 920        else
 921                runtime->hw = snd_rme32_spdif_info;
 922        if (RME32_PRO_WITH_8414(rme32)) {
 923                runtime->hw.rates |= SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 924                runtime->hw.rate_max = 96000;
 925        }
 926        if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 927                if (isadat) {
 928                        return -EIO;
 929                }
 930                runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 931                runtime->hw.rate_min = rate;
 932                runtime->hw.rate_max = rate;
 933        }
 934
 935        snd_rme32_set_buffer_constraint(rme32, runtime);
 936
 937        return 0;
 938}
 939
 940static int
 941snd_rme32_playback_adat_open(struct snd_pcm_substream *substream)
 942{
 943        int rate, dummy;
 944        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 945        struct snd_pcm_runtime *runtime = substream->runtime;
 946        
 947        snd_pcm_set_sync(substream);
 948
 949        spin_lock_irq(&rme32->lock);    
 950        if (rme32->playback_substream != NULL) {
 951                spin_unlock_irq(&rme32->lock);
 952                return -EBUSY;
 953        }
 954        rme32->wcreg |= RME32_WCR_ADAT;
 955        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 956        rme32->playback_substream = substream;
 957        spin_unlock_irq(&rme32->lock);
 958        
 959        if (rme32->fullduplex_mode)
 960                runtime->hw = snd_rme32_adat_fd_info;
 961        else
 962                runtime->hw = snd_rme32_adat_info;
 963        if ((rme32->rcreg & RME32_RCR_KMODE) &&
 964            (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 965                /* AutoSync */
 966                runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 967                runtime->hw.rate_min = rate;
 968                runtime->hw.rate_max = rate;
 969        }        
 970
 971        snd_rme32_set_buffer_constraint(rme32, runtime);
 972        return 0;
 973}
 974
 975static int
 976snd_rme32_capture_adat_open(struct snd_pcm_substream *substream)
 977{
 978        int isadat, rate;
 979        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 980        struct snd_pcm_runtime *runtime = substream->runtime;
 981
 982        if (rme32->fullduplex_mode)
 983                runtime->hw = snd_rme32_adat_fd_info;
 984        else
 985                runtime->hw = snd_rme32_adat_info;
 986        if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 987                if (!isadat) {
 988                        return -EIO;
 989                }
 990                runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 991                runtime->hw.rate_min = rate;
 992                runtime->hw.rate_max = rate;
 993        }
 994
 995        snd_pcm_set_sync(substream);
 996        
 997        spin_lock_irq(&rme32->lock);    
 998        if (rme32->capture_substream != NULL) {
 999                spin_unlock_irq(&rme32->lock);
1000                return -EBUSY;
1001        }
1002        rme32->capture_substream = substream;
1003        spin_unlock_irq(&rme32->lock);
1004
1005        snd_rme32_set_buffer_constraint(rme32, runtime);
1006        return 0;
1007}
1008
1009static int snd_rme32_playback_close(struct snd_pcm_substream *substream)
1010{
1011        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1012        int spdif = 0;
1013
1014        spin_lock_irq(&rme32->lock);
1015        rme32->playback_substream = NULL;
1016        rme32->playback_periodsize = 0;
1017        spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
1018        spin_unlock_irq(&rme32->lock);
1019        if (spdif) {
1020                rme32->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1021                snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
1022                               SNDRV_CTL_EVENT_MASK_INFO,
1023                               &rme32->spdif_ctl->id);
1024        }
1025        return 0;
1026}
1027
1028static int snd_rme32_capture_close(struct snd_pcm_substream *substream)
1029{
1030        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1031
1032        spin_lock_irq(&rme32->lock);
1033        rme32->capture_substream = NULL;
1034        rme32->capture_periodsize = 0;
1035        spin_unlock_irq(&rme32->lock);
1036        return 0;
1037}
1038
1039static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream)
1040{
1041        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1042
1043        spin_lock_irq(&rme32->lock);
1044        if (rme32->fullduplex_mode) {
1045                memset(&rme32->playback_pcm, 0, sizeof(rme32->playback_pcm));
1046                rme32->playback_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1047                rme32->playback_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1048        } else {
1049                writel(0, rme32->iobase + RME32_IO_RESET_POS);
1050        }
1051        if (rme32->wcreg & RME32_WCR_SEL)
1052                rme32->wcreg &= ~RME32_WCR_MUTE;
1053        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1054        spin_unlock_irq(&rme32->lock);
1055        return 0;
1056}
1057
1058static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream)
1059{
1060        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1061
1062        spin_lock_irq(&rme32->lock);
1063        if (rme32->fullduplex_mode) {
1064                memset(&rme32->capture_pcm, 0, sizeof(rme32->capture_pcm));
1065                rme32->capture_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1066                rme32->capture_pcm.hw_queue_size = RME32_BUFFER_SIZE / 2;
1067                rme32->capture_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1068        } else {
1069                writel(0, rme32->iobase + RME32_IO_RESET_POS);
1070        }
1071        spin_unlock_irq(&rme32->lock);
1072        return 0;
1073}
1074
1075static int
1076snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1077{
1078        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1079        struct snd_pcm_substream *s;
1080
1081        spin_lock(&rme32->lock);
1082        snd_pcm_group_for_each_entry(s, substream) {
1083                if (s != rme32->playback_substream &&
1084                    s != rme32->capture_substream)
1085                        continue;
1086                switch (cmd) {
1087                case SNDRV_PCM_TRIGGER_START:
1088                        rme32->running |= (1 << s->stream);
1089                        if (rme32->fullduplex_mode) {
1090                                /* remember the current DMA position */
1091                                if (s == rme32->playback_substream) {
1092                                        rme32->playback_pcm.hw_io =
1093                                        rme32->playback_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1094                                } else {
1095                                        rme32->capture_pcm.hw_io =
1096                                        rme32->capture_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1097                                }
1098                        }
1099                        break;
1100                case SNDRV_PCM_TRIGGER_STOP:
1101                        rme32->running &= ~(1 << s->stream);
1102                        break;
1103                }
1104                snd_pcm_trigger_done(s, substream);
1105        }
1106        
1107        /* prefill playback buffer */
1108        if (cmd == SNDRV_PCM_TRIGGER_START && rme32->fullduplex_mode) {
1109                snd_pcm_group_for_each_entry(s, substream) {
1110                        if (s == rme32->playback_substream) {
1111                                s->ops->ack(s);
1112                                break;
1113                        }
1114                }
1115        }
1116
1117        switch (cmd) {
1118        case SNDRV_PCM_TRIGGER_START:
1119                if (rme32->running && ! RME32_ISWORKING(rme32))
1120                        snd_rme32_pcm_start(rme32, 0);
1121                break;
1122        case SNDRV_PCM_TRIGGER_STOP:
1123                if (! rme32->running && RME32_ISWORKING(rme32))
1124                        snd_rme32_pcm_stop(rme32, 0);
1125                break;
1126        case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1127                if (rme32->running && RME32_ISWORKING(rme32))
1128                        snd_rme32_pcm_stop(rme32, 1);
1129                break;
1130        case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1131                if (rme32->running && ! RME32_ISWORKING(rme32))
1132                        snd_rme32_pcm_start(rme32, 1);
1133                break;
1134        }
1135        spin_unlock(&rme32->lock);
1136        return 0;
1137}
1138
1139/* pointer callback for halfduplex mode */
1140static snd_pcm_uframes_t
1141snd_rme32_playback_pointer(struct snd_pcm_substream *substream)
1142{
1143        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1144        return snd_rme32_pcm_byteptr(rme32) >> rme32->playback_frlog;
1145}
1146
1147static snd_pcm_uframes_t
1148snd_rme32_capture_pointer(struct snd_pcm_substream *substream)
1149{
1150        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1151        return snd_rme32_pcm_byteptr(rme32) >> rme32->capture_frlog;
1152}
1153
1154
1155/* ack and pointer callbacks for fullduplex mode */
1156static void snd_rme32_pb_trans_copy(struct snd_pcm_substream *substream,
1157                                    struct snd_pcm_indirect *rec, size_t bytes)
1158{
1159        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1160        memcpy_toio(rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1161                    substream->runtime->dma_area + rec->sw_data, bytes);
1162}
1163
1164static int snd_rme32_playback_fd_ack(struct snd_pcm_substream *substream)
1165{
1166        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1167        struct snd_pcm_indirect *rec, *cprec;
1168
1169        rec = &rme32->playback_pcm;
1170        cprec = &rme32->capture_pcm;
1171        spin_lock(&rme32->lock);
1172        rec->hw_queue_size = RME32_BUFFER_SIZE;
1173        if (rme32->running & (1 << SNDRV_PCM_STREAM_CAPTURE))
1174                rec->hw_queue_size -= cprec->hw_ready;
1175        spin_unlock(&rme32->lock);
1176        return snd_pcm_indirect_playback_transfer(substream, rec,
1177                                                  snd_rme32_pb_trans_copy);
1178}
1179
1180static void snd_rme32_cp_trans_copy(struct snd_pcm_substream *substream,
1181                                    struct snd_pcm_indirect *rec, size_t bytes)
1182{
1183        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1184        memcpy_fromio(substream->runtime->dma_area + rec->sw_data,
1185                      rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1186                      bytes);
1187}
1188
1189static int snd_rme32_capture_fd_ack(struct snd_pcm_substream *substream)
1190{
1191        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1192        return snd_pcm_indirect_capture_transfer(substream, &rme32->capture_pcm,
1193                                                 snd_rme32_cp_trans_copy);
1194}
1195
1196static snd_pcm_uframes_t
1197snd_rme32_playback_fd_pointer(struct snd_pcm_substream *substream)
1198{
1199        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1200        return snd_pcm_indirect_playback_pointer(substream, &rme32->playback_pcm,
1201                                                 snd_rme32_pcm_byteptr(rme32));
1202}
1203
1204static snd_pcm_uframes_t
1205snd_rme32_capture_fd_pointer(struct snd_pcm_substream *substream)
1206{
1207        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1208        return snd_pcm_indirect_capture_pointer(substream, &rme32->capture_pcm,
1209                                                snd_rme32_pcm_byteptr(rme32));
1210}
1211
1212/* for halfduplex mode */
1213static const struct snd_pcm_ops snd_rme32_playback_spdif_ops = {
1214        .open =         snd_rme32_playback_spdif_open,
1215        .close =        snd_rme32_playback_close,
1216        .ioctl =        snd_pcm_lib_ioctl,
1217        .hw_params =    snd_rme32_playback_hw_params,
1218        .hw_free =      snd_rme32_pcm_hw_free,
1219        .prepare =      snd_rme32_playback_prepare,
1220        .trigger =      snd_rme32_pcm_trigger,
1221        .pointer =      snd_rme32_playback_pointer,
1222        .copy_user =    snd_rme32_playback_copy,
1223        .copy_kernel =  snd_rme32_playback_copy_kernel,
1224        .fill_silence = snd_rme32_playback_silence,
1225        .mmap =         snd_pcm_lib_mmap_iomem,
1226};
1227
1228static const struct snd_pcm_ops snd_rme32_capture_spdif_ops = {
1229        .open =         snd_rme32_capture_spdif_open,
1230        .close =        snd_rme32_capture_close,
1231        .ioctl =        snd_pcm_lib_ioctl,
1232        .hw_params =    snd_rme32_capture_hw_params,
1233        .hw_free =      snd_rme32_pcm_hw_free,
1234        .prepare =      snd_rme32_capture_prepare,
1235        .trigger =      snd_rme32_pcm_trigger,
1236        .pointer =      snd_rme32_capture_pointer,
1237        .copy_user =    snd_rme32_capture_copy,
1238        .copy_kernel =  snd_rme32_capture_copy_kernel,
1239        .mmap =         snd_pcm_lib_mmap_iomem,
1240};
1241
1242static const struct snd_pcm_ops snd_rme32_playback_adat_ops = {
1243        .open =         snd_rme32_playback_adat_open,
1244        .close =        snd_rme32_playback_close,
1245        .ioctl =        snd_pcm_lib_ioctl,
1246        .hw_params =    snd_rme32_playback_hw_params,
1247        .prepare =      snd_rme32_playback_prepare,
1248        .trigger =      snd_rme32_pcm_trigger,
1249        .pointer =      snd_rme32_playback_pointer,
1250        .copy_user =    snd_rme32_playback_copy,
1251        .copy_kernel =  snd_rme32_playback_copy_kernel,
1252        .fill_silence = snd_rme32_playback_silence,
1253        .mmap =         snd_pcm_lib_mmap_iomem,
1254};
1255
1256static const struct snd_pcm_ops snd_rme32_capture_adat_ops = {
1257        .open =         snd_rme32_capture_adat_open,
1258        .close =        snd_rme32_capture_close,
1259        .ioctl =        snd_pcm_lib_ioctl,
1260        .hw_params =    snd_rme32_capture_hw_params,
1261        .prepare =      snd_rme32_capture_prepare,
1262        .trigger =      snd_rme32_pcm_trigger,
1263        .pointer =      snd_rme32_capture_pointer,
1264        .copy_user =    snd_rme32_capture_copy,
1265        .copy_kernel =  snd_rme32_capture_copy_kernel,
1266        .mmap =         snd_pcm_lib_mmap_iomem,
1267};
1268
1269/* for fullduplex mode */
1270static const struct snd_pcm_ops snd_rme32_playback_spdif_fd_ops = {
1271        .open =         snd_rme32_playback_spdif_open,
1272        .close =        snd_rme32_playback_close,
1273        .ioctl =        snd_pcm_lib_ioctl,
1274        .hw_params =    snd_rme32_playback_hw_params,
1275        .hw_free =      snd_rme32_pcm_hw_free,
1276        .prepare =      snd_rme32_playback_prepare,
1277        .trigger =      snd_rme32_pcm_trigger,
1278        .pointer =      snd_rme32_playback_fd_pointer,
1279        .ack =          snd_rme32_playback_fd_ack,
1280};
1281
1282static const struct snd_pcm_ops snd_rme32_capture_spdif_fd_ops = {
1283        .open =         snd_rme32_capture_spdif_open,
1284        .close =        snd_rme32_capture_close,
1285        .ioctl =        snd_pcm_lib_ioctl,
1286        .hw_params =    snd_rme32_capture_hw_params,
1287        .hw_free =      snd_rme32_pcm_hw_free,
1288        .prepare =      snd_rme32_capture_prepare,
1289        .trigger =      snd_rme32_pcm_trigger,
1290        .pointer =      snd_rme32_capture_fd_pointer,
1291        .ack =          snd_rme32_capture_fd_ack,
1292};
1293
1294static const struct snd_pcm_ops snd_rme32_playback_adat_fd_ops = {
1295        .open =         snd_rme32_playback_adat_open,
1296        .close =        snd_rme32_playback_close,
1297        .ioctl =        snd_pcm_lib_ioctl,
1298        .hw_params =    snd_rme32_playback_hw_params,
1299        .prepare =      snd_rme32_playback_prepare,
1300        .trigger =      snd_rme32_pcm_trigger,
1301        .pointer =      snd_rme32_playback_fd_pointer,
1302        .ack =          snd_rme32_playback_fd_ack,
1303};
1304
1305static const struct snd_pcm_ops snd_rme32_capture_adat_fd_ops = {
1306        .open =         snd_rme32_capture_adat_open,
1307        .close =        snd_rme32_capture_close,
1308        .ioctl =        snd_pcm_lib_ioctl,
1309        .hw_params =    snd_rme32_capture_hw_params,
1310        .prepare =      snd_rme32_capture_prepare,
1311        .trigger =      snd_rme32_pcm_trigger,
1312        .pointer =      snd_rme32_capture_fd_pointer,
1313        .ack =          snd_rme32_capture_fd_ack,
1314};
1315
1316static void snd_rme32_free(void *private_data)
1317{
1318        struct rme32 *rme32 = (struct rme32 *) private_data;
1319
1320        if (rme32 == NULL) {
1321                return;
1322        }
1323        if (rme32->irq >= 0) {
1324                snd_rme32_pcm_stop(rme32, 0);
1325                free_irq(rme32->irq, (void *) rme32);
1326                rme32->irq = -1;
1327        }
1328        if (rme32->iobase) {
1329                iounmap(rme32->iobase);
1330                rme32->iobase = NULL;
1331        }
1332        if (rme32->port) {
1333                pci_release_regions(rme32->pci);
1334                rme32->port = 0;
1335        }
1336        pci_disable_device(rme32->pci);
1337}
1338
1339static void snd_rme32_free_spdif_pcm(struct snd_pcm *pcm)
1340{
1341        struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1342        rme32->spdif_pcm = NULL;
1343}
1344
1345static void
1346snd_rme32_free_adat_pcm(struct snd_pcm *pcm)
1347{
1348        struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1349        rme32->adat_pcm = NULL;
1350}
1351
1352static int snd_rme32_create(struct rme32 *rme32)
1353{
1354        struct pci_dev *pci = rme32->pci;
1355        int err;
1356
1357        rme32->irq = -1;
1358        spin_lock_init(&rme32->lock);
1359
1360        if ((err = pci_enable_device(pci)) < 0)
1361                return err;
1362
1363        if ((err = pci_request_regions(pci, "RME32")) < 0)
1364                return err;
1365        rme32->port = pci_resource_start(rme32->pci, 0);
1366
1367        rme32->iobase = ioremap_nocache(rme32->port, RME32_IO_SIZE);
1368        if (!rme32->iobase) {
1369                dev_err(rme32->card->dev,
1370                        "unable to remap memory region 0x%lx-0x%lx\n",
1371                           rme32->port, rme32->port + RME32_IO_SIZE - 1);
1372                return -ENOMEM;
1373        }
1374
1375        if (request_irq(pci->irq, snd_rme32_interrupt, IRQF_SHARED,
1376                        KBUILD_MODNAME, rme32)) {
1377                dev_err(rme32->card->dev, "unable to grab IRQ %d\n", pci->irq);
1378                return -EBUSY;
1379        }
1380        rme32->irq = pci->irq;
1381
1382        /* read the card's revision number */
1383        pci_read_config_byte(pci, 8, &rme32->rev);
1384
1385        /* set up ALSA pcm device for S/PDIF */
1386        if ((err = snd_pcm_new(rme32->card, "Digi32 IEC958", 0, 1, 1, &rme32->spdif_pcm)) < 0) {
1387                return err;
1388        }
1389        rme32->spdif_pcm->private_data = rme32;
1390        rme32->spdif_pcm->private_free = snd_rme32_free_spdif_pcm;
1391        strcpy(rme32->spdif_pcm->name, "Digi32 IEC958");
1392        if (rme32->fullduplex_mode) {
1393                snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1394                                &snd_rme32_playback_spdif_fd_ops);
1395                snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1396                                &snd_rme32_capture_spdif_fd_ops);
1397                snd_pcm_lib_preallocate_pages_for_all(rme32->spdif_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1398                                                      snd_dma_continuous_data(GFP_KERNEL),
1399                                                      0, RME32_MID_BUFFER_SIZE);
1400                rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1401        } else {
1402                snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1403                                &snd_rme32_playback_spdif_ops);
1404                snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1405                                &snd_rme32_capture_spdif_ops);
1406                rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1407        }
1408
1409        /* set up ALSA pcm device for ADAT */
1410        if ((pci->device == PCI_DEVICE_ID_RME_DIGI32) ||
1411            (pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO)) {
1412                /* ADAT is not available on DIGI32 and DIGI32 Pro */
1413                rme32->adat_pcm = NULL;
1414        }
1415        else {
1416                if ((err = snd_pcm_new(rme32->card, "Digi32 ADAT", 1,
1417                                       1, 1, &rme32->adat_pcm)) < 0)
1418                {
1419                        return err;
1420                }               
1421                rme32->adat_pcm->private_data = rme32;
1422                rme32->adat_pcm->private_free = snd_rme32_free_adat_pcm;
1423                strcpy(rme32->adat_pcm->name, "Digi32 ADAT");
1424                if (rme32->fullduplex_mode) {
1425                        snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK, 
1426                                        &snd_rme32_playback_adat_fd_ops);
1427                        snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE, 
1428                                        &snd_rme32_capture_adat_fd_ops);
1429                        snd_pcm_lib_preallocate_pages_for_all(rme32->adat_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1430                                                              snd_dma_continuous_data(GFP_KERNEL),
1431                                                              0, RME32_MID_BUFFER_SIZE);
1432                        rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1433                } else {
1434                        snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK, 
1435                                        &snd_rme32_playback_adat_ops);
1436                        snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE, 
1437                                        &snd_rme32_capture_adat_ops);
1438                        rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1439                }
1440        }
1441
1442
1443        rme32->playback_periodsize = 0;
1444        rme32->capture_periodsize = 0;
1445
1446        /* make sure playback/capture is stopped, if by some reason active */
1447        snd_rme32_pcm_stop(rme32, 0);
1448
1449        /* reset DAC */
1450        snd_rme32_reset_dac(rme32);
1451
1452        /* reset buffer pointer */
1453        writel(0, rme32->iobase + RME32_IO_RESET_POS);
1454
1455        /* set default values in registers */
1456        rme32->wcreg = RME32_WCR_SEL |   /* normal playback */
1457                RME32_WCR_INP_0 | /* input select */
1458                RME32_WCR_MUTE;  /* muting on */
1459        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1460
1461
1462        /* init switch interface */
1463        if ((err = snd_rme32_create_switches(rme32->card, rme32)) < 0) {
1464                return err;
1465        }
1466
1467        /* init proc interface */
1468        snd_rme32_proc_init(rme32);
1469
1470        rme32->capture_substream = NULL;
1471        rme32->playback_substream = NULL;
1472
1473        return 0;
1474}
1475
1476/*
1477 * proc interface
1478 */
1479
1480static void
1481snd_rme32_proc_read(struct snd_info_entry * entry, struct snd_info_buffer *buffer)
1482{
1483        int n;
1484        struct rme32 *rme32 = (struct rme32 *) entry->private_data;
1485
1486        rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
1487
1488        snd_iprintf(buffer, rme32->card->longname);
1489        snd_iprintf(buffer, " (index #%d)\n", rme32->card->number + 1);
1490
1491        snd_iprintf(buffer, "\nGeneral settings\n");
1492        if (rme32->fullduplex_mode)
1493                snd_iprintf(buffer, "  Full-duplex mode\n");
1494        else
1495                snd_iprintf(buffer, "  Half-duplex mode\n");
1496        if (RME32_PRO_WITH_8414(rme32)) {
1497                snd_iprintf(buffer, "  receiver: CS8414\n");
1498        } else {
1499                snd_iprintf(buffer, "  receiver: CS8412\n");
1500        }
1501        if (rme32->wcreg & RME32_WCR_MODE24) {
1502                snd_iprintf(buffer, "  format: 24 bit");
1503        } else {
1504                snd_iprintf(buffer, "  format: 16 bit");
1505        }
1506        if (rme32->wcreg & RME32_WCR_MONO) {
1507                snd_iprintf(buffer, ", Mono\n");
1508        } else {
1509                snd_iprintf(buffer, ", Stereo\n");
1510        }
1511
1512        snd_iprintf(buffer, "\nInput settings\n");
1513        switch (snd_rme32_getinputtype(rme32)) {
1514        case RME32_INPUT_OPTICAL:
1515                snd_iprintf(buffer, "  input: optical");
1516                break;
1517        case RME32_INPUT_COAXIAL:
1518                snd_iprintf(buffer, "  input: coaxial");
1519                break;
1520        case RME32_INPUT_INTERNAL:
1521                snd_iprintf(buffer, "  input: internal");
1522                break;
1523        case RME32_INPUT_XLR:
1524                snd_iprintf(buffer, "  input: XLR");
1525                break;
1526        }
1527        if (snd_rme32_capture_getrate(rme32, &n) < 0) {
1528                snd_iprintf(buffer, "\n  sample rate: no valid signal\n");
1529        } else {
1530                if (n) {
1531                        snd_iprintf(buffer, " (8 channels)\n");
1532                } else {
1533                        snd_iprintf(buffer, " (2 channels)\n");
1534                }
1535                snd_iprintf(buffer, "  sample rate: %d Hz\n",
1536                            snd_rme32_capture_getrate(rme32, &n));
1537        }
1538
1539        snd_iprintf(buffer, "\nOutput settings\n");
1540        if (rme32->wcreg & RME32_WCR_SEL) {
1541                snd_iprintf(buffer, "  output signal: normal playback");
1542        } else {
1543                snd_iprintf(buffer, "  output signal: same as input");
1544        }
1545        if (rme32->wcreg & RME32_WCR_MUTE) {
1546                snd_iprintf(buffer, " (muted)\n");
1547        } else {
1548                snd_iprintf(buffer, "\n");
1549        }
1550
1551        /* master output frequency */
1552        if (!
1553            ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1554             && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1555                snd_iprintf(buffer, "  sample rate: %d Hz\n",
1556                            snd_rme32_playback_getrate(rme32));
1557        }
1558        if (rme32->rcreg & RME32_RCR_KMODE) {
1559                snd_iprintf(buffer, "  sample clock source: AutoSync\n");
1560        } else {
1561                snd_iprintf(buffer, "  sample clock source: Internal\n");
1562        }
1563        if (rme32->wcreg & RME32_WCR_PRO) {
1564                snd_iprintf(buffer, "  format: AES/EBU (professional)\n");
1565        } else {
1566                snd_iprintf(buffer, "  format: IEC958 (consumer)\n");
1567        }
1568        if (rme32->wcreg & RME32_WCR_EMP) {
1569                snd_iprintf(buffer, "  emphasis: on\n");
1570        } else {
1571                snd_iprintf(buffer, "  emphasis: off\n");
1572        }
1573}
1574
1575static void snd_rme32_proc_init(struct rme32 *rme32)
1576{
1577        struct snd_info_entry *entry;
1578
1579        if (! snd_card_proc_new(rme32->card, "rme32", &entry))
1580                snd_info_set_text_ops(entry, rme32, snd_rme32_proc_read);
1581}
1582
1583/*
1584 * control interface
1585 */
1586
1587#define snd_rme32_info_loopback_control         snd_ctl_boolean_mono_info
1588
1589static int
1590snd_rme32_get_loopback_control(struct snd_kcontrol *kcontrol,
1591                               struct snd_ctl_elem_value *ucontrol)
1592{
1593        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1594
1595        spin_lock_irq(&rme32->lock);
1596        ucontrol->value.integer.value[0] =
1597            rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1598        spin_unlock_irq(&rme32->lock);
1599        return 0;
1600}
1601static int
1602snd_rme32_put_loopback_control(struct snd_kcontrol *kcontrol,
1603                               struct snd_ctl_elem_value *ucontrol)
1604{
1605        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1606        unsigned int val;
1607        int change;
1608
1609        val = ucontrol->value.integer.value[0] ? 0 : RME32_WCR_SEL;
1610        spin_lock_irq(&rme32->lock);
1611        val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1612        change = val != rme32->wcreg;
1613        if (ucontrol->value.integer.value[0])
1614                val &= ~RME32_WCR_MUTE;
1615        else
1616                val |= RME32_WCR_MUTE;
1617        rme32->wcreg = val;
1618        writel(val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1619        spin_unlock_irq(&rme32->lock);
1620        return change;
1621}
1622
1623static int
1624snd_rme32_info_inputtype_control(struct snd_kcontrol *kcontrol,
1625                                 struct snd_ctl_elem_info *uinfo)
1626{
1627        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1628        static const char * const texts[4] = {
1629                "Optical", "Coaxial", "Internal", "XLR"
1630        };
1631        int num_items;
1632
1633        switch (rme32->pci->device) {
1634        case PCI_DEVICE_ID_RME_DIGI32:
1635        case PCI_DEVICE_ID_RME_DIGI32_8:
1636                num_items = 3;
1637                break;
1638        case PCI_DEVICE_ID_RME_DIGI32_PRO:
1639                num_items = 4;
1640                break;
1641        default:
1642                snd_BUG();
1643                return -EINVAL;
1644        }
1645        return snd_ctl_enum_info(uinfo, 1, num_items, texts);
1646}
1647static int
1648snd_rme32_get_inputtype_control(struct snd_kcontrol *kcontrol,
1649                                struct snd_ctl_elem_value *ucontrol)
1650{
1651        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1652        unsigned int items = 3;
1653
1654        spin_lock_irq(&rme32->lock);
1655        ucontrol->value.enumerated.item[0] = snd_rme32_getinputtype(rme32);
1656
1657        switch (rme32->pci->device) {
1658        case PCI_DEVICE_ID_RME_DIGI32:
1659        case PCI_DEVICE_ID_RME_DIGI32_8:
1660                items = 3;
1661                break;
1662        case PCI_DEVICE_ID_RME_DIGI32_PRO:
1663                items = 4;
1664                break;
1665        default:
1666                snd_BUG();
1667                break;
1668        }
1669        if (ucontrol->value.enumerated.item[0] >= items) {
1670                ucontrol->value.enumerated.item[0] = items - 1;
1671        }
1672
1673        spin_unlock_irq(&rme32->lock);
1674        return 0;
1675}
1676static int
1677snd_rme32_put_inputtype_control(struct snd_kcontrol *kcontrol,
1678                                struct snd_ctl_elem_value *ucontrol)
1679{
1680        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1681        unsigned int val;
1682        int change, items = 3;
1683
1684        switch (rme32->pci->device) {
1685        case PCI_DEVICE_ID_RME_DIGI32:
1686        case PCI_DEVICE_ID_RME_DIGI32_8:
1687                items = 3;
1688                break;
1689        case PCI_DEVICE_ID_RME_DIGI32_PRO:
1690                items = 4;
1691                break;
1692        default:
1693                snd_BUG();
1694                break;
1695        }
1696        val = ucontrol->value.enumerated.item[0] % items;
1697
1698        spin_lock_irq(&rme32->lock);
1699        change = val != (unsigned int)snd_rme32_getinputtype(rme32);
1700        snd_rme32_setinputtype(rme32, val);
1701        spin_unlock_irq(&rme32->lock);
1702        return change;
1703}
1704
1705static int
1706snd_rme32_info_clockmode_control(struct snd_kcontrol *kcontrol,
1707                                 struct snd_ctl_elem_info *uinfo)
1708{
1709        static const char * const texts[4] = { "AutoSync",
1710                                  "Internal 32.0kHz", 
1711                                  "Internal 44.1kHz", 
1712                                  "Internal 48.0kHz" };
1713
1714        return snd_ctl_enum_info(uinfo, 1, 4, texts);
1715}
1716static int
1717snd_rme32_get_clockmode_control(struct snd_kcontrol *kcontrol,
1718                                struct snd_ctl_elem_value *ucontrol)
1719{
1720        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1721
1722        spin_lock_irq(&rme32->lock);
1723        ucontrol->value.enumerated.item[0] = snd_rme32_getclockmode(rme32);
1724        spin_unlock_irq(&rme32->lock);
1725        return 0;
1726}
1727static int
1728snd_rme32_put_clockmode_control(struct snd_kcontrol *kcontrol,
1729                                struct snd_ctl_elem_value *ucontrol)
1730{
1731        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1732        unsigned int val;
1733        int change;
1734
1735        val = ucontrol->value.enumerated.item[0] % 3;
1736        spin_lock_irq(&rme32->lock);
1737        change = val != (unsigned int)snd_rme32_getclockmode(rme32);
1738        snd_rme32_setclockmode(rme32, val);
1739        spin_unlock_irq(&rme32->lock);
1740        return change;
1741}
1742
1743static u32 snd_rme32_convert_from_aes(struct snd_aes_iec958 * aes)
1744{
1745        u32 val = 0;
1746        val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME32_WCR_PRO : 0;
1747        if (val & RME32_WCR_PRO)
1748                val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1749        else
1750                val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1751        return val;
1752}
1753
1754static void snd_rme32_convert_to_aes(struct snd_aes_iec958 * aes, u32 val)
1755{
1756        aes->status[0] = ((val & RME32_WCR_PRO) ? IEC958_AES0_PROFESSIONAL : 0);
1757        if (val & RME32_WCR_PRO)
1758                aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1759        else
1760                aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1761}
1762
1763static int snd_rme32_control_spdif_info(struct snd_kcontrol *kcontrol,
1764                                        struct snd_ctl_elem_info *uinfo)
1765{
1766        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1767        uinfo->count = 1;
1768        return 0;
1769}
1770
1771static int snd_rme32_control_spdif_get(struct snd_kcontrol *kcontrol,
1772                                       struct snd_ctl_elem_value *ucontrol)
1773{
1774        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1775
1776        snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1777                                 rme32->wcreg_spdif);
1778        return 0;
1779}
1780
1781static int snd_rme32_control_spdif_put(struct snd_kcontrol *kcontrol,
1782                                       struct snd_ctl_elem_value *ucontrol)
1783{
1784        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1785        int change;
1786        u32 val;
1787
1788        val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1789        spin_lock_irq(&rme32->lock);
1790        change = val != rme32->wcreg_spdif;
1791        rme32->wcreg_spdif = val;
1792        spin_unlock_irq(&rme32->lock);
1793        return change;
1794}
1795
1796static int snd_rme32_control_spdif_stream_info(struct snd_kcontrol *kcontrol,
1797                                               struct snd_ctl_elem_info *uinfo)
1798{
1799        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1800        uinfo->count = 1;
1801        return 0;
1802}
1803
1804static int snd_rme32_control_spdif_stream_get(struct snd_kcontrol *kcontrol,
1805                                              struct snd_ctl_elem_value *
1806                                              ucontrol)
1807{
1808        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1809
1810        snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1811                                 rme32->wcreg_spdif_stream);
1812        return 0;
1813}
1814
1815static int snd_rme32_control_spdif_stream_put(struct snd_kcontrol *kcontrol,
1816                                              struct snd_ctl_elem_value *
1817                                              ucontrol)
1818{
1819        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1820        int change;
1821        u32 val;
1822
1823        val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1824        spin_lock_irq(&rme32->lock);
1825        change = val != rme32->wcreg_spdif_stream;
1826        rme32->wcreg_spdif_stream = val;
1827        rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1828        rme32->wcreg |= val;
1829        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1830        spin_unlock_irq(&rme32->lock);
1831        return change;
1832}
1833
1834static int snd_rme32_control_spdif_mask_info(struct snd_kcontrol *kcontrol,
1835                                             struct snd_ctl_elem_info *uinfo)
1836{
1837        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1838        uinfo->count = 1;
1839        return 0;
1840}
1841
1842static int snd_rme32_control_spdif_mask_get(struct snd_kcontrol *kcontrol,
1843                                            struct snd_ctl_elem_value *
1844                                            ucontrol)
1845{
1846        ucontrol->value.iec958.status[0] = kcontrol->private_value;
1847        return 0;
1848}
1849
1850static struct snd_kcontrol_new snd_rme32_controls[] = {
1851        {
1852                .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1853                .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1854                .info = snd_rme32_control_spdif_info,
1855                .get =  snd_rme32_control_spdif_get,
1856                .put =  snd_rme32_control_spdif_put
1857        },
1858        {
1859                .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1860                .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1861                .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1862                .info = snd_rme32_control_spdif_stream_info,
1863                .get =  snd_rme32_control_spdif_stream_get,
1864                .put =  snd_rme32_control_spdif_stream_put
1865        },
1866        {
1867                .access = SNDRV_CTL_ELEM_ACCESS_READ,
1868                .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1869                .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1870                .info = snd_rme32_control_spdif_mask_info,
1871                .get =  snd_rme32_control_spdif_mask_get,
1872                .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_CON_EMPHASIS
1873        },
1874        {
1875                .access = SNDRV_CTL_ELEM_ACCESS_READ,
1876                .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1877                .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1878                .info = snd_rme32_control_spdif_mask_info,
1879                .get =  snd_rme32_control_spdif_mask_get,
1880                .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_PRO_EMPHASIS
1881        },
1882        {
1883                .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1884                .name = "Input Connector",
1885                .info = snd_rme32_info_inputtype_control,
1886                .get =  snd_rme32_get_inputtype_control,
1887                .put =  snd_rme32_put_inputtype_control
1888        },
1889        {
1890                .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1891                .name = "Loopback Input",
1892                .info = snd_rme32_info_loopback_control,
1893                .get =  snd_rme32_get_loopback_control,
1894                .put =  snd_rme32_put_loopback_control
1895        },
1896        {
1897                .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1898                .name = "Sample Clock Source",
1899                .info = snd_rme32_info_clockmode_control,
1900                .get =  snd_rme32_get_clockmode_control,
1901                .put =  snd_rme32_put_clockmode_control
1902        }
1903};
1904
1905static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32)
1906{
1907        int idx, err;
1908        struct snd_kcontrol *kctl;
1909
1910        for (idx = 0; idx < (int)ARRAY_SIZE(snd_rme32_controls); idx++) {
1911                if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme32_controls[idx], rme32))) < 0)
1912                        return err;
1913                if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1914                        rme32->spdif_ctl = kctl;
1915        }
1916
1917        return 0;
1918}
1919
1920/*
1921 * Card initialisation
1922 */
1923
1924static void snd_rme32_card_free(struct snd_card *card)
1925{
1926        snd_rme32_free(card->private_data);
1927}
1928
1929static int
1930snd_rme32_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1931{
1932        static int dev;
1933        struct rme32 *rme32;
1934        struct snd_card *card;
1935        int err;
1936
1937        if (dev >= SNDRV_CARDS) {
1938                return -ENODEV;
1939        }
1940        if (!enable[dev]) {
1941                dev++;
1942                return -ENOENT;
1943        }
1944
1945        err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1946                           sizeof(struct rme32), &card);
1947        if (err < 0)
1948                return err;
1949        card->private_free = snd_rme32_card_free;
1950        rme32 = (struct rme32 *) card->private_data;
1951        rme32->card = card;
1952        rme32->pci = pci;
1953        if (fullduplex[dev])
1954                rme32->fullduplex_mode = 1;
1955        if ((err = snd_rme32_create(rme32)) < 0) {
1956                snd_card_free(card);
1957                return err;
1958        }
1959
1960        strcpy(card->driver, "Digi32");
1961        switch (rme32->pci->device) {
1962        case PCI_DEVICE_ID_RME_DIGI32:
1963                strcpy(card->shortname, "RME Digi32");
1964                break;
1965        case PCI_DEVICE_ID_RME_DIGI32_8:
1966                strcpy(card->shortname, "RME Digi32/8");
1967                break;
1968        case PCI_DEVICE_ID_RME_DIGI32_PRO:
1969                strcpy(card->shortname, "RME Digi32 PRO");
1970                break;
1971        }
1972        sprintf(card->longname, "%s (Rev. %d) at 0x%lx, irq %d",
1973                card->shortname, rme32->rev, rme32->port, rme32->irq);
1974
1975        if ((err = snd_card_register(card)) < 0) {
1976                snd_card_free(card);
1977                return err;
1978        }
1979        pci_set_drvdata(pci, card);
1980        dev++;
1981        return 0;
1982}
1983
1984static void snd_rme32_remove(struct pci_dev *pci)
1985{
1986        snd_card_free(pci_get_drvdata(pci));
1987}
1988
1989static struct pci_driver rme32_driver = {
1990        .name =         KBUILD_MODNAME,
1991        .id_table =     snd_rme32_ids,
1992        .probe =        snd_rme32_probe,
1993        .remove =       snd_rme32_remove,
1994};
1995
1996module_pci_driver(rme32_driver);
1997