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22#include <linux/pci.h>
23#include <linux/pm_runtime.h>
24#include <linux/delay.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include "skl.h"
28#include "skl-topology.h"
29#include "skl-sst-dsp.h"
30#include "skl-sst-ipc.h"
31
32#define HDA_MONO 1
33#define HDA_STEREO 2
34#define HDA_QUAD 4
35
36static const struct snd_pcm_hardware azx_pcm_hw = {
37 .info = (SNDRV_PCM_INFO_MMAP |
38 SNDRV_PCM_INFO_INTERLEAVED |
39 SNDRV_PCM_INFO_BLOCK_TRANSFER |
40 SNDRV_PCM_INFO_MMAP_VALID |
41 SNDRV_PCM_INFO_PAUSE |
42 SNDRV_PCM_INFO_RESUME |
43 SNDRV_PCM_INFO_SYNC_START |
44 SNDRV_PCM_INFO_HAS_WALL_CLOCK |
45 SNDRV_PCM_INFO_HAS_LINK_ATIME |
46 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
47 .formats = SNDRV_PCM_FMTBIT_S16_LE |
48 SNDRV_PCM_FMTBIT_S32_LE |
49 SNDRV_PCM_FMTBIT_S24_LE,
50 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
51 SNDRV_PCM_RATE_8000,
52 .rate_min = 8000,
53 .rate_max = 48000,
54 .channels_min = 1,
55 .channels_max = 8,
56 .buffer_bytes_max = AZX_MAX_BUF_SIZE,
57 .period_bytes_min = 128,
58 .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
59 .periods_min = 2,
60 .periods_max = AZX_MAX_FRAG,
61 .fifo_size = 0,
62};
63
64static inline
65struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
66{
67 return substream->runtime->private_data;
68}
69
70static struct hdac_ext_bus *get_bus_ctx(struct snd_pcm_substream *substream)
71{
72 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
73 struct hdac_stream *hstream = hdac_stream(stream);
74 struct hdac_bus *bus = hstream->bus;
75
76 return hbus_to_ebus(bus);
77}
78
79static int skl_substream_alloc_pages(struct hdac_ext_bus *ebus,
80 struct snd_pcm_substream *substream,
81 size_t size)
82{
83 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
84
85 hdac_stream(stream)->bufsize = 0;
86 hdac_stream(stream)->period_bytes = 0;
87 hdac_stream(stream)->format_val = 0;
88
89 return snd_pcm_lib_malloc_pages(substream, size);
90}
91
92static int skl_substream_free_pages(struct hdac_bus *bus,
93 struct snd_pcm_substream *substream)
94{
95 return snd_pcm_lib_free_pages(substream);
96}
97
98static void skl_set_pcm_constrains(struct hdac_ext_bus *ebus,
99 struct snd_pcm_runtime *runtime)
100{
101 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
102
103
104 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
105 20, 178000000);
106}
107
108static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_ext_bus *ebus)
109{
110 if ((ebus_to_hbus(ebus))->ppcap)
111 return HDAC_EXT_STREAM_TYPE_HOST;
112 else
113 return HDAC_EXT_STREAM_TYPE_COUPLED;
114}
115
116
117
118
119
120
121
122
123static void skl_set_suspend_active(struct snd_pcm_substream *substream,
124 struct snd_soc_dai *dai, bool enable)
125{
126 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
127 struct snd_soc_dapm_widget *w;
128 struct skl *skl = ebus_to_skl(ebus);
129
130 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
131 w = dai->playback_widget;
132 else
133 w = dai->capture_widget;
134
135 if (w->ignore_suspend && enable)
136 skl->supend_active++;
137 else if (w->ignore_suspend && !enable)
138 skl->supend_active--;
139}
140
141int skl_pcm_host_dma_prepare(struct device *dev, struct skl_pipe_params *params)
142{
143 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
144 struct hdac_bus *bus = ebus_to_hbus(ebus);
145 unsigned int format_val;
146 struct hdac_stream *hstream;
147 struct hdac_ext_stream *stream;
148 int err;
149
150 hstream = snd_hdac_get_stream(bus, params->stream,
151 params->host_dma_id + 1);
152 if (!hstream)
153 return -EINVAL;
154
155 stream = stream_to_hdac_ext_stream(hstream);
156 snd_hdac_ext_stream_decouple(ebus, stream, true);
157
158 format_val = snd_hdac_calc_stream_format(params->s_freq,
159 params->ch, params->format, params->host_bps, 0);
160
161 dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
162 format_val, params->s_freq, params->ch, params->format);
163
164 snd_hdac_stream_reset(hdac_stream(stream));
165 err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
166 if (err < 0)
167 return err;
168
169 err = snd_hdac_stream_setup(hdac_stream(stream));
170 if (err < 0)
171 return err;
172
173 hdac_stream(stream)->prepared = 1;
174
175 return 0;
176}
177
178int skl_pcm_link_dma_prepare(struct device *dev, struct skl_pipe_params *params)
179{
180 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
181 struct hdac_bus *bus = ebus_to_hbus(ebus);
182 unsigned int format_val;
183 struct hdac_stream *hstream;
184 struct hdac_ext_stream *stream;
185 struct hdac_ext_link *link;
186
187 hstream = snd_hdac_get_stream(bus, params->stream,
188 params->link_dma_id + 1);
189 if (!hstream)
190 return -EINVAL;
191
192 stream = stream_to_hdac_ext_stream(hstream);
193 snd_hdac_ext_stream_decouple(ebus, stream, true);
194 format_val = snd_hdac_calc_stream_format(params->s_freq, params->ch,
195 params->format, params->link_bps, 0);
196
197 dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
198 format_val, params->s_freq, params->ch, params->format);
199
200 snd_hdac_ext_link_stream_reset(stream);
201
202 snd_hdac_ext_link_stream_setup(stream, format_val);
203
204 list_for_each_entry(link, &ebus->hlink_list, list) {
205 if (link->index == params->link_index)
206 snd_hdac_ext_link_set_stream_id(link,
207 hstream->stream_tag);
208 }
209
210 stream->link_prepared = 1;
211
212 return 0;
213}
214
215static int skl_pcm_open(struct snd_pcm_substream *substream,
216 struct snd_soc_dai *dai)
217{
218 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
219 struct hdac_ext_stream *stream;
220 struct snd_pcm_runtime *runtime = substream->runtime;
221 struct skl_dma_params *dma_params;
222 struct skl *skl = get_skl_ctx(dai->dev);
223 struct skl_module_cfg *mconfig;
224
225 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
226
227 stream = snd_hdac_ext_stream_assign(ebus, substream,
228 skl_get_host_stream_type(ebus));
229 if (stream == NULL)
230 return -EBUSY;
231
232 skl_set_pcm_constrains(ebus, runtime);
233
234
235
236
237
238 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
239 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK;
240 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
241 }
242
243 runtime->private_data = stream;
244
245 dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
246 if (!dma_params)
247 return -ENOMEM;
248
249 dma_params->stream_tag = hdac_stream(stream)->stream_tag;
250 snd_soc_dai_set_dma_data(dai, substream, dma_params);
251
252 dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
253 dma_params->stream_tag);
254 skl_set_suspend_active(substream, dai, true);
255 snd_pcm_set_sync(substream);
256
257 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
258 if (!mconfig)
259 return -EINVAL;
260
261 skl_tplg_d0i3_get(skl, mconfig->d0i3_caps);
262
263 return 0;
264}
265
266static int skl_pcm_prepare(struct snd_pcm_substream *substream,
267 struct snd_soc_dai *dai)
268{
269 struct skl *skl = get_skl_ctx(dai->dev);
270 struct skl_module_cfg *mconfig;
271
272 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
273
274 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
275
276
277 if (mconfig && (substream->runtime->status->state ==
278 SNDRV_PCM_STATE_XRUN))
279 skl_reset_pipe(skl->skl_sst, mconfig->pipe);
280
281 return 0;
282}
283
284static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
285 struct snd_pcm_hw_params *params,
286 struct snd_soc_dai *dai)
287{
288 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
289 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
290 struct snd_pcm_runtime *runtime = substream->runtime;
291 struct skl_pipe_params p_params = {0};
292 struct skl_module_cfg *m_cfg;
293 int ret, dma_id;
294
295 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
296 ret = skl_substream_alloc_pages(ebus, substream,
297 params_buffer_bytes(params));
298 if (ret < 0)
299 return ret;
300
301 dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
302 runtime->rate, runtime->channels, runtime->format);
303
304 dma_id = hdac_stream(stream)->stream_tag - 1;
305 dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
306
307 p_params.s_fmt = snd_pcm_format_width(params_format(params));
308 p_params.ch = params_channels(params);
309 p_params.s_freq = params_rate(params);
310 p_params.host_dma_id = dma_id;
311 p_params.stream = substream->stream;
312 p_params.format = params_format(params);
313 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
314 p_params.host_bps = dai->driver->playback.sig_bits;
315 else
316 p_params.host_bps = dai->driver->capture.sig_bits;
317
318
319 m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
320 if (m_cfg)
321 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
322
323 return 0;
324}
325
326static void skl_pcm_close(struct snd_pcm_substream *substream,
327 struct snd_soc_dai *dai)
328{
329 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
330 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
331 struct skl_dma_params *dma_params = NULL;
332 struct skl *skl = ebus_to_skl(ebus);
333 struct skl_module_cfg *mconfig;
334
335 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
336
337 snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(ebus));
338
339 dma_params = snd_soc_dai_get_dma_data(dai, substream);
340
341
342
343
344 snd_soc_dai_set_dma_data(dai, substream, NULL);
345 skl_set_suspend_active(substream, dai, false);
346
347
348
349
350
351 if (!strncmp(dai->name, "Reference Pin", 13) &&
352 skl->skl_sst->miscbdcg_disabled) {
353 skl->skl_sst->enable_miscbdcge(dai->dev, true);
354 skl->skl_sst->miscbdcg_disabled = false;
355 }
356
357 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
358 skl_tplg_d0i3_put(skl, mconfig->d0i3_caps);
359
360 kfree(dma_params);
361}
362
363static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
364 struct snd_soc_dai *dai)
365{
366 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
367 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
368
369 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
370
371 snd_hdac_stream_cleanup(hdac_stream(stream));
372 hdac_stream(stream)->prepared = 0;
373
374 return skl_substream_free_pages(ebus_to_hbus(ebus), substream);
375}
376
377static int skl_be_hw_params(struct snd_pcm_substream *substream,
378 struct snd_pcm_hw_params *params,
379 struct snd_soc_dai *dai)
380{
381 struct skl_pipe_params p_params = {0};
382
383 p_params.s_fmt = snd_pcm_format_width(params_format(params));
384 p_params.ch = params_channels(params);
385 p_params.s_freq = params_rate(params);
386 p_params.stream = substream->stream;
387
388 return skl_tplg_be_update_params(dai, &p_params);
389}
390
391static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
392 int cmd)
393{
394 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
395 struct hdac_bus *bus = ebus_to_hbus(ebus);
396 struct hdac_ext_stream *stream;
397 int start;
398 unsigned long cookie;
399 struct hdac_stream *hstr;
400
401 stream = get_hdac_ext_stream(substream);
402 hstr = hdac_stream(stream);
403
404 if (!hstr->prepared)
405 return -EPIPE;
406
407 switch (cmd) {
408 case SNDRV_PCM_TRIGGER_START:
409 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
410 case SNDRV_PCM_TRIGGER_RESUME:
411 start = 1;
412 break;
413
414 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
415 case SNDRV_PCM_TRIGGER_SUSPEND:
416 case SNDRV_PCM_TRIGGER_STOP:
417 start = 0;
418 break;
419
420 default:
421 return -EINVAL;
422 }
423
424 spin_lock_irqsave(&bus->reg_lock, cookie);
425
426 if (start) {
427 snd_hdac_stream_start(hdac_stream(stream), true);
428 snd_hdac_stream_timecounter_init(hstr, 0);
429 } else {
430 snd_hdac_stream_stop(hdac_stream(stream));
431 }
432
433 spin_unlock_irqrestore(&bus->reg_lock, cookie);
434
435 return 0;
436}
437
438static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
439 struct snd_soc_dai *dai)
440{
441 struct skl *skl = get_skl_ctx(dai->dev);
442 struct skl_sst *ctx = skl->skl_sst;
443 struct skl_module_cfg *mconfig;
444 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
445 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
446 struct snd_soc_dapm_widget *w;
447 int ret;
448
449 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
450 if (!mconfig)
451 return -EIO;
452
453 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
454 w = dai->playback_widget;
455 else
456 w = dai->capture_widget;
457
458 switch (cmd) {
459 case SNDRV_PCM_TRIGGER_RESUME:
460 if (!w->ignore_suspend) {
461
462
463
464
465
466 snd_hdac_ext_stream_drsm_enable(ebus, true,
467 hdac_stream(stream)->index);
468 snd_hdac_ext_stream_set_dpibr(ebus, stream,
469 stream->lpib);
470 snd_hdac_ext_stream_set_lpib(stream, stream->lpib);
471 }
472
473 case SNDRV_PCM_TRIGGER_START:
474 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
475
476
477
478
479
480
481 ret = skl_decoupled_trigger(substream, cmd);
482 if (ret < 0)
483 return ret;
484 return skl_run_pipe(ctx, mconfig->pipe);
485 break;
486
487 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
488 case SNDRV_PCM_TRIGGER_SUSPEND:
489 case SNDRV_PCM_TRIGGER_STOP:
490
491
492
493
494
495 ret = skl_stop_pipe(ctx, mconfig->pipe);
496 if (ret < 0)
497 return ret;
498
499 ret = skl_decoupled_trigger(substream, cmd);
500 if ((cmd == SNDRV_PCM_TRIGGER_SUSPEND) && !w->ignore_suspend) {
501
502 stream->dpib = readl(ebus->bus.remap_addr +
503 AZX_REG_VS_SDXDPIB_XBASE +
504 (AZX_REG_VS_SDXDPIB_XINTERVAL *
505 hdac_stream(stream)->index));
506
507 stream->lpib = snd_hdac_stream_get_pos_lpib(
508 hdac_stream(stream));
509 snd_hdac_ext_stream_decouple(ebus, stream, false);
510 }
511 break;
512
513 default:
514 return -EINVAL;
515 }
516
517 return 0;
518}
519
520static int skl_link_hw_params(struct snd_pcm_substream *substream,
521 struct snd_pcm_hw_params *params,
522 struct snd_soc_dai *dai)
523{
524 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
525 struct hdac_ext_stream *link_dev;
526 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
527 struct snd_soc_dai *codec_dai = rtd->codec_dai;
528 struct skl_pipe_params p_params = {0};
529 struct hdac_ext_link *link;
530 int stream_tag;
531
532 link_dev = snd_hdac_ext_stream_assign(ebus, substream,
533 HDAC_EXT_STREAM_TYPE_LINK);
534 if (!link_dev)
535 return -EBUSY;
536
537 snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
538
539 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
540 if (!link)
541 return -EINVAL;
542
543 stream_tag = hdac_stream(link_dev)->stream_tag;
544
545
546 snd_soc_dai_set_tdm_slot(codec_dai, stream_tag, 0, 0, 0);
547
548 p_params.s_fmt = snd_pcm_format_width(params_format(params));
549 p_params.ch = params_channels(params);
550 p_params.s_freq = params_rate(params);
551 p_params.stream = substream->stream;
552 p_params.link_dma_id = stream_tag - 1;
553 p_params.link_index = link->index;
554 p_params.format = params_format(params);
555
556 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
557 p_params.link_bps = codec_dai->driver->playback.sig_bits;
558 else
559 p_params.link_bps = codec_dai->driver->capture.sig_bits;
560
561 return skl_tplg_be_update_params(dai, &p_params);
562}
563
564static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
565 struct snd_soc_dai *dai)
566{
567 struct skl *skl = get_skl_ctx(dai->dev);
568 struct skl_module_cfg *mconfig = NULL;
569
570
571 mconfig = skl_tplg_be_get_cpr_module(dai, substream->stream);
572 if (mconfig && !mconfig->pipe->passthru &&
573 (substream->runtime->status->state == SNDRV_PCM_STATE_XRUN))
574 skl_reset_pipe(skl->skl_sst, mconfig->pipe);
575
576 return 0;
577}
578
579static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
580 int cmd, struct snd_soc_dai *dai)
581{
582 struct hdac_ext_stream *link_dev =
583 snd_soc_dai_get_dma_data(dai, substream);
584 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
585 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
586
587 dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
588 switch (cmd) {
589 case SNDRV_PCM_TRIGGER_RESUME:
590 case SNDRV_PCM_TRIGGER_START:
591 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
592 snd_hdac_ext_link_stream_start(link_dev);
593 break;
594
595 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
596 case SNDRV_PCM_TRIGGER_SUSPEND:
597 case SNDRV_PCM_TRIGGER_STOP:
598 snd_hdac_ext_link_stream_clear(link_dev);
599 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND)
600 snd_hdac_ext_stream_decouple(ebus, stream, false);
601 break;
602
603 default:
604 return -EINVAL;
605 }
606 return 0;
607}
608
609static int skl_link_hw_free(struct snd_pcm_substream *substream,
610 struct snd_soc_dai *dai)
611{
612 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
613 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
614 struct hdac_ext_stream *link_dev =
615 snd_soc_dai_get_dma_data(dai, substream);
616 struct hdac_ext_link *link;
617
618 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
619
620 link_dev->link_prepared = 0;
621
622 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
623 if (!link)
624 return -EINVAL;
625
626 snd_hdac_ext_link_clear_stream_id(link, hdac_stream(link_dev)->stream_tag);
627 snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
628 return 0;
629}
630
631static const struct snd_soc_dai_ops skl_pcm_dai_ops = {
632 .startup = skl_pcm_open,
633 .shutdown = skl_pcm_close,
634 .prepare = skl_pcm_prepare,
635 .hw_params = skl_pcm_hw_params,
636 .hw_free = skl_pcm_hw_free,
637 .trigger = skl_pcm_trigger,
638};
639
640static const struct snd_soc_dai_ops skl_dmic_dai_ops = {
641 .hw_params = skl_be_hw_params,
642};
643
644static const struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
645 .hw_params = skl_be_hw_params,
646};
647
648static const struct snd_soc_dai_ops skl_link_dai_ops = {
649 .prepare = skl_link_pcm_prepare,
650 .hw_params = skl_link_hw_params,
651 .hw_free = skl_link_hw_free,
652 .trigger = skl_link_pcm_trigger,
653};
654
655static struct snd_soc_dai_driver skl_platform_dai[] = {
656{
657 .name = "System Pin",
658 .ops = &skl_pcm_dai_ops,
659 .playback = {
660 .stream_name = "System Playback",
661 .channels_min = HDA_MONO,
662 .channels_max = HDA_STEREO,
663 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
664 .formats = SNDRV_PCM_FMTBIT_S16_LE |
665 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
666 .sig_bits = 32,
667 },
668 .capture = {
669 .stream_name = "System Capture",
670 .channels_min = HDA_MONO,
671 .channels_max = HDA_STEREO,
672 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
673 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
674 .sig_bits = 32,
675 },
676},
677{
678 .name = "System Pin2",
679 .ops = &skl_pcm_dai_ops,
680 .playback = {
681 .stream_name = "Headset Playback",
682 .channels_min = HDA_MONO,
683 .channels_max = HDA_STEREO,
684 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
685 SNDRV_PCM_RATE_8000,
686 .formats = SNDRV_PCM_FMTBIT_S16_LE |
687 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
688 },
689},
690{
691 .name = "Echoref Pin",
692 .ops = &skl_pcm_dai_ops,
693 .capture = {
694 .stream_name = "Echoreference Capture",
695 .channels_min = HDA_STEREO,
696 .channels_max = HDA_STEREO,
697 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
698 SNDRV_PCM_RATE_8000,
699 .formats = SNDRV_PCM_FMTBIT_S16_LE |
700 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
701 },
702},
703{
704 .name = "Reference Pin",
705 .ops = &skl_pcm_dai_ops,
706 .capture = {
707 .stream_name = "Reference Capture",
708 .channels_min = HDA_MONO,
709 .channels_max = HDA_QUAD,
710 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
711 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
712 .sig_bits = 32,
713 },
714},
715{
716 .name = "Deepbuffer Pin",
717 .ops = &skl_pcm_dai_ops,
718 .playback = {
719 .stream_name = "Deepbuffer Playback",
720 .channels_min = HDA_STEREO,
721 .channels_max = HDA_STEREO,
722 .rates = SNDRV_PCM_RATE_48000,
723 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
724 .sig_bits = 32,
725 },
726},
727{
728 .name = "LowLatency Pin",
729 .ops = &skl_pcm_dai_ops,
730 .playback = {
731 .stream_name = "Low Latency Playback",
732 .channels_min = HDA_STEREO,
733 .channels_max = HDA_STEREO,
734 .rates = SNDRV_PCM_RATE_48000,
735 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
736 .sig_bits = 32,
737 },
738},
739{
740 .name = "DMIC Pin",
741 .ops = &skl_pcm_dai_ops,
742 .capture = {
743 .stream_name = "DMIC Capture",
744 .channels_min = HDA_MONO,
745 .channels_max = HDA_QUAD,
746 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
747 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
748 .sig_bits = 32,
749 },
750},
751{
752 .name = "HDMI1 Pin",
753 .ops = &skl_pcm_dai_ops,
754 .playback = {
755 .stream_name = "HDMI1 Playback",
756 .channels_min = HDA_STEREO,
757 .channels_max = 8,
758 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
759 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
760 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
761 SNDRV_PCM_RATE_192000,
762 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
763 SNDRV_PCM_FMTBIT_S32_LE,
764 .sig_bits = 32,
765 },
766},
767{
768 .name = "HDMI2 Pin",
769 .ops = &skl_pcm_dai_ops,
770 .playback = {
771 .stream_name = "HDMI2 Playback",
772 .channels_min = HDA_STEREO,
773 .channels_max = 8,
774 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
775 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
776 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
777 SNDRV_PCM_RATE_192000,
778 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
779 SNDRV_PCM_FMTBIT_S32_LE,
780 .sig_bits = 32,
781 },
782},
783{
784 .name = "HDMI3 Pin",
785 .ops = &skl_pcm_dai_ops,
786 .playback = {
787 .stream_name = "HDMI3 Playback",
788 .channels_min = HDA_STEREO,
789 .channels_max = 8,
790 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
791 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
792 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
793 SNDRV_PCM_RATE_192000,
794 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
795 SNDRV_PCM_FMTBIT_S32_LE,
796 .sig_bits = 32,
797 },
798},
799
800
801{
802 .name = "SSP0 Pin",
803 .ops = &skl_be_ssp_dai_ops,
804 .playback = {
805 .stream_name = "ssp0 Tx",
806 .channels_min = HDA_STEREO,
807 .channels_max = HDA_STEREO,
808 .rates = SNDRV_PCM_RATE_48000,
809 .formats = SNDRV_PCM_FMTBIT_S16_LE,
810 },
811 .capture = {
812 .stream_name = "ssp0 Rx",
813 .channels_min = HDA_STEREO,
814 .channels_max = HDA_STEREO,
815 .rates = SNDRV_PCM_RATE_48000,
816 .formats = SNDRV_PCM_FMTBIT_S16_LE,
817 },
818},
819{
820 .name = "SSP1 Pin",
821 .ops = &skl_be_ssp_dai_ops,
822 .playback = {
823 .stream_name = "ssp1 Tx",
824 .channels_min = HDA_STEREO,
825 .channels_max = HDA_STEREO,
826 .rates = SNDRV_PCM_RATE_48000,
827 .formats = SNDRV_PCM_FMTBIT_S16_LE,
828 },
829 .capture = {
830 .stream_name = "ssp1 Rx",
831 .channels_min = HDA_STEREO,
832 .channels_max = HDA_STEREO,
833 .rates = SNDRV_PCM_RATE_48000,
834 .formats = SNDRV_PCM_FMTBIT_S16_LE,
835 },
836},
837{
838 .name = "SSP2 Pin",
839 .ops = &skl_be_ssp_dai_ops,
840 .playback = {
841 .stream_name = "ssp2 Tx",
842 .channels_min = HDA_STEREO,
843 .channels_max = HDA_STEREO,
844 .rates = SNDRV_PCM_RATE_48000,
845 .formats = SNDRV_PCM_FMTBIT_S16_LE,
846 },
847 .capture = {
848 .stream_name = "ssp2 Rx",
849 .channels_min = HDA_STEREO,
850 .channels_max = HDA_STEREO,
851 .rates = SNDRV_PCM_RATE_48000,
852 .formats = SNDRV_PCM_FMTBIT_S16_LE,
853 },
854},
855{
856 .name = "SSP3 Pin",
857 .ops = &skl_be_ssp_dai_ops,
858 .playback = {
859 .stream_name = "ssp3 Tx",
860 .channels_min = HDA_STEREO,
861 .channels_max = HDA_STEREO,
862 .rates = SNDRV_PCM_RATE_48000,
863 .formats = SNDRV_PCM_FMTBIT_S16_LE,
864 },
865 .capture = {
866 .stream_name = "ssp3 Rx",
867 .channels_min = HDA_STEREO,
868 .channels_max = HDA_STEREO,
869 .rates = SNDRV_PCM_RATE_48000,
870 .formats = SNDRV_PCM_FMTBIT_S16_LE,
871 },
872},
873{
874 .name = "SSP4 Pin",
875 .ops = &skl_be_ssp_dai_ops,
876 .playback = {
877 .stream_name = "ssp4 Tx",
878 .channels_min = HDA_STEREO,
879 .channels_max = HDA_STEREO,
880 .rates = SNDRV_PCM_RATE_48000,
881 .formats = SNDRV_PCM_FMTBIT_S16_LE,
882 },
883 .capture = {
884 .stream_name = "ssp4 Rx",
885 .channels_min = HDA_STEREO,
886 .channels_max = HDA_STEREO,
887 .rates = SNDRV_PCM_RATE_48000,
888 .formats = SNDRV_PCM_FMTBIT_S16_LE,
889 },
890},
891{
892 .name = "SSP5 Pin",
893 .ops = &skl_be_ssp_dai_ops,
894 .playback = {
895 .stream_name = "ssp5 Tx",
896 .channels_min = HDA_STEREO,
897 .channels_max = HDA_STEREO,
898 .rates = SNDRV_PCM_RATE_48000,
899 .formats = SNDRV_PCM_FMTBIT_S16_LE,
900 },
901 .capture = {
902 .stream_name = "ssp5 Rx",
903 .channels_min = HDA_STEREO,
904 .channels_max = HDA_STEREO,
905 .rates = SNDRV_PCM_RATE_48000,
906 .formats = SNDRV_PCM_FMTBIT_S16_LE,
907 },
908},
909{
910 .name = "iDisp1 Pin",
911 .ops = &skl_link_dai_ops,
912 .playback = {
913 .stream_name = "iDisp1 Tx",
914 .channels_min = HDA_STEREO,
915 .channels_max = 8,
916 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
917 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
918 SNDRV_PCM_FMTBIT_S24_LE,
919 },
920},
921{
922 .name = "iDisp2 Pin",
923 .ops = &skl_link_dai_ops,
924 .playback = {
925 .stream_name = "iDisp2 Tx",
926 .channels_min = HDA_STEREO,
927 .channels_max = 8,
928 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
929 SNDRV_PCM_RATE_48000,
930 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
931 SNDRV_PCM_FMTBIT_S24_LE,
932 },
933},
934{
935 .name = "iDisp3 Pin",
936 .ops = &skl_link_dai_ops,
937 .playback = {
938 .stream_name = "iDisp3 Tx",
939 .channels_min = HDA_STEREO,
940 .channels_max = 8,
941 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
942 SNDRV_PCM_RATE_48000,
943 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
944 SNDRV_PCM_FMTBIT_S24_LE,
945 },
946},
947{
948 .name = "DMIC01 Pin",
949 .ops = &skl_dmic_dai_ops,
950 .capture = {
951 .stream_name = "DMIC01 Rx",
952 .channels_min = HDA_MONO,
953 .channels_max = HDA_QUAD,
954 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
955 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
956 },
957},
958{
959 .name = "HD-Codec Pin",
960 .ops = &skl_link_dai_ops,
961 .playback = {
962 .stream_name = "HD-Codec Tx",
963 .channels_min = HDA_STEREO,
964 .channels_max = HDA_STEREO,
965 .rates = SNDRV_PCM_RATE_48000,
966 .formats = SNDRV_PCM_FMTBIT_S16_LE,
967 },
968 .capture = {
969 .stream_name = "HD-Codec Rx",
970 .channels_min = HDA_STEREO,
971 .channels_max = HDA_STEREO,
972 .rates = SNDRV_PCM_RATE_48000,
973 .formats = SNDRV_PCM_FMTBIT_S16_LE,
974 },
975},
976};
977
978static int skl_platform_open(struct snd_pcm_substream *substream)
979{
980 struct snd_soc_pcm_runtime *rtd = substream->private_data;
981 struct snd_soc_dai_link *dai_link = rtd->dai_link;
982
983 dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
984 dai_link->cpu_dai_name);
985
986 snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
987
988 return 0;
989}
990
991static int skl_coupled_trigger(struct snd_pcm_substream *substream,
992 int cmd)
993{
994 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
995 struct hdac_bus *bus = ebus_to_hbus(ebus);
996 struct hdac_ext_stream *stream;
997 struct snd_pcm_substream *s;
998 bool start;
999 int sbits = 0;
1000 unsigned long cookie;
1001 struct hdac_stream *hstr;
1002
1003 stream = get_hdac_ext_stream(substream);
1004 hstr = hdac_stream(stream);
1005
1006 dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
1007
1008 if (!hstr->prepared)
1009 return -EPIPE;
1010
1011 switch (cmd) {
1012 case SNDRV_PCM_TRIGGER_START:
1013 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1014 case SNDRV_PCM_TRIGGER_RESUME:
1015 start = true;
1016 break;
1017
1018 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1019 case SNDRV_PCM_TRIGGER_SUSPEND:
1020 case SNDRV_PCM_TRIGGER_STOP:
1021 start = false;
1022 break;
1023
1024 default:
1025 return -EINVAL;
1026 }
1027
1028 snd_pcm_group_for_each_entry(s, substream) {
1029 if (s->pcm->card != substream->pcm->card)
1030 continue;
1031 stream = get_hdac_ext_stream(s);
1032 sbits |= 1 << hdac_stream(stream)->index;
1033 snd_pcm_trigger_done(s, substream);
1034 }
1035
1036 spin_lock_irqsave(&bus->reg_lock, cookie);
1037
1038
1039 snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
1040
1041 snd_pcm_group_for_each_entry(s, substream) {
1042 if (s->pcm->card != substream->pcm->card)
1043 continue;
1044 stream = get_hdac_ext_stream(s);
1045 if (start)
1046 snd_hdac_stream_start(hdac_stream(stream), true);
1047 else
1048 snd_hdac_stream_stop(hdac_stream(stream));
1049 }
1050 spin_unlock_irqrestore(&bus->reg_lock, cookie);
1051
1052 snd_hdac_stream_sync(hstr, start, sbits);
1053
1054 spin_lock_irqsave(&bus->reg_lock, cookie);
1055
1056
1057 snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
1058 if (start)
1059 snd_hdac_stream_timecounter_init(hstr, sbits);
1060 spin_unlock_irqrestore(&bus->reg_lock, cookie);
1061
1062 return 0;
1063}
1064
1065static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
1066 int cmd)
1067{
1068 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
1069
1070 if (!(ebus_to_hbus(ebus))->ppcap)
1071 return skl_coupled_trigger(substream, cmd);
1072
1073 return 0;
1074}
1075
1076static snd_pcm_uframes_t skl_platform_pcm_pointer
1077 (struct snd_pcm_substream *substream)
1078{
1079 struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
1080 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
1081 unsigned int pos;
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1105 pos = readl(ebus->bus.remap_addr + AZX_REG_VS_SDXDPIB_XBASE +
1106 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1107 hdac_stream(hstream)->index));
1108 } else {
1109 udelay(20);
1110 readl(ebus->bus.remap_addr +
1111 AZX_REG_VS_SDXDPIB_XBASE +
1112 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1113 hdac_stream(hstream)->index));
1114 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
1115 }
1116
1117 if (pos >= hdac_stream(hstream)->bufsize)
1118 pos = 0;
1119
1120 return bytes_to_frames(substream->runtime, pos);
1121}
1122
1123static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
1124 u64 nsec)
1125{
1126 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
1127 struct snd_soc_dai *codec_dai = rtd->codec_dai;
1128 u64 codec_frames, codec_nsecs;
1129
1130 if (!codec_dai->driver->ops->delay)
1131 return nsec;
1132
1133 codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
1134 codec_nsecs = div_u64(codec_frames * 1000000000LL,
1135 substream->runtime->rate);
1136
1137 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1138 return nsec + codec_nsecs;
1139
1140 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
1141}
1142
1143static int skl_get_time_info(struct snd_pcm_substream *substream,
1144 struct timespec *system_ts, struct timespec *audio_ts,
1145 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
1146 struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
1147{
1148 struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
1149 struct hdac_stream *hstr = hdac_stream(sstream);
1150 u64 nsec;
1151
1152 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
1153 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
1154
1155 snd_pcm_gettime(substream->runtime, system_ts);
1156
1157 nsec = timecounter_read(&hstr->tc);
1158 nsec = div_u64(nsec, 3);
1159 if (audio_tstamp_config->report_delay)
1160 nsec = skl_adjust_codec_delay(substream, nsec);
1161
1162 *audio_ts = ns_to_timespec(nsec);
1163
1164 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
1165 audio_tstamp_report->accuracy_report = 1;
1166 audio_tstamp_report->accuracy = 42;
1167
1168 } else {
1169 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
1170 }
1171
1172 return 0;
1173}
1174
1175static const struct snd_pcm_ops skl_platform_ops = {
1176 .open = skl_platform_open,
1177 .ioctl = snd_pcm_lib_ioctl,
1178 .trigger = skl_platform_pcm_trigger,
1179 .pointer = skl_platform_pcm_pointer,
1180 .get_time_info = skl_get_time_info,
1181 .mmap = snd_pcm_lib_default_mmap,
1182 .page = snd_pcm_sgbuf_ops_page,
1183};
1184
1185static void skl_pcm_free(struct snd_pcm *pcm)
1186{
1187 snd_pcm_lib_preallocate_free_for_all(pcm);
1188}
1189
1190#define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
1191
1192static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
1193{
1194 struct snd_soc_dai *dai = rtd->cpu_dai;
1195 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
1196 struct snd_pcm *pcm = rtd->pcm;
1197 unsigned int size;
1198 int retval = 0;
1199 struct skl *skl = ebus_to_skl(ebus);
1200
1201 if (dai->driver->playback.channels_min ||
1202 dai->driver->capture.channels_min) {
1203
1204 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
1205 if (size > MAX_PREALLOC_SIZE)
1206 size = MAX_PREALLOC_SIZE;
1207 retval = snd_pcm_lib_preallocate_pages_for_all(pcm,
1208 SNDRV_DMA_TYPE_DEV_SG,
1209 snd_dma_pci_data(skl->pci),
1210 size, MAX_PREALLOC_SIZE);
1211 if (retval) {
1212 dev_err(dai->dev, "dma buffer allocation fail\n");
1213 return retval;
1214 }
1215 }
1216
1217 return retval;
1218}
1219
1220static int skl_get_module_info(struct skl *skl, struct skl_module_cfg *mconfig)
1221{
1222 struct skl_sst *ctx = skl->skl_sst;
1223 struct skl_module_inst_id *pin_id;
1224 uuid_le *uuid_mod, *uuid_tplg;
1225 struct skl_module *skl_module;
1226 struct uuid_module *module;
1227 int i, ret = -EIO;
1228
1229 uuid_mod = (uuid_le *)mconfig->guid;
1230
1231 if (list_empty(&ctx->uuid_list)) {
1232 dev_err(ctx->dev, "Module list is empty\n");
1233 return -EIO;
1234 }
1235
1236 list_for_each_entry(module, &ctx->uuid_list, list) {
1237 if (uuid_le_cmp(*uuid_mod, module->uuid) == 0) {
1238 mconfig->id.module_id = module->id;
1239 if (mconfig->module)
1240 mconfig->module->loadable = module->is_loadable;
1241 ret = 0;
1242 break;
1243 }
1244 }
1245
1246 if (ret)
1247 return ret;
1248
1249 uuid_mod = &module->uuid;
1250 ret = -EIO;
1251 for (i = 0; i < skl->nr_modules; i++) {
1252 skl_module = skl->modules[i];
1253 uuid_tplg = &skl_module->uuid;
1254 if (!uuid_le_cmp(*uuid_mod, *uuid_tplg)) {
1255 mconfig->module = skl_module;
1256 ret = 0;
1257 break;
1258 }
1259 }
1260 if (skl->nr_modules && ret)
1261 return ret;
1262
1263 list_for_each_entry(module, &ctx->uuid_list, list) {
1264 for (i = 0; i < MAX_IN_QUEUE; i++) {
1265 pin_id = &mconfig->m_in_pin[i].id;
1266 if (!uuid_le_cmp(pin_id->mod_uuid, module->uuid))
1267 pin_id->module_id = module->id;
1268 }
1269
1270 for (i = 0; i < MAX_OUT_QUEUE; i++) {
1271 pin_id = &mconfig->m_out_pin[i].id;
1272 if (!uuid_le_cmp(pin_id->mod_uuid, module->uuid))
1273 pin_id->module_id = module->id;
1274 }
1275 }
1276
1277 return 0;
1278}
1279
1280static int skl_populate_modules(struct skl *skl)
1281{
1282 struct skl_pipeline *p;
1283 struct skl_pipe_module *m;
1284 struct snd_soc_dapm_widget *w;
1285 struct skl_module_cfg *mconfig;
1286 int ret = 0;
1287
1288 list_for_each_entry(p, &skl->ppl_list, node) {
1289 list_for_each_entry(m, &p->pipe->w_list, node) {
1290 w = m->w;
1291 mconfig = w->priv;
1292
1293 ret = skl_get_module_info(skl, mconfig);
1294 if (ret < 0) {
1295 dev_err(skl->skl_sst->dev,
1296 "query module info failed\n");
1297 return ret;
1298 }
1299 }
1300 }
1301
1302 return ret;
1303}
1304
1305static int skl_platform_soc_probe(struct snd_soc_platform *platform)
1306{
1307 struct hdac_ext_bus *ebus = dev_get_drvdata(platform->dev);
1308 struct skl *skl = ebus_to_skl(ebus);
1309 const struct skl_dsp_ops *ops;
1310 int ret;
1311
1312 pm_runtime_get_sync(platform->dev);
1313 if ((ebus_to_hbus(ebus))->ppcap) {
1314 skl->platform = platform;
1315
1316
1317 skl->debugfs = skl_debugfs_init(skl);
1318
1319 ret = skl_tplg_init(platform, ebus);
1320 if (ret < 0) {
1321 dev_err(platform->dev, "Failed to init topology!\n");
1322 return ret;
1323 }
1324
1325
1326 ops = skl_get_dsp_ops(skl->pci->device);
1327 if (!ops)
1328 return -EIO;
1329
1330 if (skl->skl_sst->is_first_boot == false) {
1331 dev_err(platform->dev, "DSP reports first boot done!!!\n");
1332 return -EIO;
1333 }
1334
1335 ret = ops->init_fw(platform->dev, skl->skl_sst);
1336 if (ret < 0) {
1337 dev_err(platform->dev, "Failed to boot first fw: %d\n", ret);
1338 return ret;
1339 }
1340 skl_populate_modules(skl);
1341 skl->skl_sst->update_d0i3c = skl_update_d0i3c;
1342 skl_dsp_enable_notification(skl->skl_sst, false);
1343 }
1344 pm_runtime_mark_last_busy(platform->dev);
1345 pm_runtime_put_autosuspend(platform->dev);
1346
1347 return 0;
1348}
1349static const struct snd_soc_platform_driver skl_platform_drv = {
1350 .probe = skl_platform_soc_probe,
1351 .ops = &skl_platform_ops,
1352 .pcm_new = skl_pcm_new,
1353 .pcm_free = skl_pcm_free,
1354};
1355
1356static const struct snd_soc_component_driver skl_component = {
1357 .name = "pcm",
1358};
1359
1360int skl_platform_register(struct device *dev)
1361{
1362 int ret;
1363 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
1364 struct skl *skl = ebus_to_skl(ebus);
1365
1366 INIT_LIST_HEAD(&skl->ppl_list);
1367 INIT_LIST_HEAD(&skl->bind_list);
1368
1369 ret = snd_soc_register_platform(dev, &skl_platform_drv);
1370 if (ret) {
1371 dev_err(dev, "soc platform registration failed %d\n", ret);
1372 return ret;
1373 }
1374 ret = snd_soc_register_component(dev, &skl_component,
1375 skl_platform_dai,
1376 ARRAY_SIZE(skl_platform_dai));
1377 if (ret) {
1378 dev_err(dev, "soc component registration failed %d\n", ret);
1379 snd_soc_unregister_platform(dev);
1380 }
1381
1382 return ret;
1383
1384}
1385
1386int skl_platform_unregister(struct device *dev)
1387{
1388 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
1389 struct skl *skl = ebus_to_skl(ebus);
1390 struct skl_module_deferred_bind *modules, *tmp;
1391
1392 if (!list_empty(&skl->bind_list)) {
1393 list_for_each_entry_safe(modules, tmp, &skl->bind_list, node) {
1394 list_del(&modules->node);
1395 kfree(modules);
1396 }
1397 }
1398
1399 snd_soc_unregister_component(dev);
1400 snd_soc_unregister_platform(dev);
1401 return 0;
1402}
1403
