LXR linux/arch/arm/mach-s3c24xx/sleep-s3c2410.S

   1/* linux/arch/arm/mach-s3c2410/sleep.S
   2 *
   3 * Copyright (c) 2004 Simtec Electronics
   4 *      Ben Dooks <ben@simtec.co.uk>
   5 *
   6 * S3C2410 Power Manager (Suspend-To-RAM) support
   7 *
   8 * Based on PXA/SA1100 sleep code by:
   9 *      Nicolas Pitre, (c) 2002 Monta Vista Software Inc
  10 *      Cliff Brake, (c) 2001
  11 *
  12 * This program is free software; you can redistribute it and/or modify
  13 * it under the terms of the GNU General Public License as published by
  14 * the Free Software Foundation; either version 2 of the License, or
  15 * (at your option) any later version.
  16 *
  17 * This program is distributed in the hope that it will be useful,
  18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 * GNU General Public License for more details.
  21 *
  22 * You should have received a copy of the GNU General Public License
  23 * along with this program; if not, write to the Free Software
  24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  25*/
  26
  27#include <linux/linkage.h>
  28#include <asm/assembler.h>
  29#include <mach/hardware.h>
  30#include <mach/map.h>
  31
  32#include <mach/regs-gpio.h>
  33#include <mach/regs-clock.h>
  34#include <plat/regs-serial.h>
  35
  36#include "regs-mem.h"
  37
  38        /* s3c2410_cpu_suspend
  39         *
  40         * put the cpu into sleep mode
  41        */
  42
  43ENTRY(s3c2410_cpu_suspend)
  44        @@ prepare cpu to sleep
  45
  46        ldr     r4, =S3C2410_REFRESH
  47        ldr     r5, =S3C24XX_MISCCR
  48        ldr     r6, =S3C2410_CLKCON
  49        ldr     r7, [r4]                @ get REFRESH (and ensure in TLB)
  50        ldr     r8, [r5]                @ get MISCCR (and ensure in TLB)
  51        ldr     r9, [r6]                @ get CLKCON (and ensure in TLB)
  52
  53        orr     r7, r7, #S3C2410_REFRESH_SELF   @ SDRAM sleep command
  54        orr     r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals
  55        orr     r9, r9, #S3C2410_CLKCON_POWER   @ power down command
  56
  57        teq     pc, #0                  @ first as a trial-run to load cache
  58        bl      s3c2410_do_sleep
  59        teq     r0, r0                  @ now do it for real
  60        b       s3c2410_do_sleep        @
  61
  62        @@ align next bit of code to cache line
  63        .align  5
  64s3c2410_do_sleep:
  65        streq   r7, [r4]                        @ SDRAM sleep command
  66        streq   r8, [r5]                        @ SDRAM power-down config
  67        streq   r9, [r6]                        @ CPU sleep
  681:      beq     1b
  69        mov     pc, r14
  70