LXR linux/arch/arm/mach-sa1100/generic.c

   1/*
   2 * linux/arch/arm/mach-sa1100/generic.c
   3 *
   4 * Author: Nicolas Pitre
   5 *
   6 * Code common to all SA11x0 machines.
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 */
  12#include <linux/gpio.h>
  13#include <linux/module.h>
  14#include <linux/kernel.h>
  15#include <linux/init.h>
  16#include <linux/delay.h>
  17#include <linux/dma-mapping.h>
  18#include <linux/pm.h>
  19#include <linux/cpufreq.h>
  20#include <linux/ioport.h>
  21#include <linux/platform_device.h>
  22
  23#include <video/sa1100fb.h>
  24
  25#include <asm/div64.h>
  26#include <asm/mach/map.h>
  27#include <asm/mach/flash.h>
  28#include <asm/irq.h>
  29#include <asm/system_misc.h>
  30
  31#include <mach/hardware.h>
  32#include <mach/irqs.h>
  33
  34#include "generic.h"
  35
  36unsigned int reset_status;
  37EXPORT_SYMBOL(reset_status);
  38
  39#define NR_FREQS        16
  40
  41/*
  42 * This table is setup for a 3.6864MHz Crystal.
  43 */
  44static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
  45         590,   /*  59.0 MHz */
  46         737,   /*  73.7 MHz */
  47         885,   /*  88.5 MHz */
  48        1032,   /* 103.2 MHz */
  49        1180,   /* 118.0 MHz */
  50        1327,   /* 132.7 MHz */
  51        1475,   /* 147.5 MHz */
  52        1622,   /* 162.2 MHz */
  53        1769,   /* 176.9 MHz */
  54        1917,   /* 191.7 MHz */
  55        2064,   /* 206.4 MHz */
  56        2212,   /* 221.2 MHz */
  57        2359,   /* 235.9 MHz */
  58        2507,   /* 250.7 MHz */
  59        2654,   /* 265.4 MHz */
  60        2802    /* 280.2 MHz */
  61};
  62
  63/* rounds up(!)  */
  64unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
  65{
  66        int i;
  67
  68        khz /= 100;
  69
  70        for (i = 0; i < NR_FREQS; i++)
  71                if (cclk_frequency_100khz[i] >= khz)
  72                        break;
  73
  74        return i;
  75}
  76
  77unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
  78{
  79        unsigned int freq = 0;
  80        if (idx < NR_FREQS)
  81                freq = cclk_frequency_100khz[idx] * 100;
  82        return freq;
  83}
  84
  85
  86/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
  87 * this platform, anyway.
  88 */
  89int sa11x0_verify_speed(struct cpufreq_policy *policy)
  90{
  91        unsigned int tmp;
  92        if (policy->cpu)
  93                return -EINVAL;
  94
  95        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  96
  97        /* make sure that at least one frequency is within the policy */
  98        tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
  99        if (tmp > policy->max)
 100                policy->max = tmp;
 101
 102        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
 103
 104        return 0;
 105}
 106
 107unsigned int sa11x0_getspeed(unsigned int cpu)
 108{
 109        if (cpu)
 110                return 0;
 111        return cclk_frequency_100khz[PPCR & 0xf] * 100;
 112}
 113
 114/*
 115 * Default power-off for SA1100
 116 */
 117static void sa1100_power_off(void)
 118{
 119        mdelay(100);
 120        local_irq_disable();
 121        /* disable internal oscillator, float CS lines */
 122        PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
 123        /* enable wake-up on GPIO0 (Assabet...) */
 124        PWER = GFER = GRER = 1;
 125        /*
 126         * set scratchpad to zero, just in case it is used as a
 127         * restart address by the bootloader.
 128         */
 129        PSPR = 0;
 130        /* enter sleep mode */
 131        PMCR = PMCR_SF;
 132}
 133
 134void sa11x0_restart(char mode, const char *cmd)
 135{
 136        if (mode == 's') {
 137                /* Jump into ROM at address 0 */
 138                soft_restart(0);
 139        } else {
 140                /* Use on-chip reset capability */
 141                RSRR = RSRR_SWR;
 142        }
 143}
 144
 145static void sa11x0_register_device(struct platform_device *dev, void *data)
 146{
 147        int err;
 148        dev->dev.platform_data = data;
 149        err = platform_device_register(dev);
 150        if (err)
 151                printk(KERN_ERR "Unable to register device %s: %d\n",
 152                        dev->name, err);
 153}
 154
 155
 156static struct resource sa11x0udc_resources[] = {
 157        [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
 158        [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
 159};
 160
 161static u64 sa11x0udc_dma_mask = 0xffffffffUL;
 162
 163static struct platform_device sa11x0udc_device = {
 164        .name           = "sa11x0-udc",
 165        .id             = -1,
 166        .dev            = {
 167                .dma_mask = &sa11x0udc_dma_mask,
 168                .coherent_dma_mask = 0xffffffff,
 169        },
 170        .num_resources  = ARRAY_SIZE(sa11x0udc_resources),
 171        .resource       = sa11x0udc_resources,
 172};
 173
 174static struct resource sa11x0uart1_resources[] = {
 175        [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
 176        [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
 177};
 178
 179static struct platform_device sa11x0uart1_device = {
 180        .name           = "sa11x0-uart",
 181        .id             = 1,
 182        .num_resources  = ARRAY_SIZE(sa11x0uart1_resources),
 183        .resource       = sa11x0uart1_resources,
 184};
 185
 186static struct resource sa11x0uart3_resources[] = {
 187        [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
 188        [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
 189};
 190
 191static struct platform_device sa11x0uart3_device = {
 192        .name           = "sa11x0-uart",
 193        .id             = 3,
 194        .num_resources  = ARRAY_SIZE(sa11x0uart3_resources),
 195        .resource       = sa11x0uart3_resources,
 196};
 197
 198static struct resource sa11x0mcp_resources[] = {
 199        [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
 200        [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
 201        [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
 202};
 203
 204static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
 205
 206static struct platform_device sa11x0mcp_device = {
 207        .name           = "sa11x0-mcp",
 208        .id             = -1,
 209        .dev = {
 210                .dma_mask = &sa11x0mcp_dma_mask,
 211                .coherent_dma_mask = 0xffffffff,
 212        },
 213        .num_resources  = ARRAY_SIZE(sa11x0mcp_resources),
 214        .resource       = sa11x0mcp_resources,
 215};
 216
 217void __init sa11x0_ppc_configure_mcp(void)
 218{
 219        /* Setup the PPC unit for the MCP */
 220        PPDR &= ~PPC_RXD4;
 221        PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
 222        PSDR |= PPC_RXD4;
 223        PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
 224        PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
 225}
 226
 227void sa11x0_register_mcp(struct mcp_plat_data *data)
 228{
 229        sa11x0_register_device(&sa11x0mcp_device, data);
 230}
 231
 232static struct resource sa11x0ssp_resources[] = {
 233        [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
 234        [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
 235};
 236
 237static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
 238
 239static struct platform_device sa11x0ssp_device = {
 240        .name           = "sa11x0-ssp",
 241        .id             = -1,
 242        .dev = {
 243                .dma_mask = &sa11x0ssp_dma_mask,
 244                .coherent_dma_mask = 0xffffffff,
 245        },
 246        .num_resources  = ARRAY_SIZE(sa11x0ssp_resources),
 247        .resource       = sa11x0ssp_resources,
 248};
 249
 250static struct resource sa11x0fb_resources[] = {
 251        [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
 252        [1] = DEFINE_RES_IRQ(IRQ_LCD),
 253};
 254
 255static struct platform_device sa11x0fb_device = {
 256        .name           = "sa11x0-fb",
 257        .id             = -1,
 258        .dev = {
 259                .coherent_dma_mask = 0xffffffff,
 260        },
 261        .num_resources  = ARRAY_SIZE(sa11x0fb_resources),
 262        .resource       = sa11x0fb_resources,
 263};
 264
 265void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
 266{
 267        sa11x0_register_device(&sa11x0fb_device, inf);
 268}
 269
 270static struct platform_device sa11x0pcmcia_device = {
 271        .name           = "sa11x0-pcmcia",
 272        .id             = -1,
 273};
 274
 275static struct platform_device sa11x0mtd_device = {
 276        .name           = "sa1100-mtd",
 277        .id             = -1,
 278};
 279
 280void sa11x0_register_mtd(struct flash_platform_data *flash,
 281                         struct resource *res, int nr)
 282{
 283        flash->name = "sa1100";
 284        sa11x0mtd_device.resource = res;
 285        sa11x0mtd_device.num_resources = nr;
 286        sa11x0_register_device(&sa11x0mtd_device, flash);
 287}
 288
 289static struct resource sa11x0ir_resources[] = {
 290        DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
 291        DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
 292        DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
 293        DEFINE_RES_IRQ(IRQ_Ser2ICP),
 294};
 295
 296static struct platform_device sa11x0ir_device = {
 297        .name           = "sa11x0-ir",
 298        .id             = -1,
 299        .num_resources  = ARRAY_SIZE(sa11x0ir_resources),
 300        .resource       = sa11x0ir_resources,
 301};
 302
 303void sa11x0_register_irda(struct irda_platform_data *irda)
 304{
 305        sa11x0_register_device(&sa11x0ir_device, irda);
 306}
 307
 308static struct resource sa1100_rtc_resources[] = {
 309        DEFINE_RES_MEM(0x90010000, 0x40),
 310        DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
 311        DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
 312};
 313
 314static struct platform_device sa11x0rtc_device = {
 315        .name           = "sa1100-rtc",
 316        .id             = -1,
 317        .num_resources  = ARRAY_SIZE(sa1100_rtc_resources),
 318        .resource       = sa1100_rtc_resources,
 319};
 320
 321static struct resource sa11x0dma_resources[] = {
 322        DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
 323        DEFINE_RES_IRQ(IRQ_DMA0),
 324        DEFINE_RES_IRQ(IRQ_DMA1),
 325        DEFINE_RES_IRQ(IRQ_DMA2),
 326        DEFINE_RES_IRQ(IRQ_DMA3),
 327        DEFINE_RES_IRQ(IRQ_DMA4),
 328        DEFINE_RES_IRQ(IRQ_DMA5),
 329};
 330
 331static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
 332
 333static struct platform_device sa11x0dma_device = {
 334        .name           = "sa11x0-dma",
 335        .id             = -1,
 336        .dev = {
 337                .dma_mask = &sa11x0dma_dma_mask,
 338                .coherent_dma_mask = 0xffffffff,
 339        },
 340        .num_resources  = ARRAY_SIZE(sa11x0dma_resources),
 341        .resource       = sa11x0dma_resources,
 342};
 343
 344static struct platform_device *sa11x0_devices[] __initdata = {
 345        &sa11x0udc_device,
 346        &sa11x0uart1_device,
 347        &sa11x0uart3_device,
 348        &sa11x0ssp_device,
 349        &sa11x0pcmcia_device,
 350        &sa11x0rtc_device,
 351        &sa11x0dma_device,
 352};
 353
 354static int __init sa1100_init(void)
 355{
 356        pm_power_off = sa1100_power_off;
 357        return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
 358}
 359
 360arch_initcall(sa1100_init);
 361
 362void __init sa11x0_init_late(void)
 363{
 364        sa11x0_pm_init();
 365}
 366
 367/*
 368 * Common I/O mapping:
 369 *
 370 * Typically, static virtual address mappings are as follow:
 371 *
 372 * 0xf0000000-0xf3ffffff:       miscellaneous stuff (CPLDs, etc.)
 373 * 0xf4000000-0xf4ffffff:       SA-1111
 374 * 0xf5000000-0xf5ffffff:       reserved (used by cache flushing area)
 375 * 0xf6000000-0xfffeffff:       reserved (internal SA1100 IO defined above)
 376 * 0xffff0000-0xffff0fff:       SA1100 exception vectors
 377 * 0xffff2000-0xffff2fff:       Minicache copy_user_page area
 378 *
 379 * Below 0xe8000000 is reserved for vm allocation.
 380 *
 381 * The machine specific code must provide the extra mapping beside the
 382 * default mapping provided here.
 383 */
 384
 385static struct map_desc standard_io_desc[] __initdata = {
 386        {       /* PCM */
 387                .virtual        =  0xf8000000,
 388                .pfn            = __phys_to_pfn(0x80000000),
 389                .length         = 0x00100000,
 390                .type           = MT_DEVICE
 391        }, {    /* SCM */
 392                .virtual        =  0xfa000000,
 393                .pfn            = __phys_to_pfn(0x90000000),
 394                .length         = 0x00100000,
 395                .type           = MT_DEVICE
 396        }, {    /* MER */
 397                .virtual        =  0xfc000000,
 398                .pfn            = __phys_to_pfn(0xa0000000),
 399                .length         = 0x00100000,
 400                .type           = MT_DEVICE
 401        }, {    /* LCD + DMA */
 402                .virtual        =  0xfe000000,
 403                .pfn            = __phys_to_pfn(0xb0000000),
 404                .length         = 0x00200000,
 405                .type           = MT_DEVICE
 406        },
 407};
 408
 409void __init sa1100_map_io(void)
 410{
 411        iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
 412}
 413
 414/*
 415 * Disable the memory bus request/grant signals on the SA1110 to
 416 * ensure that we don't receive spurious memory requests.  We set
 417 * the MBGNT signal false to ensure the SA1111 doesn't own the
 418 * SDRAM bus.
 419 */
 420void sa1110_mb_disable(void)
 421{
 422        unsigned long flags;
 423
 424        local_irq_save(flags);
 425        
 426        PGSR &= ~GPIO_MBGNT;
 427        GPCR = GPIO_MBGNT;
 428        GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 429
 430        GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
 431
 432        local_irq_restore(flags);
 433}
 434
 435/*
 436 * If the system is going to use the SA-1111 DMA engines, set up
 437 * the memory bus request/grant pins.
 438 */
 439void sa1110_mb_enable(void)
 440{
 441        unsigned long flags;
 442
 443        local_irq_save(flags);
 444
 445        PGSR &= ~GPIO_MBGNT;
 446        GPCR = GPIO_MBGNT;
 447        GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 448
 449        GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
 450        TUCR |= TUCR_MR;
 451
 452        local_irq_restore(flags);
 453}
 454
 455